MC44608_技术文档

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The MC44608 is a high performance voltage mode controller

designed for off–line converters. This high voltage circuit that

integrates the start–up current source and the oscillator capacitor,

requires few external components while offering a high flexibility and

reliability.

8

The device also features a very high efficiency stand–by

management consisting of an effective Pulsed Mode operation. This

technique enables the reduction of the stand–by power consumption to

approximately 1W while delivering 300mW in a 150W SMPS.

• Integrated Start–Up Current Source

1

DIP–8

P SUFFIX

CASE 626

• Lossless Off–Line Start–Up

• Direct Off–Line Operation

• Fast Start–Up

PIN CONNECTIONS AND

MARKING DIAGRAM

General Features

• Flexibility

• Duty Cycle Control

• Undervoltage Lockout with Hysteresis

• On Chip Oscillator Switching Frequency 40, or 75kHz

• Secondary Control with Few External Components

1

2

8

7

Demag

Vi

I

sense

3

4

6

5

Control Input

Gnd

V

cc

Driver

Protections

AWL = Manufacturing Code

YYWW = Date Code

• Maximum Duty Cycle Limitation

• Cycle by Cycle Current Limitation

• Demagnetization (Zero Current Detection) Protection

(Top View)

• “Over V

Protection” Against Open Loop

CC

•

ProgrammableLowInertiaOverVoltageProtectionAgainstOpenLoop

• Internal Thermal Protection

ORDERING INFORMATION

GreenLine Controller

Switching

Frequency

Device

Package Shipping

• Pulsed Mode Techniques for a Very High Efficiency Low Power

Mode

• Lossless Startup

Plastic

DIP–8

MC44608P40

MC44608P75

40kHz

75kHz

50 / Rail

Plastic

DIP–8

• Low dV/dT for Low EMI Radiations

50 / Rail

Semiconductor Components Industries, LLC, 1999

1

Publication Order Number:

January, 2000 – Rev. 2

MC44608/D

MC44608

REPRESENTATIVE BLOCK DIAGRAM

Demag

Vi

1

8

DMG

+

–

UVLO2

Start–up

Source

50 mV

/20 mV

9 mA

>24

A

>120

A

Latched off Phase

Start–up Phase

Switching Phase

Demag

Logic

V

CC

Management

6

Latched off

Phase

V

CC

Output

Start–up

Phase

OVP

UVLO1

UVLO2

2 S

Start–up

Phase

Switching

Phase

&

200

0

A

OUT Disable

DMG

1

OSC

Enable

S1

Buffer

5

4

Clock

&

Thermal

Shutdown

&

S

Stand–by

Management

OSC

Driver

GND

Stand–by

+

PWM

Latch

PWM

–

&

R

OC NOC

Output

Q

&

Leading Edge

Blanking

VPWM

+

2

Latched off Phase

Stand–by

CS

&

Isense

–

S2

S3

Regulation

3

Block

1 V

4 kHz Filter

Switching Phase

Control

Input

MAXIMUM RATINGS

Rating

Symbol

Value

30

Unit

mA

V

Total Power Supply Current

I

CC

Output Supply Voltage with Respect to Ground

All Inputs except Vi

V

CC

16

V

inputs

–1.0 to +16

500

V

Line Voltage

V

i

V

Power Dissipation and Thermal Characteristics

Maximum Power Dissipation at T = 85°C

Thermal Resistance, Junction–to–Air

P

600

100

mW

°C/W

A

D

R

θJA

Operating Junction Temperature

T

150

°C

J

Operating Ambient Temperature

T

A

–25 to +85

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2

MC44608

ELECTRICAL CHARACTERISTICS

Characteristic

Symbol

Min

Typ

Max

Unit

OUTPUT SECTION

Output Resistor

Sink Resistance

Source Resistance

R

5.0

8.5

15

OL

R

OH

(1)

Output Voltage Rise Time (from 3 V up to 9 V)

t

50

ns

r

(1)

Output Voltage Falling Edge Slew–Rate (from 9 V down to 3 V)

t

f

CONTROL INPUT SECTION

Duty Cycle @ I

= 2.5 mA

= 1.0 mA

d

2.0

48

%

V

pin3

2mA

Duty Cycle @ I

36

4.75

3.4

43

5.0

3.9

3.0

1mA

Control Input Clamp Voltage (Switching Phase) @ I

pin3

= –1.0 mA

5.25

4.3

3.7

Latched Phase Control Input Voltage (Stand–by) @ I

= +500

A

V

pin3

LP–stby

Latched Phase Control Input Voltage (Stand–by) @ I

= +1.0 mA

2.4

V

LP–stby

CURRENT SENSE SECTION

Maximum Current Sense Input Threshold

Input Bias Current

V

0.95

–1.8

180

1.0

1.05

1.8

V

A

CS–th

I

B–cs

Stand–By Current Sense Input Current

I

200

220

480

250

200

680

470

400

220

A

CS–stby

CS–stup

Start–up Phase Current Sense Input Current

I

A

Propagation Delay (Current Sense Input to Output @ V

Leading Edge Blanking Duration

T MOS = 3 V)

MC44608P40

MC44608P75

MC44608P100

MC44608P40

MC44608P75

MC44608P100

T

PLH(In/Out)

ns

TH

T

LEB

DLY

Leading Edge Blanking Duration

Leading Edge Blanking + Propagation Delay

OSCILLATOR SECTION

500

370

900

570

Normal Operation Frequency MC44608P40

Normal Operation Frequency MC44608P75

Normal Operation Frequency MC44608P100

f

36

68

40

75

44

82

kHz

%

osc

max

100

82

Maximum Duty Cycle @ f = f

OVERVOLTAGE SECTION

Quick OVP Input Filtering (R

d

78

86

osc

= 100 k

)

T

250

2.0

ns

µs

µA

V

demag

filt

T

PHL(In/Out)

Propagation Delay (I

> I

to output low)

demag ovp

Quick OVP Current Threshold

Protection Threshold Level on V

I

105

14.8

1.0

120

15.3

140

OVP

V

15.8

CC

CC–OVP

Minimum Gap Between V

and V

V –

CC–OVP

V

CC–OVP

stup–th

V

stup

NOTES:

(1) This parameter is measured using 1.0 nF connected between the output and the ground.

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MC44608

ELECTRICAL CHARACTERISTICS(V

noted) (Note 1)

=12V,fortypicalvaluesT =25°C,formin/maxvaluesT =–25°Cto+85°Cunlessotherwise

CC

A

Characteristic

Symbol

Min

Typ

Max

Unit

DEMAGNETIZATION DETECTION SECTION (Note 2)

Demag Comparator Threshold (V

increasing)

V

30

50

30

69

mV

ns

A

pin1

dmg–th

Demag Comparator Hysteresis (Note 3)

H

dmg

Propagation Delay (Input to Output, Low to High)

t

300

PHL(In/Out)

Input Bias Current (V

= 50 mV)

I

–0.6

–0.9

2.05

demag

dem–lb

Negative Clamp Level (I

= –1 mA)

V

–0.7

2.3

–0.4

2.8

V

demag

cl–neg–dem

Positive Clamp Level @ I

= 125

A

V

demag

cl–pos–

dem–H

Positive Clamp Level @ I

= 25

A

V

1.4

1.7

1.9

V

demag

cl–pos–

dem–L

OVERTEMPERATURE SECTION

Trip Level Over Temperature

Hysteresis

T

160

30

°C

high

hyst

STAND–BY MAXIMUM CURRENT REDUCTION SECTION

Normal Mode Recovery Demag Pin Current Threshold

K FACTORS SECTION FOR PULSED MODE OPERATION

I

20

25

30

A

dem–NM

I

/ I

10 x K1

2.4

2.8

2.9

3.3

3.8

4.2

–

CCS stup

MC44608P40

MC44608P75

MC44608P100

/ I

CCS stup

/ I

CCS stup

3.5

3

/ I

CCL stup

10 x K2

46

1.8

90

52

63

2.6

150

225

5.5

2

(V

stup

– UVLO2) / (V

stup

– UVLO1)

10 x K

sstup

2.2

2

(UVLO1 – UVLO2) / (V

stup

10 x K

120

198

4.7

sl

6

I

/ V

10 x Y

175

3.0

CS csth

cstby

Demag ratio I

/ I

ovp dem

NM

Dmgr

(V3

– V3 ) / (1 mA – 0.5 mA)

R3

V3

1800

4.8

1 mA

control

SUPPLY SECTION

Minimum Start–up Voltage

Start–up Voltage

0.5 mA

V

Latch–off

V

Vi

low

50

V

12.5

9.5

13.1

10

13.8

10.5

CC

Output Disabling V

stup–th

Voltage After Turn On

V

CC

– V

uvlo1

Hysteresis (V

stup–th

)

H

3.1

6.6

3.4

9.5

V

uvlo1

Undervoltage Lockout Voltage

stup–uvlo1

V

6.2

7.0

V

CC

Hysteresis (V

uvlo2

uvlo1–uvlo2

–(I

– V

)

H

V

uvlo1

uvlo2

Absolute Normal Condition V

(V

CC

Start Current @ (V = 100 V) and

)

CC

12.8

mA

CC

i

= 9 V)

Switching Phase Supply Current (no load)

I

2.0

2.4

–

2.6

3.2

3.4

3.6

4.0

–

mA

MC44608P40

MC44608P75

MC44608P100

CCS

Latched Off Phase Supply Current

Hiccup Mode Duty Cycle (no load)

NOTES:

I

0.3

0.5

10

0.68

mA

%

CC–latch

Hiccup

(1) Adjust V

above the start–up threshold before setting to 12 V. Low duty cycle pulse techniques are used during test to maintain junction

CC

temperature as close to ambient as possible.

(2) This function can be inhibited by connecting pin 1 to GND.

(3) Guaranteed by design (non tested)

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MC44608

PIN FUNCTION DESCRIPTION

Description

Name

1

Demag

The Demag pin offers 3 different functions: Zero voltage crossing detection (50mV), 24µA current detection

and 120µA current detection. The 24µA level is used to detect the secondary reconfiguration status and the

120µA level to detect an Over Voltage status called Quick OVP.

2

I

The Current Sense pin senses the voltage developed on the series resistor inserted in the source of the

sense

power MOSFET. When I

reaches 1V, the Driver output (pin 5) is disabled. This is known as the Over

sense

Current Protection function. A 200µA current source is flowing out of the pin 3 during the start–up phase and

during the switching phase in case of the Pulsed Mode of operation. A resistor can be inserted between the

sense resistor and the pin 3, thus a programmable peak current detection can be performed during the SMPS

stand–by mode.

3

Control Input

A feedback current from the secondary side of the SMPS via the opto–coupler is injected into this pin. A

resistor can be connected between this pin and GND to allow the programming of the Burst duty cycle during

the Stand–by mode.

4

5

6

Ground

Driver

This pin is the ground of the primary side of the SMPS.

The current and slew rate capability of this pin are suited to drive Power MOSFETs.

V

CC

This pin is the positive supply of the IC. The driver output gets disabled when the voltage becomes higher

than 15V and the operating range is between 6.6V and 13V. An intermediate voltage level of 10V creates a

disabling condition called Latched Off phase.

7

8

This pin is to provide isolation between the Vi pin 8 and the V pin 6.

CC

Vi

This pin can be directly connected to a 500V voltage source for start–up function of the IC. During the

Start–up phase a 9 mA current source is internally delivered to the V pin 6 allowing a rapid charge of the

CC

capacitor. As soon as the IC starts–up, this current source is disabled.

V

CC

OPERATING DESCRIPTION

The switch S3 is closed in Stand–by mode during the

Regulation

Latched Off Phase while the switch S2 remains open. (See

section PULSED MODE DUTY CYCLE CONTROL).

The resistor Rdpulsed (Rduty cycle burst) has no effect on

the regulation process. This resistor is used to determine the

burstdutycycledescribedinthechapter“PulsedDutyCycle

Control” on page 8.

V

LP–stby

V

CC

1

0

Stand–by

Latched off Phase

Control

Input

&

S3

3

1

0

Switching Phase

PWM

PWM Latch

S2

V

dd

The MC44608 works in voltage mode. The on–time is

controlled by the PWM comparator that compares the

oscillator sawtooth with the regulation block output (refer to

the block diagram on page 2).

The PWM latch is initialized by the oscillator and is reset

by the PWM comparator or by the current sense comparator

in case of an over current. This configuration ensures that

only a single pulse appears at the circuit output during an

oscillator cycle.

Regulation

Output

20

Comparator

5 V

4 kHz

Filter

1.6 V

Figure 1. Regulator

Current Sense

The inductor current is converted to a positive voltage by

inserting a ground reference sense resistor R

with the power switch.

The maximum current sense threshold is fixed at 1V. The

peak current is given by the following equation:

Thepin3sensesthefeedbackcurrentprovidedbytheopto

coupler. During the switching phase the switch S2 is closed

and the shunt regulator is accessible by the pin 3. The shunt

regulator voltage is typically 5V. The dynamic resistance of

the shunt regulator represented by the zener diode is 20 .

The gain of the Control input is given on Figure 10 which

showsthedutycycleasafunctionofthecurrentinjectedinto

the pin 3.

in series

Sense

1

Ipk

(A)

max

R

( )

sense

A 4kHz filter network is inserted between the shunt

regulator and the PWM comparator to cancel the high

frequency residual noise.

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MC44608

Oscillator Buffer Output

Instand–bymode, thiscurrentcanbeloweredasduetothe

activation of a 200µA current source:

R Q

DMG

1

(R (k ) 0, 2)

cs

Ipk

(A)

max stby

R

( )

S

sense

Demag

1

+

–

Switching Phase

&

DMG

&

50/20 mV

200

0

A

STAND–BY

START–UP

Idemag

> 24

>120

A

1

Current Mirror

Overcurrent

Comparator

Figure 3. Demagnetization Block

L.E.B.

Isense

OC

+

–

2

Rcs

This function can be inhibited by grounding it but in this

case, the quick and programmable OVP is also disabled.

Rsense

1 V

Oscillator

Figure 2. Current Sense

The MC44608 contains a fixed frequency oscillator. It is

built around a fixed value capacitor CT succesively charged

and discharged by two distinct current sources ICH and

IDCH. The window comparator senses the CT voltage value

and activates the sources when the voltage is reaching the

2.4V/4V levels.

The current sense input consists of a filter (6k , 4pF) and

of a leading edge blanking. Thanks to that, this pin is not

sensitive to the power switch turn on noise and spikes and

practically in most applications, no filtering network is

required to sense the current.

Finally, this pin is used:

ICH

– as a protection against over currents (Isense > I)

– as a reduction of the peak current during a Pulsed Mode

switching phase.

DMG

from Demag

logic block

OSC

SCH

&

Window

comp

4 V

+

–

Clock

The overcurrent propagation delay is reduced by

producing a sharp output turn off (high slew rate). This

results in an abrupt output turn off in the event of an over

current and in the majority of the pulsed mode switching

sequense.

2.4 V

SDCH

CT

IDCH

Demagnetization Section

The MC44608 demagnetization detection consists of a

comparator designed to compare the V

to a reference that is typically equal to 50mV.

winding voltage

CC

Figure 4. Oscillator Block

This reference is chosen low to increase effectiveness of

the demagnetization detection even during start–up.

A latch is incorporated to turn the demagnetization block

output into a low level as soon as a voltage less than 50 mV

is detected, and to keep it in this state until a new pulse is

generatedon the output. This avoids any ringing on the input

signal which may alter the demagnetization detection.

For a higher safety, the demagnetization block output is

also directly connected to the output, which is disabled

during the demagnetization phase.

The complete demagnetization status DMG is used to

inhibit the recharge of the CT capacitor. Thus in case of

incomplete transformer demagnetization the next switching

cycle is postpone until the DMG signal appears. The

oscillator remains at 2.4V corresponding to the sawtooth

valley voltage. In this way the SMPS is working in the so

called SOPS mode (Self Oscillating Power Supply). In that

case the effective switching frequency is variable and no

longer depends on the oscillator timing but on the external

working conditions (Refer to DMG signal in the Figure 5).

The demagnetization pin is also used for the quick,

programmable OVP. In fact, the demagnetization input

current is sensed so that the circuit output is latched offwhen

this current is detected as higher than 120µA.

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6

MC44608

OSC

4 V

V

CC

13 V

Vcont

2.4 V

10 V

Clock

6.5 V

DMG

Iprim

Start–up

Phase

Latched off

Phase

Switching

Phase

Figure 6. Hiccup Mode

Figure 5.

In case of the hiccup mode, the duty cycle of the switching

phase is in the range of 10%.

The OSC and Clock signals are provided according to the

Figure 5. The Clock signals correspond to the CT capacitor

discharge. The bottom curve represents the current flowing

in the sense resistor Rcs. It starts from zero and stops when

the sawtooth value is equal to the control voltage Vcont. In

this way the SMPS is regulated with a voltage mode control.

Mode Transition

TheLWlatchFigure7isthememoryoftheworkingstatus

at the end of every switching sequence.

Two different cases must be considered for the logic at the

termination of the SWITCHING PHASE:

1. No Over Current was observed

2. An Over Current was observed

Overvoltage Protection

The MC44608 offers two OVP functions:

These 2 cases are corresponding to the signal labelled

NOCincaseof“NoOverCurrent”and“OC”incaseofOver

Current. So the effective working status at the end of the ON

time memorized in LW corresponds to Q=1 for no over

current and Q=0 for over current.

– a fixed function that detects when V

15.4V

is higher than

CC

– a programmable function that uses the demag pin. The

current flowing into the demag pin is mirrored and

compared to the reference current Iovp (120µA). Thus this

OVP is quicker as it is not impacted by the V

is called QOVP.

This sequence is repeated during the Switching phase.

Several events can occur:

inertia and

CC

1. SMPS switch OFF

2. SMPS output overload

3. Transition from Normal to Pulsed Mode

4. Transition from Pulsed Mode to Normal Mode

In both cases, once an OVP condition is detected, the

output is latched off until a new circuit START–UP.

Start–up Management

The Vi pin 8 is directly connected to the HV DC rail Vin.

This high voltage current source is internally connected to

Latched Off

Phase

theV pinandthusisusedtochargetheV capacitor.The

CC CC

V

capacitor charge period corresponds to the Start–up

CC

VPWM

OUT

NOC

OC

S

Q

Stand–by

&

S

Mode

&

phase. When the V voltage reaches 13V, the high voltage

CC

Q

LW

9mA current source is disabled and the device starts

working. The device enters into the switching phase.

It is to be noticed that the maximum rating of the Vi pin 8

is 700V. ESD protection circuitry is not currently added to

this pin due to size limitations and technology constraints.

Protection is limited by the drain–substrate junction in

avalanche breakdown. To help increase the application

safety against high voltage spike on that pin it is possible to

insert a small wattage 1k series resistor between the Vin

rail and pin 8.

S1

R1

R2

R

Switch

LEB out

1 V

+

CS

–

I

Start–up

Phase > 24

Switching Start–up

Phase Phase

demag

A

Figure 7. Transition Logic

• 1. SMPS SWITCH OFF

When the mains is switched OFF, so long as the bulk

electrolithic bulk capacitor provides energy to the SMPS,

the controller remains in the switching phase. Then the peak

current reaches its maximum peak value, the switching

frequency decreases and all the secondary voltages are

The Figure 6 shows the V

no external current source providing current into the V

voltage evolution in case of

CC

pin during the switching phase. This case can be

encountered in SMPS when the self supply through an

auxiliary winding is not present (strong overload on the

SMPS output for example). The Figure 16 also depicts this

working configuration.

reduced. The V

voltage is also reduced. When V is

CC

equal to 10V, the SMPS stops working.

CC

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7

MC44608

• 2. Overload

according to the equation of the current sense section, page

5. The C.S. clamping level depends on the power to be

delivered to the load during the SMPS stand–by mode.

Every switching sequence ON/OFF is terminated by an OC

as long as the secondary Zener diode voltage has not been

reached. When the Zener voltage is reached the ON cycle is

terminated by a true PWM action. The proper SWITCHING

PHASE termination must correspond to a NOC condition.

The LW latch stores this NOC status.

The LATCHED OFF PHASE: The MODE latch is set.

The START–UP PHASE is similar to the Overload Mode.

The MODE latch remains in its set status (Q=1).

The SWITCHING PHASE: The Stand–by signal is

validated and the 200µA is sourced out of the Current Sense

pin 2.

In the hiccup mode the 3 distinct phases are described as

follows (refer to Figure 6):

The SWITCHING PHASE: The SMPS output is low and

the regulation block reacts by increasing the ON time (dmax

= 80%). The OC is reached at the end of every switching

cycle. The LW latch (Figure 7) is reset before the VPWM

signal appears. The SMPS output voltage is low. The V

CC

voltage cannot be maintained at a normal level as the

auxiliary winding provides a voltage which is also reduced

in a ratio similar to the one on the output (i.e. Vout nominal

/ Vout short–circuit). Consequently the V

CC

reduced at an operating rate given by the combination V

voltage is

CC

capacitor value together with the I working consumption

CC

(3.2mA) according to the equation 2. When V

crosses

CC

10V the WORKING PHASE gets terminated. The LW latch

remains in the reset status.

• 4. Transition from Stand–by to Normal

The secondary reconfiguration is removed. The

regulation on the low voltage secondary rail can no longer

be achieved, thus at the end of the SWITCHING PHASE, no

PWM condition can be encountered. The LW latch is reset.

At the next WORKING PHASE a NORMAL mode status

takes place.

In order to become independent of the recovery time

constant on the secondary side of the SMPS an additional

resetinputR2isprovidedontheMODElatch. Thecondition

Idemag<24µA corresponds to the activation of the

secondary reconfiguration status. The R2 reset insures a

return into the NORMAL mode following the first

START–UP PHASE.

The LATCHED–OFF PHASE: The V

capacitor

CC

voltage continues to drop. When it reaches 6.5V this phase

is terminated. Its duration is governed by equation 3.

The START–UP PHASE is reinitiated. The high voltage

start–up current source (–I

MODE latch is reset. The V

= 9mA) is activated and the

voltage ramps up according

CC1

CC

to the equation 1. When it reaches 13V, the IC enters into the

SWITCHING PHASE.

The NEXT SWITCHING PHASE: The high voltage

current source is inhibited, the MODE latch (Q=0) activates

the NORMAL mode of operation. Figure 2 shows that no

current is injected out pin 2. The over current sense level

corresponds to 1V.

As long as the overload is present, this sequence repeats.

TheSWITCHINGPHASEdutycycleisintherangeof10%.

Pulsed Mode Duty Cycle Control

During the sleep mode of the SMPS the switch S3 is

closed and the control input pin 3 is connected to a 4.6V

voltagesource thrua 500 resistor. Thedischargerateofthe

• 3. Transition from Normal to Pulsed Mode

In this sequence the secondary side is reconfigured (refer

to the typical application schematic on page 13). The high

voltage output value becomes lower than the NORMAL

mode regulated value. The TL431 shunt regulator is fully

OFF. In the SMPS stand–by mode all the SMPS outputs are

lowered except for the low voltage output that supply the

wake–up circuit located at the isolated side of the power

supply. In that mode the secondary regulation is performed

by the zener diode connected in parallel to the TL431.

The secondary reconfiguration status can be detected on

the SMPS primary side by measuring the voltage level

present on the auxiliary winding Laux. (Refer to the

Demagnetization Section). In the reconfigured status, the

V

CC

capacitor is given by I (device consumption

CC–latch

during the LATCHED OFF phase) in addition to the current

drawn out of the pin 3. Connecting a resistor between the Pin

3 and GND (R

) a programmable current isdrawn

DPULSED

from the V through pin 3. The duration of the LATCHED

CC

OFF phase is impacted by the presence of the resistor

R

. The equation 3 shows the relation to the pin 3

DPULSED

current.

Pulsed Mode Phases

Equations 1 through 8 define and predict the effective

behavior during the PULSED MODE operation. The

equations 6, 7, and 8 contain K, Y, and D factors. These

factors are combinations of measured parameters. They

appear in the parameter section “Kfactors for pulsed mode

operation” page 4. In equations 3 through 8 the pin 3 current

is the current defined in the above section “Pulsed Mode

Duty Cycle Control”.

Laux voltage is also reduced. The V

self–powering is no

CC

longer possible thus the SMPS enters in a hiccup mode

similar to the one described under the Overload condition.

In the SMPS stand–by mode the 3 distinct phases are:

The SWITCHING PHASE: Similar to the Overload

mode. The current sense clamping level is reduced

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8

MC44608

EQUATION 1

Start–up Phase Duration:

C

(V

UVLO2)

stup

Vcc

t

start–up

I

stup

where: I

is the start–up current flowing through V

CC

stup

C

is the V capacitor value

Vcc

CC

EQUATION 2

Switching Phase Duration:

C

(V

stup

UVLO1)

Vcc

t

switch

I

ccS

G

where: I

is the no load circuit consumption in switching phase

ccS

I

G

is the current consumed by the Power Switch

EQUATION 3

Latched–off Phase Duration:

C

(UVLO1 UVLO2)

I

Vcc

t

latched off

I

ccL

pin3

where: I

is the latched off phase consumption

is the current drawn from pin3 adding a resistor

ccL

I

pin3

EQUATION 4

Burst Mode Duty Cycle:

t

switch

d

BM

t

start up

switch

latched off

EQUATION 5

C

(V

stup

UVLO1)

Vcc

I

ccS

(V

G

d

BM

C

(V

UVLO2)

C

UVLO1)

C

(UVLO1 UVLO2)

stup

I

stup

Vcc

I

stup

ccS

G

ccL pin3

EQUATION 6

1

d

BM

I

ccS

I

G

ccS

G

1

k

S Stup

S L

I

stup

ccL pin3

where: k

S/Stup

S/L

= (V

– UVLO2)/(V

– UVLO1)

stup

k

= (UVLO1 – UVLO2)/(V

stup

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9

MC44608

EQUATION 7

1

d

BM

I

stup

ccS

I

G

1

k

S Stup

S L

I

stup

ccL

pin3

EQUATION 8

1

d

BM

I

G

1

I

1

k1

k

(k

)

S Stup

S L

I

stup

pin3

k2

I

stup

where: k1 = I

/I

ccs stup

k2 = I

I

ccL/ stup

= (V

k

–UVLO2)/(V

stup

–UVLO1)

S/Stup

stup

= (UVLO1–UVLO2)/(V

S/L

PULSED MODE CURRENT SENSE CLAMPING LEVEL

Equations 9, 10, 11 and 12 allow the calculation of the Rcs value for the desired maximum current peak value during the

SMPS stand–by mode.

EQUATION 9

V

cs–th

(R

I

)

cs

Ipk

stby

R

S

where: V

is the CS comparator threshold

cs–th

I

R

is the CS internal current source

is the sensing resistor

cs

S

is the resistor connected between pin 2 and R

cs

S

EQUATION 10

I

cs

1

R

cs

V

cs–th

Ipk

V

stby

cs–th

R

S

EQUATION 11

(R

Y

)

cs

cs–stby

Ipk

V

stby

cs–th

R

where: Y

= I /V

cs–stby cs cs–th

Taking into account the circuit propagation delay ( t ) and the Power Switch reaction time ( t ):

cs ps

EQUATION 12

1

(R

Y

)

V

( t

t

)

ps

cs

cs–stby

cs

in

Ipk

V

stby

cs–th

R

L

p

S

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10

MC44608

60

50

5.08

5.07

5.06

5.05

t_rise

85° C

5.04

5.03

40

30

20

10

t_fall

25° C

5.02

5.01

–25° C

5.00

4.99

4.98

0.5

1

1.5

Current Injected in Pin 3 (mA)

2

2.5

10

11

12

13

14

15

Pin6 V Voltage (V)

CC

Figure 8. Output Switching Speed

Figure 11. Vpin3 During the Working Period

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

79.0

77.0

85° C

–25° C

75.0

25° C

73.0

71.0

85° C

69.0

67.0

65.0

10

11

12

13

14

15

–1.6

–1.4

–1.2

–1.0 –.08

–.06

–.04

–.02

0.0

V

CC

Voltage (V)

Current Injected in Pin 3 (mA)

Figure 12. Vpin3 During the Latched Off Period

Figure 9. Frequency Stability

4.80

4.60

4.40

4.20

4.00

90

80

70

60

50

40

–25° C

85° C

25° C

3.80

3.60

3.40

3.20

3.00

–25° C

30

20

10

0

85° C

25° C

0.0

0.5

1.0

1.5

2.0

2.5

10

11

12

13

14

15

Current Injected in Pin3 (mA)

Pin6 V Voltage (V)

CC

Figure 10. Duty Cycle Control

Figure 13. Device Consumption when Switching

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11

MC44608

Figure 14. High Voltage Current Source

Figure 15. Overload Burst Mode

11.00

10.00

9.00

12.00

–25° C

11.00

10.00

–25° C

9.00

8.00

7.00

6.00

25° C

85° C

8.00

25° C

85° C

7.00

6.00

5.00

500

0

100

200

300

400

0

100

200

300

400

500

Vi Pin8 Voltage (Vi)

Vi Pin Voltage (V)

Figure 16. Hiccup Mode Waveforms

The data in Figure 15 corresponds to the waveform in

Figure16.TheFigure16showsV ,I ,I (pin2)and

CC CC sense

(pin 5). V (pin 5) in fact shows the envelope of the

V

out

output switching pulses. This mode corresponds to an

overload condition.

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12

MC44608

The Figure 18 represents a complete power supply using the secondary reconfiguration.

The specification is as follows:

Input source:

3 Outputs

85Vac to 265Vac

112V / 0.45A

16V / 1.5A

8V / 1A

Output power

80W

Stand–by mode

@ Pout = 300mW, 1.3W

R F6

47288900

FI

C20

2N2FY

C11

220 pF

500 V

RFI

FILTER

WIDE

AINS

C1

100 nF

R16

4.7 k

4 kV

D18

MR856

112 V/0.45 A

1

14

C3

1 nF

D1, D2, D3, D4

1N5404

+

C12

C13

100 nF

47

250 V

F

J3

2

12

C5

3

+

C17

120 pF

R7

47 k

R1

22 k

5 W

220

F

16 V/1.5 A

400 V

C4

1 nF

D12

1N4934

C6

47 nF

630 V

1

D6

MR856

R5

J4

2

D5

1N4007

DZ1

MCR22–6

100 k

D9

3

MR852

1

6

7

11

10

8 V/1 A

D7

C14

1000

35 V

+

1N4148

F

1

8

C7

22

I

sense

+

F

2

3

4

7

6

5

C16

120 pF

16 V

R19

V

CC

C9

18 k

D13

470 pF

630 V

R2

10

1N4148

D10

MR852

D14

MR856

MTP6N60E

8

Post

Reg.

C8

100 nF

R17

2.2 k

5 W

P

+

C15

R4

3.9 k

1000

F

16 V

9

R3

0.27

R21

R9

100 k

47

OPT1

C18

100 nF

R12

1 k

R10

10 k

C19

33 nF

DZ3

10 V

ON

OFF

R11

4.7 k

DZ2

TL431CLP

R8

2.4 k

ON = Normal Mode

OFF = Pulsed Mode

Figure 17. Typical Application

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13

MC44608

The secondary reconfiguration is activated by the µP

applied to the secondary windings 12–14, 10–11 and 6–7

(Vaux) are thus divided by ratio N12–14 / N9–8 (number of

turns of the winding 12–14 over number of turns of the

winding 9–8). In this reconfigured status all the secondary

voltages are lowered except the 8V one. The regulation

during every pulsed or burst is performed by the zener diode

DZ3 which value has to be choosen higher than the normal

mode regulation level. This working mode creates a voltage

ripple on the 8V rail which generally must be post regulated

for the microProcessor supply.

through the switch. The dV/dt appearing on the high voltage

winding (pins 14 of the transformer) at every TMOS switch

off, produces a current spike through the series RC network

R7, C17. According to the switch position this spike is either

absorbed by the ground (switch closed) or flows into the

thyristor gate (switch open) thus firing the MCR22–6. The

closed position of the switch corresponds to the Pulsed

Mode activation. In this secondary side SMPS status the

high voltage winding (12–14) is connected through D12 and

DZ1 to the 8V low voltage secondary rail. The voltages

Figure 18. SMPS Pulsed Mode

The Figure 18 shows the SMPS behavior while working

is the result of the 200µA current source activated during the

start–up phase and also during the working phase which

flows through the R4 resistor. The used high resolution

mode of the oscilloscope does not allow to show the

effective ton current flowing in the sensing resistor R11.

in the reconfigured mode. The top curve represents the V

CC

voltage (pin 6 of the MC44608). The middle curve

represents the 8V rail. The regulation is taking place at

11.68V. Onthe bottom curve the pin2voltage isshown. This

voltagerepresentsthecurrentsensesignal. Thepin2voltage

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14

MC44608

PACKAGE DIMENSIONS

DIP–8

P SUFFIX

PLASTIC PACKAGE

CASE 626–05

ISSUE K

NOTES:

1. DIMENSION L TO CENTER OF LEAD WHEN

FORMED PARALLEL.

2. PACKAGE CONTOUR OPTIONAL (ROUND OR

SQUARE CORNERS).

8

5

3. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

–B–

MILLIMETERS

DIM MIN MAX

9.40 10.16 0.370 0.400

INCHES

MIN MAX

1

4

A

B

C

D

F

6.10

3.94

0.38

1.02

6.60 0.240 0.260

4.45 0.155 0.175

0.51 0.015 0.020

1.78 0.040 0.070

F

–A–

NOTE 2

L

G

H

J

K

L

2.54 BSC

0.100 BSC

1.27 0.030 0.050

0.30 0.008 0.012

0.76

0.20

2.92

3.43

0.115

0.135

C

7.62 BSC

0.300 BSC

M

N

–––

0.76

10

–––

10

1.01 0.030 0.040

J

–T–

SEATING

PLANE

N

STYLE 1:

PIN 1. AC IN

M

2. DC + IN

3. DC – IN

4. AC IN

D

K

G

H

5. GROUND

6. OUTPUT

7. AUXILIARY

M

0.13 (0.005)

T A

B

8. V

CC

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15

MC44608

ON Semiconductor and

are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes

withoutfurthernoticetoanyproductsherein. SCILLCmakesnowarranty,representationorguaranteeregardingthesuitabilityofitsproductsforanyparticular

purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,

including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or

specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be

validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.

SCILLCproductsarenotdesigned, intended, orauthorizedforuseascomponentsinsystemsintendedforsurgicalimplantintothebody, orotherapplications

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PUBLICATION ORDERING INFORMATION

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CENTRAL/SOUTH AMERICA:

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P.O. Box 5163, Denver, Colorado 80217 USA

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German Phone: (+1) 303–308–7140 (M–F 1:00pm to 5:00pm Munich Time)

Email: ONlit–german@hibbertco.com

JAPAN: ON Semiconductor, Japan Customer Focus Center

4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–8549

Phone: 81–3–5740–2745

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Email: ONlit–french@hibbertco.com

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Email: ONlit@hibbertco.com

Email: r14525@onsemi.com

ON Semiconductor Website: http://onsemi.com

EUROPEAN TOLL–FREE ACCESS*: 00–800–4422–3781

For additional information, please contact your local

Sales Representative.

*Available from Germany, France, Italy, England, Ireland

MC44608/D

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16


型号：	MC44608
厂家：	ONSEMI
描述：	Few External Components Reliable Flexible GreenLine Very High Voltage PWM Controller 很少的外部元件的可靠灵活的绿线非常高电压PWM控制器控制器
文件：	总16页 (文件大小：269K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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