MC74AC138MR1 [ONSEMI]
AC SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, PDSO16, PLASTIC, EIAJ, SOP-16;
| 型号： | MC74AC138MR1 |
| 厂家： | 
ONSEMI |
| 描述： | AC SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, PDSO16, PLASTIC, EIAJ, SOP-16 驱动 输入元件 光电二极管 输出元件 逻辑集成电路 |
| 文件： | 总11页 (文件大小：185K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MC74AC138, MC74ACT138
1−of−8
Decoder/Demultiplexer
The MC74AC138/74ACT138 is a high−speed 1−of−8
decoder/demultiplexer. This device is ideally suited for high−speed
bipolar memory chip select address decoding.
The multiple input enables allow parallel expansion to a 1−of−24
decoder using just three MC74AC138/74ACT138 devices or a
1−of−32decoder using four MC74AC138/74ACT138 devices and one
inverter.
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DIP−16
N SUFFIX
CASE 648
• Demultiplexing Capability
16
• Multiple Input Enable for Easy Expansion
• Active LOW Mutually Exclusive Outputs
• Outputs Source/Sink 24 mA
1
SO−16
• ′ACT138 Has TTL Compatible Inputs
D SUFFIX
CASE 751B
16
w These devices are available in Pb−free package(s). Specifications herein
apply to both standard and Pb−free devices. Please see our website at
www.onsemi.com for specific Pb−free orderable part numbers, or
contact your local ON Semiconductor sales office or representative.
1
TSSOP−16
DT SUFFIX
CASE 948F
16
V
CC
O
0
O
1
O
2
O
3
O
4
O
5
O
6
1
16
15
14
13
12
11
10
9
EIAJ−16
M SUFFIX
CASE 966
16
1
ORDERING INFORMATION
1
2
3
4
5
6
7
8
Device
Package
Shipping
A
0
A
1
A
2
E
1
E
2
E
3
O
7
GND
MC74AC138N
MC74ACT138N
MC74AC138D
MC74ACT138D
MC74AC138DR2
25 Units/Rail
25 Units/Rail
48 Units/Rail
48 Units/Rail
PDIP−16
PDIP−16
SOIC−16
SOIC−16
Figure 1. Pinout: 16−Lead Packages Conductors
(Top View)
A
0
A
1
A
2
E
1
E
2
E
3
SOIC−16 2500 Tape & Reel
MC74ACT138DR2
MC74AC138DT
2500 Tape & Reel
96 Units/Rail
SOIC−16
O
0
O O O O O O O
1 2 3 4 5 6 7
TSSOP−16
MC74ACT138DT
MC74AC138DTR2
MC74ACT138DTR2
MC74AC138M
96 Units/Rail
2500 Tape & Reel
2500 Tape & Reel
50 Units/Rail
TSSOP−16
TSSOP−16
TSSOP−16
EIAJ−16
Figure 2. Logic Symbol
PIN ASSIGNMENT
50 Units/Rail
MC74ACT138M
MC74AC138MEL
MC74ACT138MEL
EIAJ−16
PIN
A −A
FUNCTION
Address Inputs
Enable Inputs
Enable Input
Outputs
2000 Tape & Reel
2000 Tape & Reel
EIAJ−16
0
2
EIAJ−16
E −E
1
3
2
DEVICE MARKING INFORMATION
E
See general marking information in the device marking
section on page 6 of this data sheet.
O −O
0
7
© Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
March, 2006 − Rev. 6
MC74AC138/D
MC74AC138, MC74ACT138
FUNCTIONAL DESCRIPTION
HIGH. This multiple enabled function allows easy parallel
expansion of the device to a 1−of−32 (5 lines to 32 lines)
decoder with just four MC74AC138/74ACT138 devices
The MC74AC138/74ACT138 high−speed 1−of−8
decoder/demultiplexer accepts three binary weighted inputs
(A , A , A ) and, when enabled, provides eight mutually
and
one
inverter
(See
Figure
4).
The
0
1
2
MC74AC138/74ACT138 can be used as an 8−output
demultiplexer by using one of the active LOW Enable inputs
as the data input and the other Enable inputs as strobes. The
Enable inputs which are not used must be permanently tied
to their appropriate active−HIGH or active−LOW state.
exclusive
MC74AC138/74ACT138 features three Enable inputs, two
active−LOW (E , E ) and one active−HIGH (E ). All
active−LOW
outputs
(O −O ).
The
0
7
1
2
3
outputs will be HIGH unless E and E are LOW and E is
1
2
3
TRUTH TABLE
Inputs
Outputs
E
1
E
2
E
3
A
0
A
1
A
2
O
O
O
O
O
O
O
O
7
0
1
2
3
4
5
6
H
X
X
X
X
X
H
H
H
H
H
H
H
H
X
X
H
X
X
L
X
X
X
X
X
X
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
H
H
H
H
L
H
L
L
L
H
H
L
L
L
L
L
H
H
H
H
L
H
H
H
H
L
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
H
H
H
H
L
H
L
L
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
L
H
H
H
H
L
H
H
H
L
H
H
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
E
1
E E
2 3
A
2
A
1
A
0
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
NOTE: This diagram is provided only for the understanding of logic
operations and should not be used to estimate propagation
delays.
Figure 3. Logic Diagram
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2
MC74AC138, MC74ACT138
A
0
A
1
A
2
′04
A
A
3
4
H
123
123
123
E
123
E
A
A
0
A
E
A
A
A
0
E
A
0
A
A
A
A
A
2
0
1
2
0
1
2
0
1
2
0
1
0
0
0
0
3
0
4
0
5
0
6
0
0
0
0
1
0
2
0
4
0
5
0
6
0
0
0
0
0
0
4
0
5
0
0
7
0
0
0
1
0
2
0
0 0 0 0
3 4 5 6 7
1
2
7
3
7
1
2
3
6
0
0
0
31
Figure 4. Expansion to 1−of−32 Decoding
MAXIMUM RATINGS*
Symbol
Parameter
Value
−0.5 to +7.0
−0.5 to V +0.5
Unit
V
V
V
V
DC Supply Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
CC
IN
V
CC
−0.5 to V +0.5
V
OUT
CC
I
I
I
±20
±50
mA
mA
mA
°C
IN
DC Output Sink/Source Current, per Pin
OUT
CC
DC V or GND Current per Output Pin
±50
CC
T
stg
Storage Temperature
−65 to +150
*Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recom-
mended Operating Conditions.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
2.0
4.5
0
Typ
5.0
5.0
−
Max
6.0
Unit
′AC
V
V
Supply Voltage
V
V
CC
′ACT
5.5
, V
OUT
DC Input Voltage, Output Voltage (Ref. to GND)
V
CC
IN
V
CC
V
CC
V
CC
V
CC
V
CC
@ 3.0 V
@ 4.5 V
@ 5.5 V
@ 4.5 V
@ 5.5 V
−
150
40
25
10
8.0
−
−
Input Rise and Fall Time (Note 1)
′AC Devices except Schmitt Inputs
−
−
−
−
−
ns/V
t , t
r
f
−
−
Input Rise and Fall Time (Note 2)
′ACT Devices except Schmitt Inputs
t , t
ns/V
r
f
−
T
J
Junction Temperature (PDIP)
Operating Ambient Temperature Range
Output Current − High
−
140
85
°C
°C
T
A
−40
−
25
−
I
−24
24
mA
mA
OH
OL
I
Output Current − Low
−
−
1. V from 30% to 70% V ; see individual Data Sheets for devices that differ from the typical input rise and fall times.
IN
CC
2. V from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
IN
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3
MC74AC138, MC74ACT138
DC CHARACTERISTICS
Symbol
74AC
74AC
T
A
=
V
(V)
CC
T
= +25°C
−40°C to
+85°C
Parameter
Unit
Conditions
A
Typ
Guaranteed Limits
V
V
V
3.0
4.5
5.5
1.5
2.25
2.75
2.1
3.15
3.85
2.1
3.15
3.85
V
= 0.1 V
Minimum High Level
Input Voltage
IH
OUT
V
V
V
or V − 0.1 V
CC
3.0
4.5
5.5
1.5
2.25
2.75
0.9
1.35
1.65
0.9
1.35
1.65
V
OUT
= 0.1 V
Maximum Low Level
Input Voltage
IL
or V − 0.1 V
CC
3.0
4.5
5.5
2.99
4.49
5.49
2.9
4.4
5.4
2.9
4.4
5.4
I
= −50 μA
Minimum High Level
Output Voltage
OH
OUT
*V = V or V
IH
IN
IL
3.0
4.5
5.5
−
−
−
2.56
3.86
4.86
2.46
3.76
4.76
−12 mA
−24 mA
−24 mA
V
V
I
OH
V
OL
3.0
4.5
5.5
0.002
0.001
0.001
0.1
0.1
0.1
0.1
0.1
0.1
I
= 50 μA
OUT
Maximum Low Level
Output Voltage
*V = V or V
IN
IL
IH
3.0
4.5
5.5
−
−
−
0.36
0.36
0.36
0.44
0.44
0.44
12 mA
24 mA
24 mA
V
I
OL
I
IN
Maximum Input
Leakage Current
5.5
−
±0.1
±1.0
μA
V = V , GND
I
CC
I
I
I
5.5
5.5
−
−
−
−
75
mA
mA
V
V
= 1.65 V Max
= 3.85 V Min
†Minimum Dynamic
Output Current
OLD
OHD
CC
OLD
−75
OHD
Maximum Quiescent
Supply Current
5.5
−
8.0
80
μA
V
= V or GND
IN CC
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
NOTE:
I
IN
and I @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V V
.
CC
CC
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4
MC74AC138, MC74ACT138
AC CHARACTERISTICS (For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
74AC
74AC
T
= −40°C
A
T
= +25°C
V
(V)
*
Fig.
No.
A
CC
to +85°C
C = 50 pF
Symbol
Parameter
Unit
C = 50 pF
L
L
Min
Typ
Max
Min
Max
3.3
5.0
1.5
1.5
8.5
6.5
13.0
9.5
1.5
1.5
15.0
10.5
Propagation Delay
A to O
t
t
t
t
t
t
ns
ns
ns
ns
ns
ns
3−6
3−6
3−6
3−6
3−6
3−6
PLH
n
n
3.3
5.0
1.5
1.5
8.0
6.0
12.5
9.0
1.5
1.5
14.0
10.5
Propagation Delay
A to O
PHL
PLH
PHL
PLH
PHL
n
n
3.3
5.0
1.5
1.5
11.0
8.0
15.0
11.0
1.5
1.5
16.0
12.0
Propagation Delay
E or E to O
1
2
n
3.3
5.0
1.5
1.5
9.5
7.0
13.5
9.5
1.5
1.5
15.0
10.5
Propagation Delay
E or E to O
1
2
n
3.3
5.0
1.5
1.5
11.0
8.0
15.5
11.0
1.5
1.5
16.5
12.5
Propagation Delay
E to O
3
n
3.3
5.0
1.5
1.5
8.5
6.0
13.0
8.0
1.5
1.0
14.0
9.5
Propagation Delay
E to O
3
n
*Voltage Range 3.3 V is 3.3 V ±0.3 V.
*Voltage Range 5.0 V is 5.0 V ±0.5 V.
DC CHARACTERISTICS
74ACT
74ACT
T
=
A
V
(V)
CC
T
A
= +25°C
−40°C to
+85°C
Symbol
Parameter
Unit
Conditions
Typ
Guaranteed Limits
V
V
V
4.5
5.5
1.5
1.5
2.0
2.0
2.0
2.0
V
= 0.1 V
Minimum High Level
Input Voltage
IH
OUT
V
V
V
or V − 0.1 V
CC
4.5
5.5
1.5
1.5
0.8
0.8
0.8
0.8
V
OUT
= 0.1 V
Maximum Low Level
Input Voltage
IL
or V − 0.1 V
CC
4.5
5.5
4.49
5.49
4.4
5.4
4.4
5.4
I
= −50 μA
Minimum High Level
Output Voltage
OH
OUT
*V = V or V
IH
IN
IL
4.5
5.5
−
−
3.86
4.86
3.76
4.76
V
V
−24 mA
−24 mA
I
OH
V
OL
4.5
5.5
0.001
0.001
0.1
0.1
0.1
0.1
I
= 50 μA
Maximum Low Level
Output Voltage
OUT
*V = V or V
IN
IL
IH
4.5
5.5
−
−
0.36
0.36
0.44
0.44
V
24 mA
24 mA
I
OL
I
IN
Maximum Input
Leakage Current
5.5
−
±0.1
±1.0
μA
V = V , GND
I CC
ΔI
Additional Max. I /Input
5.5
5.5
5.5
0.6
−
−
−
−
1.5
75
mA
mA
mA
V = V − 2.1 V
CCT
CC
I
CC
I
V
= 1.65 V Max
†Minimum Dynamic
Output Current
OLD
OLD
OHD
I
I
−
−75
V
= 3.85 V Min
OHD
CC
Maximum Quiescent
Supply Current
5.5
−
8.0
80
μA
V = V or GND
IN CC
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
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5
MC74AC138, MC74ACT138
AC CHARACTERISTICS (For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
74ACT
74ACT
T
= −40°C
A
T
= +25°C
V
(V)
*
Fig.
No.
A
CC
to +85°C
C = 50 pF
Symbol
Parameter
Unit
C = 50 pF
L
L
Min
Typ
Max
Min
Max
Propagation Delay
A to O
t
t
t
t
t
t
5.0
5.0
5.0
5.0
5.0
5.0
1.5
7.0
10.5
1.5
11.5
ns
ns
ns
ns
ns
ns
3−6
3−6
3−6
3−6
3−6
3−6
PLH
n
n
Propagation Delay
A to O
1.5
2.5
2.0
2.5
2.0
6.5
8.0
7.5
8.0
6.5
10.5
11.5
11.5
12.0
10.5
1.5
2.0
2.0
2.0
1.5
11.5
12.5
12.5
13.0
11.5
PHL
PLH
PHL
PLH
PHL
n
n
Propagation Delay
E or E to O
1
2
n
Propagation Delay
E or E to O
1
2
n
Propagation Delay
E
3 to
O
n
Propagation Delay
E to O
3
n
*Voltage Range 5.0 V is 5.0 V ± 0.5 V
CAPACITANCE
Symbol
Value
Typ
Parameter
Unit
Test Conditions
C
C
Input Capacitance
4.5
60
pF
pF
V
V
= 5.0 V
= 5.0 V
IN
CC
Power Dissipation Capacitance
PD
CC
MARKING DIAGRAMS
DIP−16
SO−16
TSSOP−16
EIAJ−16
MC74AC138N
AWLYYWW
AC138
AWLYWW
74AC138
ALYW
AC
138
ALYW
ACT138
AWLYWW
MC74ACT138N
AWLYYWW
74ACT138
ALYW
ACT
138
ALYW
A
= Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
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6
MC74AC138, MC74ACT138
PACKAGE DIMENSIONS
PDIP−16
N SUFFIX
16 PIN PLASTIC DIP PACKAGE
CASE 648−08
ISSUE R
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
−A−
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
16
1
9
8
B
S
INCHES
DIM MIN MAX
MILLIMETERS
MIN
18.80
6.35
3.69
0.39
1.02
MAX
19.55
6.85
4.44
0.53
1.77
F
A
B
C
D
F
0.740
0.250
0.145
0.015
0.040
0.770
0.270
0.175
0.021
0.70
C
L
SEATING
PLANE
−T−
G
H
J
0.100 BSC
0.050 BSC
2.54 BSC
1.27 BSC
K
M
0.008
0.015
0.130
0.305
10
0.21
0.38
3.30
7.74
10
H
J
K
L
0.110
0.295
0
2.80
7.50
0
G
D 16 PL
M
S
_
_
_
_
0.020
0.040
0.51
1.01
M
M
0.25 (0.010)
T A
SO−16
D SUFFIX
16 PIN PLASTIC SOIC PACKAGE
CASE 751B−05
ISSUE J
−A−
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
16
9
8
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
−B−
P 8 PL
M
S
B
0.25 (0.010)
1
G
MILLIMETERS
INCHES
MIN
0.386
DIM MIN
MAX
MAX
0.393
0.157
0.068
0.019
0.049
F
A
B
C
D
F
9.80
3.80
1.35
0.35
0.40
10.00
R X 45
K
_
4.00 0.150
1.75 0.054
0.49 0.014
1.25 0.016
C
G
J
1.27 BSC
0.050 BSC
−T−
SEATING
PLANE
0.19
0.10
0
0.25 0.008
0.25 0.004
0.009
0.009
7
J
M
K
M
P
R
D
16 PL
7
0
_
_
_
_
5.80
0.25
6.20 0.229
0.50 0.010
0.244
0.019
M
S
S
A
0.25 (0.010)
T
B
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7
MC74AC138, MC74ACT138
PACKAGE DIMENSIONS
TSSOP−16
DT SUFFIX
16 PIN PLASTIC TSSOP PACKAGE
CASE948F−01
ISSUE O
16X KREF
M
S
S
0.10 (0.004)
T
U
V
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH.
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED
0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
S
U
0.15 (0.006) T
K
K1
16
9
2X L/2
J1
B
SECTION N−N
L
−U−
J
PIN 1
IDENT.
8
1
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE −W−.
N
0.25 (0.010)
S
0.15 (0.006) T
U
A
M
MILLIMETERS
INCHES
MIN
−V−
DIM MIN
MAX
5.10
4.50
1.20
0.15
0.75
MAX
0.200
0.177
0.047
0.006
0.030
A
B
4.90
4.30
−−−
0.193
0.169
−−−
N
C
F
DETAIL E
D
0.05
0.50
0.002
0.020
F
G
H
0.65 BSC
0.026 BSC
0.18
0.09
0.09
0.19
0.19
0.28
0.20
0.16
0.30
0.25
0.007
0.004
0.004
0.007
0.007
0.011
0.008
0.006
0.012
0.010
J
J1
K
−W−
C
K1
L
6.40 BSC
_
0.252 BSC
0
0.10 (0.004)
M
0
8
8
_
_
_
DETAIL E
H
SEATING
PLANE
−T−
D
G
EIAJ−16
M SUFFIX
16 PIN PLASTIC EIAJ PACKAGE
CASE966−01
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
ISSUE O
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
L
16
9
E
Q
1
H
E
M
_
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
E
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
1
8
L
DETAIL P
Z
D
VIEW P
e
MILLIMETERS
INCHES
MIN
−−−
A
DIM MIN
MAX
MAX
0.081
0.008
0.020
0.011
0.413
0.215
c
A
−−−
0.05
0.35
0.18
9.90
5.10
2.05
A
1
0.20 0.002
0.50 0.014
0.27 0.007
b
c
D
E
10.50 0.390
5.45 0.201
A
1
b
0.13 (0.005)
e
1.27 BSC
0.050 BSC
0.10 (0.004)
M
H
7.40
0.50
1.10
8.20 0.291
0.85 0.020
1.50 0.043
0.323
0.033
0.059
E
L
L
E
M
Q
0
10
0.90 0.028
10
_
0.035
0.031
0
_
_
_
0.70
−−−
1
Z
0.78
−−−
http://onsemi.com
8
MC74AC138, MC74ACT138
Notes
http://onsemi.com
9
MC74AC138, MC74ACT138
Notes
http://onsemi.com
10
MC74AC138, MC74ACT138
Notes
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
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Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
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Order Literature: http://www.onsemi.com/litorder
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For additional information, please contact your
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MC74AC138/D
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