MC74ACT04N [ONSEMI]
Hex Inverter; 六反相器
ONSEMI 
MC74AC04, MC74ACT04
Hex Inverter
• Outputs Source/Sink 24 mA
• ′ACT04 Has TTL Compatible Inputs
V
CC
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14
13
12
11
10
9
8
PDIP–14
N SUFFIX
CASE 646
14
1
SO–14
D SUFFIX
CASE 751A
1
2
3
4
5
6
7
14
1
GND
Figure 1. Pinout: 14–Lead Packages Conductors
TSSOP–14
DT SUFFIX
CASE 948G
(Top View)
14
1
MAXIMUM RATINGS*
Rating
Symbol
Value
Unit
EIAJ–14
M SUFFIX
CASE 965
DC Supply Voltage (Referenced to GND)
V
CC
–0.5 to
+7.0
V
14
1
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
V
in
–0.5 to
V
V
V
+0.5
CC
ORDERING INFORMATION
V
out
–0.5 to
V
+0.5
Device
Package
PDIP–14
PDIP–14
SOIC–14
Shipping
CC
±20
DC Input Current, per Pin
I
in
mA
mA
mA
°C
MC74AC04N
MC74ACT04N
MC74AC04D
MC74AC04DR2
25 Units/Rail
25 Units/Rail
55 Units/Rail
DC Output Sink/Source Current, per Pin
I
±50
±50
out
CC
DC V
or GND Current per Output Pin
Storage Temperature
I
CC
T
stg
–65 to
+150
SOIC–14 2500 Tape & Reel
SOIC–14 55 Units/Rail
SOIC–14 2500 Tape & Reel
TSSOP–14 96 Units/Rail
TSSOP–14 2500 Tape & Reel
TSSOP–14 96 Units/Rail
MC74ACT04D
MC74ACT04DR2
MC74AC04DT
MC74AC04DTR2
MC74ACT04DT
*Maximum Ratings are those values beyond which damage to the device may
occur. Functional operation should be restricted to the Recommended Operating
Conditions.
MC74ACT04DTR2 TSSOP–14 2500 Tape & Reel
MC74AC04M
EIAJ–14
50 Units/Rail
MC74AC04MEL
EIAJ–14 2000 Tape & Reel
MC74ACT04M
EIAJ–14
50 Units/Rail
MC74ACT04MEL
EIAJ–14 2000 Tape & Reel
DEVICE MARKING INFORMATION
See general marking information in the device marking
section on page 5 of this data sheet.
Semiconductor Components Industries, LLC, 2001
1
Publication Order Number:
May, 2001 – Rev. 5
MC74AC04/D
MC74AC04, MC74ACT04
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Typ
5.0
5.0
–
Max
6.0
Unit
′AC
2.0
4.5
0
V
Supply Voltage
V
V
CC
′ACT
5.5
V , V
in out
DC Input Voltage, Output Voltage (Ref. to GND)
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
@ 3.0 V
@ 4.5 V
@ 5.5 V
@ 4.5 V
@ 5.5 V
–
150
40
25
10
8.0
–
–
Input Rise and Fall Time (Note 1)
′AC Devices except Schmitt Inputs
–
–
–
–
–
ns/V
t , t
r f
–
–
Input Rise and Fall Time (Note 2)
′ACT Devices except Schmitt Inputs
t , t
r f
ns/V
–
T
J
Junction Temperature (PDIP)
Operating Ambient Temperature Range
Output Current – High
–
140
85
°C
°C
T
A
–40
–
25
–
I
–24
24
mA
mA
OH
OL
I
Output Current – Low
–
–
1. V from 30% to 70% V ; see individual Data Sheets for devices that differ from the typical input rise and fall times.
in
CC
2. V from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
in
DC CHARACTERISTICS
74AC
74AC
T
=
A
V
(V)
CC
T
A
= +25°C
–40°C to
+85°C
Symbol
Parameter
Unit
Conditions
Typ
Guaranteed Limits
V
V
V
3.0
4.5
5.5
1.5
2.25
2.75
2.1
3.15
3.85
2.1
3.15
3.85
V
= 0.1 V
– 0.1 V
Minimum High Level
Input Voltage
IH
OUT
V
V
V
or V
CC
= 0.1 V
OUT
3.0
4.5
5.5
1.5
2.25
2.75
0.9
1.35
1.65
0.9
1.35
1.65
V
Maximum Low Level
Input Voltage
IL
or V
– 0.1 V
CC
3.0
4.5
5.5
2.99
4.49
5.49
2.9
4.4
5.4
2.9
4.4
5.4
I
= –50 µA
Minimum High Level
Output Voltage
OH
OUT
*V = V or V
IN IL IH
3.0
4.5
5.5
–
–
–
2.56
3.86
4.86
2.46
3.76
4.76
–12 mA
–24 mA
–24 mA
V
V
I
OH
V
OL
3.0
4.5
5.5
0.002
0.001
0.001
0.1
0.1
0.1
0.1
0.1
0.1
I = 50 µA
OUT
Maximum Low Level
Output Voltage
*V = V or V
IN IL
IH
3.0
4.5
5.5
–
–
–
0.36
0.36
0.36
0.44
0.44
0.44
12 mA
V
I
24 mA
24 mA
OL
I
IN
Maximum Input
Leakage Current
5.5
–
±0.1
±1.0
µA
V = V , GND
I
CC
I
I
I
5.5
5.5
–
–
–
–
75
mA
mA
V
V
= 1.65 V Max
†Minimum Dynamic
Output Current
OLD
OHD
CC
OLD
–75
= 3.85 V Min
OHD
Maximum Quiescent
Supply Current
5.5
–
4.0
40
µA
V
IN
= V or GND
CC
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
NOTE:
I
IN
and I
@ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V V
.
CC
CC
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2
MC74AC04, MC74ACT04
AC CHARACTERISTICS (For Figures and Waveforms – See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
74AC
74AC
T
= –40°C
A
T
C
= +25°C
= 50 pF
V
(V)
*
Fig.
No.
A
L
CC
to +85°C
C
Symbol
Parameter
Unit
= 50 pF
L
Min
Typ
Max
Min
Max
3.3
5.0
1.5
1.5
4.5
4.0
9.0
7.0
1.0
1.0
10
7.5
t
t
Propagation Delay
Propagation Delay
ns
ns
3–5
3–5
PLH
3.3
5.0
1.5
1.5
4.5
3.5
8.5
6.5
1.0
1.0
9.5
7.0
PHL
*Voltage Range 3.3 V is 3.3 V ±0.3 V.
Voltage Range 5.0 V is 5.0 V ±0.5 V.
DC CHARACTERISTICS
74ACT
74ACT
T
=
A
V
(V)
CC
T
A
= +25°C
–40°C to
+85°C
Symbol
Parameter
Unit
Conditions
Typ
Guaranteed Limits
V
V
V
4.5
5.5
1.5
1.5
2.0
2.0
2.0
2.0
V
or V
= 0.1 V
Minimum High Level
Input Voltage
IH
OUT
V
V
V
– 0.1 V
CC
4.5
5.5
1.5
1.5
0.8
0.8
0.8
0.8
V
OUT
= 0.1 V
Maximum Low Level
Input Voltage
IL
or V
– 0.1 V
CC
4.5
5.5
4.49
5.49
4.4
5.4
4.4
5.4
I
= –50 µA
Minimum High Level
Output Voltage
OH
OUT
*V = V or V
IN IL IH
4.5
5.5
–
–
3.86
4.86
3.76
4.76
V
V
V
–24 mA
–24 mA
I
OH
V
OL
4.5
5.5
0.001
0.001
0.1
0.1
0.1
0.1
I = 50 µA
OUT
Maximum Low Level
Output Voltage
*V = V or V
IN IL
IH
4.5
5.5
–
–
0.36
0.36
0.44
0.44
24 mA
24 mA
I
OL
I
IN
Maximum Input
Leakage Current
5.5
–
±0.1
±1.0
µA
V = V , GND
I
CC
∆I
Additional Max. I /Input
CC
5.5
5.5
5.5
0.6
–
–
–
–
1.5
75
mA
mA
mA
V = V
I
– 2.1 V
CCT
CC
I
V
= 1.65 V Max
= 3.85 V Min
OHD
†Minimum Dynamic
Output Current
OLD
OLD
I
–
–75
V
V
OHD
CC
I
Maximum Quiescent
Supply Current
5.5
–
4.0
40
µA
= V or GND
CC
IN
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
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3
MC74AC04, MC74ACT04
AC CHARACTERISTICS (For Figures and Waveforms – See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
74ACT
74ACT
T
= –40°C
A
T
C
= +25°C
= 50 pF
V
(V)
*
Fig.
No.
A
L
CC
to +85°C
C
Symbol
Parameter
Unit
= 50 pF
Max
9.0
L
Min
1.5
1.5
Typ
Max
8.5
Min
1.0
1.0
t
t
Propagation Delay
Propagation Delay
5.0
5.0
ns
ns
3–6
3–6
PLH
8.0
8.5
PHL
*Voltage Range 5.0 V is 5.0 V ±0.5 V.
CAPACITANCE
Symbol
Value
Typ
Parameter
Unit
Test Conditions
C
C
Input Capacitance
Power Dissipation Capacitance
4.5
30
pF
pF
V
V
= 5.0 V
= 5.0 V
IN
CC
PD
CC
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4
MC74AC04, MC74ACT04
MARKING DIAGRAMS
PDIP–14
SO–14
TSSOP–14
EIAJ–14
MC74AC04N
AWLYYWW
AC04
AWLYWW
AC
04
ALYW
74AC04
ALYW
MC74ACT04N
AWLYYWW
ACT04
AWLYWW
ACT
04
ALYW
74ACT04
ALYW
A
= Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
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5
MC74AC04, MC74ACT04
PACKAGE DIMENSIONS
PDIP–14
N SUFFIX
14 PIN PLASTIC DIP PACKAGE
CASE 646–06
ISSUE M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
14
1
8
7
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD
FLASH.
5. ROUNDED CORNERS OPTIONAL.
B
INCHES
DIM MIN MAX
MILLIMETERS
A
F
MIN
18.16
6.10
3.69
0.38
1.02
MAX
18.80
6.60
4.69
0.53
1.78
A
B
C
D
F
0.715
0.240
0.145
0.015
0.040
0.770
0.260
0.185
0.021
0.070
L
N
C
G
H
J
0.100 BSC
2.54 BSC
0.052
0.008
0.115
0.290
---
0.095
0.015
0.135
0.310
10
1.32
0.20
2.92
7.37
---
2.41
0.38
3.43
7.87
10
–T–
SEATING
PLANE
K
L
J
K
M
N
_
_
0.015
0.039
0.38
1.01
D 14 PL
H
G
M
M
0.13 (0.005)
SO–14
D SUFFIX
14 PIN PLASTIC SOIC PACKAGE
CASE 751A–03
ISSUE F
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
–A–
14
8
7
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
–B–
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
P 7 PL
M
M
B
0.25 (0.010)
1
MILLIMETERS
INCHES
MIN
G
DIM MIN
MAX
8.75
4.00
1.75
0.49
1.25
MAX
0.344
0.157
0.068
0.019
0.049
F
R X 45
_
C
A
B
C
D
F
8.55
3.80
1.35
0.35
0.40
0.337
0.150
0.054
0.014
0.016
–T–
SEATING
PLANE
J
M
G
J
1.27 BSC
0.050 BSC
K
D 14 PL
0.19
0.10
0
0.25
0.25
7
0.008
0.004
0
0.009
0.009
7
M
S
S
A
0.25 (0.010)
T
B
K
M
P
R
_
_
_
_
5.80
0.25
6.20
0.50
0.228
0.010
0.244
0.019
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6
MC74AC04, MC74ACT04
PACKAGE DIMENSIONS
TSSOP–14
DT SUFFIX
14 PIN PLASTIC TSSOP PACKAGE
CASE 948G–01
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH
OR PROTRUSION SHALL NOT EXCEED
0.25 (0.010) PER SIDE.
14X K REF
M
S
S
0.10 (0.004)
T
U
V
S
0.15 (0.006) T
U
N
0.25 (0.010)
14
8
2X L/2
M
B
–U–
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
L
N
PIN 1
IDENT.
F
7
1
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
DETAIL E
7. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE -W-.
S
K
0.15 (0.006) T
U
A
MILLIMETERS
INCHES
MIN
K1
DIM MIN
MAX
5.10
4.50
1.20
0.15
0.75
MAX
0.200
0.177
0.047
0.006
0.030
–V–
A
B
4.90
4.30
---
0.193
0.169
---
J
J1
C
D
0.05
0.50
0.002
0.020
F
SECTION N–N
G
H
0.65 BSC
0.026 BSC
0.50
0.09
0.09
0.19
0.19
0.60
0.20
0.16
0.30
0.25
0.020
0.004
0.004
0.007
0.007
0.024
0.008
0.006
0.012
0.010
J
J1
K
–W–
C
K1
L
6.40 BSC
0.252 BSC
0
0.10 (0.004)
M
0
8
8
_
_
_
_
SEATING
PLANE
–T–
H
G
DETAIL E
D
EIAJ–14
M SUFFIX
14 PIN PLASTIC EIAJ PACKAGE
CASE 965–01
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
L
E
14
8
Q
1
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
H
E
E
_
M
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL
CONDITION. DAMBAR CANNOT BE LOCATED ON
THE LOWER RADIUS OR THE FOOT. MINIMUM
SPACE BETWEEN PROTRUSIONS AND
ADJACENT LEAD TO BE 0.46 ( 0.018).
L
7
1
DETAIL P
Z
D
MILLIMETERS
INCHES
MIN
VIEW P
DIM MIN
MAX
2.05
0.20
0.50
0.27
10.50
5.45
MAX
0.081
0.008
0.020
0.011
0.413
0.215
A
e
A
---
0.05
0.35
0.18
9.90
5.10
---
0.002
0.014
0.007
0.390
0.201
c
A
1
b
c
D
E
e
b
A
1
1.27 BSC
0.050 BSC
H
M
7.40
0.50
1.10
8.20
0.85
1.50
0.291
0.020
0.043
0.323
0.033
0.059
0.13 (0.005)
E
0.50
0.10 (0.004)
L
E
M
0
10
0
10
_
0.035
0.056
_
_
_
Q
1
Z
0.70
---
0.90
1.42
0.028
---
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7
MC74AC04, MC74ACT04
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death
may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
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MC74AC04/D
相关型号：
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