MC74ACT151 [ONSEMI]
1−of−8 Decoder/Demultiplexer; 1 - 8解码器/多路解复用器
| 型号： | MC74ACT151 |
| 厂家： | 
ONSEMI |
| 描述： | 1−of−8 Decoder/Demultiplexer |
| 文件： | 总10页 (文件大小：238K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MC74AC151, MC74ACT151
1−of−8
Decoder/Demultiplexer
The MC74AC151/74ACT151 is a high−speed 8−input digital
multiplexer. It provides, in one package, the ability to select one line of
data from up to eight sources. The MC74AC151/74ACT151 can be
used as a universal function generator to generate any logic function of
four variables. Both true and complementary outputs are provided.
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• Outputs Source/Sink 24 mA
• ′ACT151 Has TTL Compatible Inputs
DIP−16
N SUFFIX
CASE 648
16
V
I
I
I
I
S
S
S
2
CC
4
5
6
7
0
1
1
16
15
14
13
12
11
10
9
SO−16
D SUFFIX
CASE 751B
16
1
TSSOP−16
DT SUFFIX
CASE 948F
1
2
3
4
5
Z
6
Z
7
8
16
I
3
I
2
I
1
I
0
E
GND
1
Figure 1. Pinout: 16−Lead Packages Conductors
(Top View)
EIAJ−16
M SUFFIX
CASE 966
PIN ASSIGNMENT
16
1
PIN
I −I
FUNCTION
Data Inputs
0
7
ORDERING INFORMATION
S −S
Select Inputs
Enable Input
Data Output
0
2
Device
Package
Shipping
E
Z
Z
MC74AC151N
MC74ACT151N
MC74AC151D
MC74ACT151D
MC74AC151DR2
25 Units/Rail
25 Units/Rail
48 Units/Rail
48 Units/Rail
PDIP−16
PDIP−16
SOIC−16
SOIC−16
Inverted Data Output
TRUTH TABLE
Inputs
Outputs
SOIC−16 2500 Tape & Reel
E
S
S
S
0
Z
Z
L
2
1
MC74ACT151DR2
MC74AC151DT
2500 Tape & Reel
96 Units/Rail
SOIC−16
H
L
L
L
L
L
L
L
L
X
L
L
L
L
H
H
H
H
X
X
H
TSSOP−16
L
L
H
H
L
L
H
L
H
L
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
MC74ACT151DT
MC74AC151DTR2
MC74ACT151DTR2
MC74AC151M
96 Units/Rail
2500 Tape & Reel
2500 Tape & Reel
50 Units/Rail
TSSOP−16
TSSOP−16
TSSOP−16
EIAJ−16
L
H
H
H
L
H
50 Units/Rail
MC74ACT151M
EIAJ−16
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
DEVICE MARKING INFORMATION
See general marking information in the device marking
section on page 7 of this data sheet.
©
Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
June, 2006 − Rev. 6
MC74AC151/D
MC74AC151, MC74ACT151
E
I
0
I
1
I
2
I
3
I
4
I
5
I
6
I
7
S
S
0
1
S
2
Z
Z
Figure 2. Logic Symbol
Z = E•(I •S •S •S +I •S •S •S +
FUNCTIONAL DESCRIPTION
0
0
1
2
1
0
1
2
I •S •S •S +I •S •S •S +
2
0
1
2
3
0
1
2
The MC74AC151/74ACT151 is a logic implementation
of a single pole, 8−position switch with the switch position
I •S •S •S +I •S •S •S +
4 0 1 2 5 0 1 2
controlled by the state of three Select inputs, S , S , S . Both
0
1
2
I •S •S •S +I •S •S •S )
6
0
1
2
7
0
1
2
true and complementary outputs are provided. The Enable
input (E) is active LOW. When it is not activated, the
complementary output is HIGH and the true output is LOW
regardless of all other inputs. The logic function provided at
the output is:
The MC74AC151/74ACT151 provides the ability, in one
package, to select from eight sources of data or control
information. By proper manipulation of the inputs, the
MC74AC151/74ACT151 can provide any logic function of
four variables and its complement.
I
0
I
1
I
2
I
3
I
4
I
5
I
6
I
7
S
2
S
1
S
0
E
NOTE: This diagram is provided only for the
understanding of logic operations and
should not be used to estimate propagation
delays.
Z
Z
Figure 3. Logic Diagram
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2
MC74AC151, MC74ACT151
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
V
V
V
V
DC Supply Voltage (Referenced to GND)
−0.5 to +7.0
CC
IN
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
−0.5 to V +0.5
V
CC
−0.5 to V +0.5
V
OUT
CC
I
I
I
±20
±50
mA
mA
mA
°C
IN
DC Output Sink/Source Current, per Pin
OUT
CC
DC V or GND Current per Output Pin
±50
CC
T
stg
Storage Temperature
−65 to +150
*Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recom-
mended Operating Conditions.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
2.0
4.5
0
Typ
5.0
5.0
−
Max
6.0
Unit
′AC
V
V
Supply Voltage
V
V
CC
′ACT
5.5
, V
DC Input Voltage, Output Voltage (Ref. to GND)
V
CC
IN
OUT
V
V
V
V
V
@ 3.0 V
@ 4.5 V
@ 5.5 V
@ 4.5 V
@ 5.5 V
−
150
40
25
10
8.0
−
−
CC
CC
CC
CC
CC
Input Rise and Fall Time (Note 1)
′AC Devices except Schmitt Inputs
−
−
−
−
−
ns/V
t , t
r
f
−
−
Input Rise and Fall Time (Note 2)
′ACT Devices except Schmitt Inputs
t , t
ns/V
r
f
−
T
Junction Temperature (PDIP)
Operating Ambient Temperature Range
Output Current − High
−
140
85
°C
°C
J
T
A
−40
−
25
−
I
I
−24
24
mA
mA
OH
OL
Output Current − Low
−
−
1. V from 30% to 70% V ; see individual Data Sheets for devices that differ from the typical input rise and fall times.
IN
CC
2. V from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
IN
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3
MC74AC151, MC74ACT151
DC CHARACTERISTICS
Symbol
74AC
74AC
T
A
=
V
(V)
CC
T
= +25°C
−40°C to
+85°C
Parameter
Unit
Conditions
A
Typ
Guaranteed Limits
V
V
V
3.0
4.5
5.5
1.5
2.25
2.75
2.1
3.15
3.85
2.1
3.15
3.85
V
= 0.1 V
OUT
Minimum High Level
Input Voltage
IH
V
V
V
or V − 0.1 V
CC
3.0
4.5
5.5
1.5
2.25
2.75
0.9
1.35
1.65
0.9
1.35
1.65
V
= 0.1 V
OUT
Maximum Low Level
Input Voltage
IL
or V − 0.1 V
CC
3.0
4.5
5.5
2.99
4.49
5.49
2.9
4.4
5.4
2.9
4.4
5.4
I
= −50 μA
OUT
Minimum High Level
Output Voltage
OH
*V = V or V
IH
IN
IL
3.0
4.5
5.5
−
−
−
2.56
3.86
4.86
2.46
3.76
4.76
−12 mA
−24 mA
−24 mA
V
V
I
I
OH
V
3.0
4.5
5.5
0.002
0.001
0.001
0.1
0.1
0.1
0.1
0.1
0.1
= 50 μA
OUT
Maximum Low Level
Output Voltage
OL
*V = V or V
IN
IL
IH
3.0
4.5
5.5
−
−
−
0.36
0.36
0.36
0.44
0.44
0.44
12 mA
24 mA
24 mA
V
I
OL
I
Maximum Input
Leakage Current
IN
5.5
−
±0.1
±1.0
μA
V = V , GND
I
CC
I
I
I
5.5
5.5
−
−
−
−
75
mA
mA
V
V
= 1.65 V Max
= 3.85 V Min
†Minimum Dynamic
Output Current
OLD
OHD
CC
OLD
OHD
−75
Maximum Quiescent
Supply Current
5.5
−
8.0
80
μA
V
= V or GND
IN CC
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
NOTE:
I
and I @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V V
.
CC
IN
CC
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4
MC74AC151, MC74ACT151
AC CHARACTERISTICS (For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
74AC
74AC
T
= −40°C
A
T
C
= +25°C
= 50 pF
V
(V)
*
Fig.
No.
A
CC
to +85°C
C
Symbol
Parameter
Unit
L
= 50 pF
L
Min
Typ
Max
Min
Max
3.3
5.0
3.0
2.5
11.5
8.5
18.0
13.0
3.0
2.0
20.0
15.0
Propagation Delay
S to Z or Z
n
t
t
t
t
t
t
ns
ns
ns
ns
ns
ns
3−6
3−6
3−6
3−6
3−5
3−5
PLH
3.3
5.0
2.5
2.0
12
8.5
18.0
13.0
2.5
1.5
20.0
15.0
Propagation Delay
S to Z or Z
n
PHL
PLH
PHL
PLH
PHL
3.3
5.0
2.5
2.0
8.0
6.0
13.0
10.0
2.0
1.5
14.0
11.0
Propagation Delay
E to Z or Z
3.3
5.0
1.5
1.5
8.5
6.5
13.0
10.0
1.5
1.5
14.0
11.0
Propagation Delay
E to Z or Z
3.3
5.0
2.5
1.5
9.5
7.0
14.0
10.5
2.0
1.5
15.5
11.0
Propagation Delay
I to Z or Z
n
3.3
5.0
2.5
1.5
9.5
7.0
15.0
11.0
2.0
1.5
16.0
12.0
Propagation Delay
I to Z or Z
n
*Voltage Range 3.3 V is 3.3 V ± 0.3 V
*Voltage Range 5.0 V is 5.0 V ± 0.5 V
DC CHARACTERISTICS
74ACT
74ACT
T
=
A
V
(V)
CC
T
A
= +25°C
−40°C to
+85°C
Symbol
Parameter
Unit
Conditions
Typ
Guaranteed Limits
V
V
V
4.5
5.5
1.5
1.5
2.0
2.0
2.0
2.0
V
= 0.1 V
OUT
Minimum High Level
Input Voltage
IH
V
V
V
or V − 0.1 V
CC
4.5
5.5
1.5
1.5
0.8
0.8
0.8
0.8
V
= 0.1 V
OUT
Maximum Low Level
Input Voltage
IL
or V − 0.1 V
CC
4.5
5.5
4.49
5.49
4.4
5.4
4.4
5.4
I
= −50 μA
OUT
Minimum High Level
Output Voltage
OH
*V = V or V
IH
IN
IL
4.5
5.5
−
−
3.86
4.86
3.76
4.76
V
V
V
I
−24 mA
−24 mA
OH
V
4.5
5.5
0.001
0.001
0.1
0.1
0.1
0.1
I
= 50 μA
OUT
Maximum Low Level
Output Voltage
OL
*V = V or V
I
IN
IL
IH
4.5
5.5
−
−
0.36
0.36
0.44
0.44
24 mA
24 mA
OL
I
Maximum Input
Leakage Current
IN
5.5
−
±0.1
±1.0
μA
V = V , GND
I CC
DI
Additional Max. I /Input
5.5
5.5
0.6
−
−
1.5
75
mA
mA
V = V − 2.1 V
CCT
CC
I
CC
I
−
V
V
= 1.65 V Max
†Minimum Dynamic
Output Current
OLD
OLD
I
I
5.5
5.5
−
−
−
−75
mA
= 3.85 V Min
OHD
CC
OHD
Maximum Quiescent
Supply Current
8.0
80
μA
V
= V or GND
IN CC
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
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5
MC74AC151, MC74ACT151
AC CHARACTERISTICS (For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
74ACT
74ACT
T
= −40°C
A
T
C
= +25°C
= 50 pF
V
(V)
*
Fig.
No.
A
CC
to +85°C
C
Symbol
Parameter
Unit
L
= 50 pF
L
Min
Typ
Max
Min
Max
Propagation Delay
S to Z
n
t
t
t
t
t
t
t
t
t
t
t
t
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
3.5
−
15.5
3.0
17.0
16.5
16.5
18.5
10.0
10.0
9.5
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
3−6
3−6
3−6
3−6
3−6
3−6
3−6
3−6
3−6
3−6
3−6
3−6
PLH
Propagation Delay
S to Z
n
3.5
3.5
4.0
2.5
2.5
2.5
3.0
3.5
3.5
3.5
4.0
−
−
−
−
−
−
−
−
−
−
−
15.5
15
3.0
3.0
3.5
2.5
2.5
2.5
2.5
3.0
3.0
3.0
3.0
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
Propagation Delay
S to Z
n
Propagation Delay
S to Z
n
16.5
9.5
Propagation Delay
E to Z
Propagation Delay
E to Z
9.0
Propagation Delay
E to Z
8.5
Propagation Delay
E to Z
10.0
11.5
12.0
12.0
12.5
10.5
12.5
13.5
13.0
14.0
Propagation Delay
I to Z
n
Propagation Delay
I to Z
n
Propagation Delay
I to Z
n
Propagation Delay
I to Z
n
*Voltage Range 5.0 V is 5.0 V ± 0.5 V
CAPACITANCE
Symbol
Value
Typ
Parameter
Unit
Test Conditions
C
C
Input Capacitance
Power Dissipation Capacitance
4.5
70
pF
pF
V
V
= 5.0 V
= 5.0 V
IN
CC
CC
PD
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6
MC74AC151, MC74ACT151
MARKING DIAGRAMS
DIP−16
SO−16
TSSOP−16
EIAJ−16
MC74AC151N
AWLYYWW
AC151
AWLYWW
74AC151
ALYW
AC
151
ALYW
ACT151
AWLYWW
MC74ACT151N
AWLYYWW
74ACT151
ALYW
ACT
151
ALYW
A
= Assembly Location
WL, L = Wafer Lot
YY, Y
= Year
WW, W = Work Week
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7
MC74AC151, MC74ACT151
PACKAGE DIMENSIONS
PDIP−16
N SUFFIX
16 PIN PLASTIC DIP PACKAGE
CASE 648−08
ISSUE R
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
−A−
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
16
1
9
8
B
S
INCHES
DIM MIN MAX
MILLIMETERS
MIN
18.80
6.35
3.69
0.39
1.02
MAX
19.55
6.85
4.44
0.53
1.77
F
A
B
C
D
F
0.740
0.250
0.145
0.015
0.040
0.770
0.270
0.175
0.021
0.70
C
L
SEATING
PLANE
−T−
G
H
J
0.100 BSC
0.050 BSC
2.54 BSC
1.27 BSC
K
M
0.008
0.015
0.130
0.305
10
0.21
0.38
3.30
7.74
10
H
J
K
L
0.110
0.295
0
2.80
7.50
0
G
D 16 PL
M
S
_
_
_
_
0.020
0.040
0.51
1.01
M
M
0.25 (0.010)
T A
SO−16
D SUFFIX
16 PIN PLASTIC SOIC PACKAGE
CASE 751B−05
ISSUE J
−A−
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
16
9
8
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
−B−
P 8 PL
M
S
B
0.25 (0.010)
1
G
MILLIMETERS
INCHES
DIM MIN
MAX
10.00
4.00
1.75
0.49
1.25
MIN
MAX
0.393
0.157
0.068
0.019
0.049
F
A
B
C
D
F
9.80
3.80
1.35
0.35
0.40
0.386
0.150
0.054
0.014
0.016
R X 45
K
_
C
G
J
1.27 BSC
0.050 BSC
−T−
SEATING
PLANE
0.19
0.10
0
0.25
0.25
7
0.008
0.004
0
0.009
0.009
7
J
M
K
M
P
R
D
16 PL
_
_
_
_
5.80
0.25
6.20
0.50
0.229
0.010
0.244
0.019
M
S
S
A
0.25 (0.010)
T
B
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8
MC74AC151, MC74ACT151
PACKAGE DIMENSIONS
TSSOP−16
DT SUFFIX
16 PIN PLASTIC TSSOP PACKAGE
CASE948F−01
ISSUE O
16X KREF
M
S
S
V
0.10 (0.004)
T
U
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH.
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED
0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
S
U
0.15 (0.006) T
K
K1
16
9
2X L/2
J1
B
SECTION N−N
L
−U−
J
PIN 1
IDENT.
8
1
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE −W−.
N
0.25 (0.010)
S
0.15 (0.006) T
U
A
M
MILLIMETERS
INCHES
−V−
DIM MIN
MAX
5.10
4.50
1.20
0.15
0.75
MIN
MAX
0.200
0.177
A
B
4.90
4.30
−−−
0.193
0.169
N
C
−−− 0.047
0.006
0.030
F
DETAIL E
D
0.05
0.50
0.002
0.020
F
G
H
0.65 BSC
0.026 BSC
0.18
0.09
0.09
0.19
0.19
0.28
0.20
0.16
0.30
0.25
0.007
0.004
0.004
0.007
0.007
0.011
0.008
0.006
0.012
0.010
J
J1
K
−W−
C
K1
L
6.40 BSC
0.252 BSC
0
0.10 (0.004)
M
0
8
8
_
_
_
_
DETAIL E
H
SEATING
PLANE
−T−
D
G
EIAJ−16
M SUFFIX
16 PIN PLASTIC EIAJ PACKAGE
CASE966−01
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
ISSUE O
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
L
16
9
E
Q
1
H
E
E
M
_
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
1
8
L
DETAIL P
Z
D
VIEW P
e
MILLIMETERS
INCHES
MIN MAX
−−− 0.081
A
DIM MIN
MAX
c
A
−−−
0.05
0.35
0.18
9.90
5.10
2.05
A
1
0.20 0.002
0.50 0.014
0.27 0.007
10.50 0.390
5.45 0.201
0.008
0.020
0.011
0.413
0.215
b
c
D
E
A
1
b
0.13 (0.005)
e
1.27 BSC
0.050 BSC
0.10 (0.004)
M
H
7.40
0.50
1.10
8.20 0.291
0.85 0.020
1.50 0.043
0.323
0.033
0.059
E
L
L
E
0
10
0.90 0.028
10
0.035
M
Q
0
_
_
_
_
0.70
−−−
1
Z
0.78
−−− 0.031
http://onsemi.com
9
MC74AC151, MC74ACT151
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
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