MC74ACT240NG [ONSEMI]

Octal Buffer/Line Driver with 3−State Outputs; 八路缓冲器/ 3态输出的线路驱动器
MC74ACT240NG
型号: MC74ACT240NG
厂家: ONSEMI    ONSEMI
描述:

Octal Buffer/Line Driver with 3−State Outputs
八路缓冲器/ 3态输出的线路驱动器

总线驱动器 总线收发器 逻辑集成电路 光电二极管
文件: 总10页 (文件大小:109K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
MC74AC240, MC74ACT240  
Octal Buffer/Line Driver  
with 3−State Outputs  
The MC74AC240/74ACT240 is an octal buffer and line driver  
designed to be employed as a memory address driver, clock driver and  
bus oriented transmitter or receiver which provides improved PC  
board density.  
http://onsemi.com  
Features  
3−State Outputs Drive Bus Lines or Buffer Memory Address  
Registers  
Outputs Source/Sink 24 mA  
PDIP−20  
N SUFFIX  
CASE 738  
ACT240 Has TTL Compatible Inputs  
Pb−Free Packages are Available  
1
SOIC−20W  
DW SUFFIX  
CASE 751D  
TRUTH TABLE  
Inputs  
OE  
Outputs  
1
D
(Pins 12, 14, 16, 18)  
1
L
L
H
L
H
X
H
L
Z
TSSOP−20  
DT SUFFIX  
CASE 948E  
NOTE: H = HIGH Voltage Level  
L = LOW Voltage Level  
X = Immaterial  
1
Z = High Impedance  
SOEIAJ−20  
M SUFFIX  
CASE 967  
TRUTH TABLE  
Inputs  
OE  
Outputs  
1
D
(Pins 3, 5, 7, 9)  
2
L
L
H
L
H
X
H
L
Z
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 6 of this data sheet.  
NOTE: H = HIGH Voltage Level  
L = LOW Voltage Level  
X = Immaterial  
DEVICE MARKING INFORMATION  
See general marking information in the device marking  
section on page 7 of this data sheet.  
Z = High Impedance  
V
OE  
2
CC  
20  
19  
18  
17  
16  
15  
14  
12  
13  
11  
1
2
3
4
5
6
7
8
9
10  
OE  
GND  
1
Figure 1. Pinout: 20−Lead Packages Conductors  
(Top View)  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
November, 2006 − Rev. 8  
MC74AC240/D  
MC74AC240, MC74ACT240  
MAXIMUM RATINGS  
Symbol  
Parameter  
Value  
Unit  
V
V
DC Supply Voltage (Referenced to GND)  
−0.5 to +7.0  
CC  
V
DC Input Voltage (Referenced to GND)  
DC Output Voltage (Referenced to GND)  
DC Input Current, per Pin  
−0.5 to V +0.5  
V
IN  
CC  
V
−0.5 to V +0.5  
V
OUT  
CC  
I
20  
50  
mA  
mA  
mA  
°C  
IN  
I
DC Output Sink/Source Current, per Pin  
OUT  
I
DC V or GND Current per Output Pin  
50  
CC  
CC  
T
stg  
Storage Temperature  
−65 to +150  
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the  
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect  
device reliability.  
RECOMMENDED OPERATING CONDITIONS  
Symbol  
Parameter  
Min  
2.0  
4.5  
0
Typ  
5.0  
5.0  
Max  
6.0  
Unit  
AC  
V
Supply Voltage  
V
V
CC  
ACT  
5.5  
V
, V  
IN  
DC Input Voltage, Output Voltage (Ref. to GND)  
V
CC  
OUT  
V
V
V
V
V
@ 3.0 V  
@ 4.5 V  
@ 5.5 V  
@ 4.5 V  
@ 5.5 V  
150  
40  
25  
10  
8.0  
CC  
CC  
CC  
CC  
CC  
Input Rise and Fall Time (Note 1)  
ns/V  
t , t  
r
f
AC Devices except Schmitt Inputs  
Input Rise and Fall Time (Note 2)  
t , t  
r
ns/V  
f
ACT Devices except Schmitt Inputs  
T
Junction Temperature (PDIP)  
Operating Ambient Temperature Range  
Output Current − High  
140  
85  
°C  
°C  
J
T
A
−40  
25  
I
−24  
24  
mA  
mA  
OH  
I
Output Current − Low  
OL  
1. V from 30% to 70% V ; see individual Data Sheets for devices that differ from the typical input rise and fall times.  
IN  
CC  
2. V from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.  
IN  
http://onsemi.com  
2
 
MC74AC240, MC74ACT240  
DC CHARACTERISTICS  
74AC  
74AC  
T =−40°C to +85°C  
A
V
CC  
T
A
= +25°C  
Symbol  
Parameter  
Unit  
Conditions  
(V)  
Typ  
Guaranteed Limits  
V
3.0  
4.5  
5.5  
1.5  
2.25  
2.75  
2.1  
3.15  
3.85  
2.1  
3.15  
3.85  
V
= 0.1 V  
OUT  
Minimum High Level  
Input Voltage  
IH  
V
V
V
or V − 0.1 V  
CC  
V
3.0  
4.5  
5.5  
1.5  
2.25  
2.75  
0.9  
1.35  
1.65  
0.9  
1.35  
1.65  
V
= 0.1 V  
OUT  
Maximum Low Level  
Input Voltage  
IL  
or V − 0.1 V  
CC  
V
3.0  
4.5  
5.5  
2.99  
4.49  
5.49  
2.9  
4.4  
5.4  
2.9  
4.4  
5.4  
I
= −50 mA  
OUT  
Minimum High Level  
Output Voltage  
OH  
*V = V or V  
IN  
IL  
IH  
3.0  
4.5  
5.5  
2.56  
3.86  
4.86  
2.46  
3.76  
4.76  
−12 mA  
−24 mA  
−24 mA  
V
V
I
I
OH  
V
3.0  
4.5  
5.5  
0.002  
0.001  
0.001  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
= 50 mA  
OUT  
Maximum Low Level  
Output Voltage  
OL  
*V = V or V  
IN  
IL  
IH  
3.0  
4.5  
5.5  
0.36  
0.36  
0.36  
0.44  
0.44  
0.44  
12 mA  
24 mA  
24 mA  
V
I
OL  
I
Maximum Input  
Leakage Current  
IN  
5.5  
5.5  
0.1  
0.5  
1.0  
5.0  
mA  
mA  
V = V , GND  
I CC  
I
V (OE) = V , V  
I IL IH  
Maximum  
3−State  
Current  
OZ  
V = V , GND  
I
CC  
V
V
V
= V , GND  
O
CC  
I
5.5  
5.5  
75  
mA  
mA  
= 1.65 V Max  
†Minimum Dynamic  
Output Current  
OLD  
OLD  
OHD  
I
−75  
= 3.85 V Min  
OHD  
I
Maximum Quiescent  
Supply Current  
CC  
5.5  
8.0  
80  
mA  
V
= V or GND  
IN CC  
*All outputs loaded; thresholds on input associated with output under test.  
†Maximum test duration 2.0 ms, one output loaded at a time.  
NOTE:  
I
and I @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V V  
.
IN  
CC  
CC  
http://onsemi.com  
3
MC74AC240, MC74ACT240  
AC CHARACTERISTICS (For Figures and Waveforms − See AND8277/D at www.onsemi.com)  
74AC  
74AC  
T
= −40°C  
A
T
= +25°C  
= 50 pF  
V
*
Fig.  
No.  
A
CC  
to +85°C  
= 50 pF  
Symbol  
Parameter  
Unit  
C
(V)  
L
C
L
Min  
Typ  
Max  
Min  
Max  
Propagation Delay  
Data to Output  
3.3  
5.0  
1.5  
1.5  
6.0  
4.5  
8.0  
6.5  
1.0  
1.0  
9.0  
7.0  
t
t
t
ns  
ns  
ns  
ns  
ns  
ns  
3−5  
3−5  
3−7  
3−8  
3−7  
3−8  
PLH  
PHL  
PZH  
Propagation Delay  
Data to Output  
3.3  
5.0  
1.5  
1.5  
5.5  
4.5  
8.0  
6.0  
1.0  
1.0  
8.5  
6.5  
3.3  
5.0  
1.5  
1.5  
6.0  
5.0  
10.5  
7.0  
1.0  
1.0  
11.0  
8.0  
Output Enable Time  
Output Enable Time  
Output Disable Time  
Output Disable Time  
3.3  
5.0  
1.5  
1.5  
7.0  
5.5  
10.0  
8.0  
1.0  
1.0  
11.0  
8.5  
t
PZL  
3.3  
5.0  
1.5  
1.5  
7.0  
6.5  
10.0  
9.0  
1.0  
1.0  
10.5  
9.5  
t
PHZ  
3.3  
5.0  
1.5  
1.5  
7.5  
6.5  
10.5  
9.0  
1.0  
1.0  
11.5  
9.5  
t
PLZ  
* Voltage Range 3.3 V is 3.3 V 0.3 V.  
Voltage Range 5.0 V is 5.0 V 0.5 V.  
DC CHARACTERISTICS  
74ACT  
74ACT  
V
CC  
T
A
= +25°C  
T = −40°C to +85°C  
A
Symbol  
Parameter  
Unit  
Conditions  
(V)  
Typ  
Guaranteed Limits  
V
4.5  
5.5  
1.5  
1.5  
2.0  
2.0  
2.0  
2.0  
V
= 0.1 V  
OUT  
Minimum High Level  
Input Voltage  
IH  
V
V
V
or V − 0.1 V  
CC  
V
4.5  
5.5  
1.5  
1.5  
0.8  
0.8  
0.8  
0.8  
V
= 0.1 V  
OUT  
Maximum Low Level  
Input Voltage  
IL  
or V − 0.1 V  
CC  
V
4.5  
5.5  
4.49  
5.49  
4.4  
5.4  
4.4  
5.4  
I
= −50 mA  
OUT  
Minimum High Level  
Output Voltage  
OH  
*V = V or V  
IN  
IL  
IH  
4.5  
5.5  
3.86  
4.86  
3.76  
4.76  
V
V
V
−24 mA  
−24 mA  
I
OH  
V
4.5  
5.5  
0.001  
0.001  
0.1  
0.1  
0.1  
0.1  
I
= 50 mA  
OUT  
Maximum Low Level  
Output Voltage  
OL  
*V = V or V  
IN  
IL  
IH  
4.5  
5.5  
0.36  
0.36  
0.44  
0.44  
24 mA  
24 mA  
I
OL  
I
Maximum Input  
Leakage Current  
IN  
5.5  
5.5  
0.1  
1.0  
1.5  
mA  
V = V , GND  
I CC  
DI  
Additional Max. I /Input  
0.6  
mA  
V = V − 2.1 V  
I CC  
CCT  
CC  
I
V (OE) = V , V  
I IL IH  
Maximum  
3−State  
Current  
OZ  
5.5  
0.5  
5.0  
mA  
V = V , GND  
I
CC  
V
V
V
= V , GND  
O
CC  
I
5.5  
5.5  
75  
mA  
mA  
= 1.65 V Max  
†Minimum Dynamic  
Output Current  
OLD  
OLD  
OHD  
I
−75  
= 3.85 V Min  
OHD  
I
Maximum Quiescent  
Supply Current  
CC  
5.5  
8.0  
80  
mA  
V
= V or GND  
IN CC  
*All outputs loaded; thresholds on input associated with output under test.  
†Maximum test duration 2.0 ms, one output loaded at a time.  
http://onsemi.com  
4
MC74AC240, MC74ACT240  
AC CHARACTERISTICS (For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)  
74ACT  
74ACT  
T
= −40°C  
A
V
*
T
C
= +25°C  
= 50 pF  
Fig.  
No.  
CC  
A
to +85°C  
C
Symbol  
Parameter  
Unit  
(V)  
L
= 50 pF  
L
Min  
Typ  
Max  
Min  
Max  
t
t
t
Propagation Delay Data to Output  
Propagation Delay Data to Output  
Output Enable Time  
5.0  
5.0  
5.0  
5.0  
5.0  
5.0  
1.5  
1.5  
1.5  
2.0  
2.0  
2.5  
6.0  
5.5  
7.0  
7.0  
8.0  
6.5  
8.5  
7.5  
1.5  
1.5  
1.0  
1.5  
2.0  
2.0  
9.5  
8.5  
ns  
ns  
ns  
ns  
ns  
ns  
3−5  
3−5  
3−7  
3−8  
3−7  
3−8  
PLH  
PHL  
PZH  
8.5  
9.5  
t
Output Enable Time  
9.5  
10.5  
10.5  
10.5  
PZL  
PHZ  
t
Output Disable Time  
9.5  
t
Output Disable Time  
10.0  
PLZ  
*Voltage Range 5.0 V is 5.0 V 0.5 V.  
CAPACITANCE  
Symbol  
Value  
Typ  
Parameter  
Unit  
Test Conditions  
C
Input Capacitance  
Power Dissipation Capacitance  
4.5  
45  
pF  
pF  
V
V
= 5.0 V  
= 5.0 V  
IN  
CC  
CC  
C
PD  
http://onsemi.com  
5
MC74AC240, MC74ACT240  
ORDERING INFORMATION  
Device  
Package  
Shipping  
MC74AC240N  
PDIP−20  
MC74AC240NG  
PDIP−20  
(Pb−Free)  
18 Units / Rail  
MC74ACT240N  
PDIP−20  
MC74ACT240NG  
PDIP−20  
(Pb−Free)  
MC74AC240DW  
SOIC−20  
38 Units / Rail  
1000 / Tape & Reel  
38 Units / Rail  
MC74AC240DWG  
SOIC−20  
(Pb−Free)  
MC74AC240DWR2  
MC74AC240DWR2G  
SOIC−20  
SOIC−20  
(Pb−Free)  
MC74ACT240DW  
MC74ACT240DWG  
SOIC−20  
SOIC−20  
(Pb−Free)  
MC74ACT240DWR2  
MC74ACT240DWR2G  
SOIC−20  
1000 / Tape & Reel  
SOIC−20  
(Pb−Free)  
MC74AC240DTR2  
MC74AC240DTR2G  
MC74ACT240DTR2  
MC74ACT240DTR2G  
MC74AC240MEL  
TSSOP−20*  
TSSOP−20*  
TSSOP−20*  
TSSOP−20*  
SOEIAJ−20  
2500 / Tape & Reel  
2000 / Tape & Reel  
2000 / Tape & Reel  
MC74AC240MELG  
SOEIAJ−20  
(Pb−Free)  
MC74ACT240MEL  
MC74ACT240MELG  
SOEIAJ−20  
SOEIAJ−20  
(Pb−Free)  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging  
Specifications Brochure, BRD8011/D.  
*These packages are inherently Pb−Free.  
http://onsemi.com  
6
MC74AC240, MC74ACT240  
MARKING DIAGRAMS  
PDIP−20  
SOIC−20W  
TSSOP−20  
SOEIAJ−20  
20  
20  
20  
1
20  
1
AC  
240  
AC240  
AWLYYWWG  
MC74AC240N  
AWLYYWWG  
74AC240  
AWLYWWG  
ALYWG  
G
1
1
20  
20  
20  
1
20  
1
ACT  
240  
ACT240  
AWLYYWWG  
74ACT240  
AWLYWWG  
MC74ACT240N  
AWLYYWWG  
ALYWG  
G
1
1
A
WL, L  
YY, Y  
= Assembly Location  
= Wafer Lot  
= Year  
WW, W = Work Week  
G or G  
= Pb−Free Package  
(Note: Microdot may be in either location)  
http://onsemi.com  
7
MC74AC240, MC74ACT240  
PACKAGE DIMENSIONS  
PDIP−20  
N SUFFIX  
PLASTIC DIP PACKAGE  
CASE 738−03  
ISSUE E  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
−A−  
2. CONTROLLING DIMENSION: INCH.  
3. DIMENSION L TO CENTER OF LEAD WHEN  
FORMED PARALLEL.  
4. DIMENSION B DOES NOT INCLUDE MOLD  
FLASH.  
20  
1
11  
10  
B
INCHES  
DIM MIN MAX  
MILLIMETERS  
L
C
MIN  
25.66  
6.10  
3.81  
0.39  
MAX  
27.17  
6.60  
4.57  
0.55  
A
B
C
D
E
F
1.010  
0.240  
0.150  
0.015  
1.070  
0.260  
0.180  
0.022  
0.050 BSC  
1.27 BSC  
−T−  
SEATING  
PLANE  
K
0.050  
0.070  
1.27  
1.77  
G
J
0.100 BSC  
2.54 BSC  
M
0.008  
0.110  
0.015  
0.140  
0.21  
2.80  
0.38  
3.55  
N
E
K
L
0.300 BSC  
7.62 BSC  
G
F
M
N
0
0.020  
15  
0.040  
0
_
0.51  
15  
1.01  
J 20 PL  
_
_
_
D 20 PL  
M
M
B
0.25 (0.010)  
T
M
M
A
0.25 (0.010)  
T
SOIC−20W  
DW SUFFIX  
CASE 751D−05  
ISSUE G  
NOTES:  
1. DIMENSIONS ARE IN MILLIMETERS.  
2. INTERPRET DIMENSIONS AND TOLERANCES  
PER ASME Y14.5M, 1994.  
D
A
q
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD  
PROTRUSION.  
20  
11  
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.  
5. DIMENSION B DOES NOT INCLUDE DAMBAR  
PROTRUSION. ALLOWABLE PROTRUSION  
SHALL BE 0.13 TOTAL IN EXCESS OF B  
DIMENSION AT MAXIMUM MATERIAL  
CONDITION.  
E
B
MILLIMETERS  
1
10  
DIM MIN  
MAX  
2.65  
0.25  
0.49  
0.32  
12.95  
7.60  
A
A1  
B
C
D
E
2.35  
0.10  
0.35  
0.23  
12.65  
7.40  
20X B  
M
S
S
B
0.25  
T A  
e
1.27 BSC  
H
h
10.05  
0.25  
0.50  
0
10.55  
0.75  
0.90  
7
A
L
q
_
_
SEATING  
PLANE  
18X e  
A1  
C
T
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8
MC74AC240, MC74ACT240  
PACKAGE DIMENSIONS  
TSSOP−20  
DT SUFFIX  
CASE 948E−02  
ISSUE C  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER  
ANSI Y14.5M, 1982.  
2. CONTROLLING DIMENSION:  
MILLIMETER.  
20X K REF  
K
M
S
S
V
0.10 (0.004)  
T
U
S
U
K1  
0.15 (0.006) T  
3. DIMENSION A DOES NOT INCLUDE  
MOLD FLASH, PROTRUSIONS OR GATE  
BURRS. MOLD FLASH OR GATE BURRS  
SHALL NOT EXCEED 0.15 (0.006) PER SIDE.  
4. DIMENSION B DOES NOT INCLUDE  
INTERLEAD FLASH OR PROTRUSION.  
INTERLEAD FLASH OR PROTRUSION  
SHALL NOT EXCEED 0.25 (0.010) PER SIDE.  
5. DIMENSION K DOES NOT INCLUDE  
DAMBAR PROTRUSION. ALLOWABLE  
DAMBAR PROTRUSION SHALL BE 0.08  
(0.003) TOTAL IN EXCESS OF THE K  
DIMENSION AT MAXIMUM MATERIAL  
CONDITION.  
J J1  
20  
11  
2X L/2  
B
SECTION N−N  
L
−U−  
PIN 1  
IDENT  
0.25 (0.010)  
N
1
10  
M
6. TERMINAL NUMBERS ARE SHOWN FOR  
REFERENCE ONLY.  
7. DIMENSION A AND B ARE TO BE  
DETERMINED AT DATUM PLANE −W−.  
S
0.15 (0.006) T  
U
A
−V−  
N
MILLIMETERS  
INCHES  
DIM MIN  
MAX  
6.60  
4.50  
1.20  
0.15  
0.75  
MIN  
MAX  
0.260  
0.177  
F
A
B
6.40  
4.30  
−−−  
0.252  
0.169  
DETAIL E  
C
−−− 0.047  
0.006  
0.030  
D
0.05  
0.50  
0.002  
0.020  
F
G
H
0.65 BSC  
0.026 BSC  
−W−  
0.27  
0.09  
0.09  
0.19  
0.19  
0.37  
0.20  
0.16  
0.30  
0.25  
0.011  
0.004  
0.004  
0.007  
0.007  
0.015  
0.008  
0.006  
0.012  
0.010  
C
J
J1  
K
G
D
H
K1  
L
DETAIL E  
6.40 BSC  
0.252 BSC  
0
0.100 (0.004)  
−T− SEATING  
M
0
8
8
_
_
_
_
PLANE  
SOLDERING FOOTPRINT*  
7.06  
1
0.65  
PITCH  
16X  
0.36  
16X  
1.26  
DIMENSIONS: MILLIMETERS  
*For additional information on our Pb−Free strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
http://onsemi.com  
9
MC74AC240, MC74ACT240  
PACKAGE DIMENSIONS  
SOEIAJ−20  
M SUFFIX  
CASE 967−01  
ISSUE A  
NOTES:  
ꢀꢁ1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
L
20  
11  
E
Q
ꢀꢁ2. CONTROLLING DIMENSION: MILLIMETER.  
ꢀꢁ3. DIMENSIONS D AND E DO NOT INCLUDE  
MOLD FLASH OR PROTRUSIONS AND ARE  
MEASURED AT THE PARTING LINE. MOLD FLASH  
OR PROTRUSIONS SHALL NOT EXCEED 0.15  
(0.006) PER SIDE.  
1
H
E
E
_
M
ꢀꢁ4. TERMINAL NUMBERS ARE SHOWN FOR  
REFERENCE ONLY.  
L
1
10  
ꢀꢁ5. THE LEAD WIDTH DIMENSION (b) DOES NOT  
INCLUDE DAMBAR PROTRUSION. ALLOWABLE  
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)  
TOTAL IN EXCESS OF THE LEAD WIDTH  
DIMENSION AT MAXIMUM MATERIAL CONDITION.  
DAMBAR CANNOT BE LOCATED ON THE LOWER  
RADIUS OR THE FOOT. MINIMUM SPACE  
BETWEEN PROTRUSIONS AND ADJACENT LEAD  
TO BE 0.46 ( 0.018).  
DETAIL P  
Z
D
VIEW P  
e
A
c
MILLIMETERS  
INCHES  
MIN MAX  
−−− 0.081  
DIM MIN  
MAX  
2.05  
0.20  
0.50  
0.25  
12.80  
5.45  
A
−−−  
0.05  
A
1
A
b
1
0.002  
0.008  
0.020  
0.010  
0.504  
0.215  
b
c
0.35  
0.15  
0.014  
0.006  
0.486  
0.201  
M
0.10 (0.004)  
0.13 (0.005)  
D
E
e
12.35  
5.10  
1.27 BSC  
0.050 BSC  
H
7.40  
0.50  
1.10  
8.20  
0.85  
1.50  
0.291  
0.020  
0.043  
0.323  
0.033  
0.059  
E
L
L
E
M
Q
0
10  
10  
0.035  
0
0.028  
_
_
_
_
0.70  
−−−  
0.90  
0.81  
1
Z
−−− 0.032  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice  
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All  
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights  
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should  
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,  
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death  
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal  
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
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LITERATURE FULFILLMENT:  
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USA/Canada  
Europe, Middle East and Africa Technical Support:  
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Order Literature: http://www.onsemi.com/orderlit  
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MC74AC240/D  

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