MC74HC1G32DFT2G-L22038 [ONSEMI]
Single 2-Input OR Gate;型号: | MC74HC1G32DFT2G-L22038 |
厂家: | ONSEMI |
描述: | Single 2-Input OR Gate 栅 栅极 |
文件: | 总6页 (文件大小:115K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
MC74HC1G32
Single 2-Input OR Gate
The MC74HC1G32 is a high speed CMOS 2−input OR gate
fabricated with silicon gate CMOS technology.
The internal circuit is composed of multiple stages, including a
buffer output which provides high noise immunity and stable output.
The MC74HC1G32 output drive current is 1/2 compared to
MC74HC series.
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MARKING
DIAGRAMS
Features
• High Speed: t = 7 ns (Typ) at V = 5 V
PD
CC
• Low Power Dissipation: I = 1 mA (Max) at T = 25°C
CC
A
• High Noise Immunity
• Balanced Propagation Delays (t
5
SC−88A / SOT−353 / SC−70
= t
)
pLH
pHL
H4 M G
DF SUFFIX
CASE 419A
G
• Symmetrical Output Impedance (I = I = 2 mA)
OH
OL
1
• Chip Complexity: FET = 44
• These Devices are Pb−Free and are RoHS Compliant
5
H4 M G
G
TSOP−5 / SOT−23 / SC−59
DT SUFFIX
1
CASE 483
H4 = Device Code
IN B
IN A
GND
1
2
3
5
4
V
CC
M
G
= Date Code*
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation and/or position may vary
depending upon manufacturing location.
OUT Y
PIN ASSIGNMENT
1
2
3
4
5
IN B
IN A
Figure 1. Pinout
GND
OUT Y
V
CC
IN A
IN B
≥ 1
OUT Y
FUNCTION TABLE
Inputs
Output
Y
Figure 2. Logic Symbol
A
B
L
L
L
H
L
L
H
H
H
H
H
H
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
© Semiconductor Components Industries, LLC, 2011
1
Publication Order Number:
May, 2011 − Rev. 12
MC74HC1G32/D
MC74HC1G32
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
V
CC
DC Supply Voltage
*0.5 to )7.0
V
IN
DC Input Voltage
*0.5 to V )0.5
V
CC
V
OUT
DC Output Voltage
*0.5 to V )0.5
V
CC
I
DC Input Diode Current
DC Output Diode Current
DC Output Sink Current
DC Supply Current per Supply Pin
Storage Temperature Range
$20
$20
mA
mA
mA
mA
°C
IK
I
OK
I
$12.5
$25
OUT
I
CC
T
*65 to )150
260
STG
T
Lead Temperature, 1 mm from Case for 10 Seconds
Junction Temperature Under Bias
°C
L
T
)150
°C
J
q
Thermal Resistance
SC70−5/SC−88A/SOT−353 (Note 1)
350
230
°C/W
JA
SOT23−5/TSOP−5/SC59−5
P
D
Power Dissipation in Still Air at 85°C
SC70−5/SC−88A/SOT−353
SOT23−5/TSOP−5/SC59−5
150
200
mW
MSL
Moisture Sensitivity
Flammability Rating
ESD Withstand Voltage
Level 1
F
R
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
V
ESD
Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
u2000
u200
N/A
V
I
Latchup Performance
Above V and Below GND at 125°C (Note 5)
500
mA
LATCHUP
CC
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm by 1 inch, 2 ounce copper trace with no air flow.
2. Tested to EIA/JESD22−A114−A.
3. Tested to EIA/JESD22−A115−A.
4. Tested to JESD22−C101−A.
5. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
2.0
Max
Unit
V
V
CC
DC Supply Voltage
6.0
V
DC Input Voltage
0.0
V
CC
V
CC
V
IN
V
OUT
DC Output Voltage
0.0
V
T
Operating Temperature Range
Input Rise and Fall Time
*55
)125
°C
ns
A
t , t
r
V
CC
V
CC
V
CC
V
CC
= 2.0 V
= 3.0 V
= 4.5 V
= 6.0 V
0
0
0
0
1000
600
500
400
f
DEVICE JUNCTION TEMPERATURE VERSUS
TIME TO 0.1% BOND FAILURES
FAILURE RATE OF PLASTIC = CERAMIC
UNTIL INTERMETALLICS OCCUR
Junction
Temperature °C
Time, Hours
Time, Years
80
1,032,200
419,300
178,700
79,600
37,000
17,800
8,900
117.8
47.9
20.4
9.4
90
100
110
120
130
140
1
4.2
1
10
100
1000
TIME, YEARS
2.0
Figure 3. Failure Rate vs. Time Junction Temperature
1.0
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2
MC74HC1G32
DC ELECTRICAL CHARACTERISTICS
V
CC
T = 255C
A
T
A
v 855C
*555C v T v 1255C
A
Symbol
Parameter
Test Conditions
(V)
Min
Typ
Max
Min
Max
Min
Max
Unit
V
IH
Minimum High−Level
Input Voltage
2.0
3.0
4.5
6.0
1.5
2.1
3.15
4.20
1.5
2.1
3.15
4.20
1.5
2.1
3.15
4.20
V
V
Maximum Low−Level
2.0
3.0
4.5
6.0
0.5
0.9
1.35
1.80
0.5
0.9
1.35
1.80
0.5
0.9
1.35
1.80
V
V
IL
Input Voltage
V
OH
Minimum High−Level
V
OH
= V or V
2.0
3.0
4.5
6.0
1.9
2.9
4.4
5.9
2.0
3.0
4.5
6.0
1.9
2.9
4.4
5.9
1.9
2.9
4.4
5.9
IN
IH
IL
Output Voltage
I
= −20 mA
V
IN
= V or V
IH IL
V
= V or V
IN
IH
IL
I
= −2 mA
4.5
6.0
4.18
5.68
4.31
5.80
4.13
5.63
4.08
5.58
OH
I
= −2.6 mA
OH
V
OL
Maximum Low−Level
V
OL
= V or V
2.0
3.0
4.5
6.0
0.0
0.0
0.0
0.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
IN
IH
IL
Output Voltage
I
= 20 mA
V
IN
= V or V
IH IL
V
= V or V
IN
IH
IL
I
= 2 mA
4.5
6.0
0.17
0.18
0.26
0.26
0.33
0.33
0.40
0.40
OL
I
OL
= 2.6 mA
I
Maximum Input
Leakage Current
V
= 6.0 V or GND
6.0
0.1
1.0
1.0
mA
mA
IN
IN
IN
I
Maximum Quiescent
Supply Current
V
= V or GND
CC
6.0
1.0
10
40
CC
AC ELECTRICAL CHARACTERISTICS (Input t = t = 6.0 ns)
r
f
T
A
= 255C
T
A
v 855C *555C v T v 1255C
A
Symbol
Parameter
Test Conditions
Min
Typ
Max
Min
Max
Min
Max
Unit
t
,
Maximum Propagation
Delay, Input A or B to Y
V
= 5.0 V
C = 15 pF
3.5
15
20
25
ns
PLH
CC
L
t
PHL
V
CC
V
CC
V
CC
V
CC
= 2.0 V
= 3.0 V
= 4.5 V
= 6.0 V
C = 50 pF
L
20
12
8
100
27
20
17
125
35
25
21
155
90
35
26
7
t
,
Output Transition Time
V
= 5.0 V
C = 15 pF
3
10
15
20
ns
TLH
CC
L
t
THL
V
CC
V
CC
V
CC
V
CC
= 2.0 V
= 3.0 V
= 4.5 V
= 6.0 V
C = 50 pF
L
25
16
11
9
125
35
25
21
155
45
31
26
200
60
38
32
C
Maximum Input
Capacitance
5
10
10
10
pF
pF
IN
Typical @ 255C, V = 5.0 V
CC
C
Power Dissipation Capacitance (Note 6)
10
PD
6. C is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
PD
Average operating current can be obtained by the equation: I
) = C ꢀ V ꢀ f + I . C is used to determine the no−load dynamic
CC(OPR
PD CC in CC PD
2
power consumption; P = C ꢀ V
ꢀ f + I ꢀ V
.
D
PD
CC
in
CC
CC
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3
MC74HC1G32
t
r
t
f
V
CC
90%
50%
10%
INPUT
A or B
GND
t
t
PHL
PLH
90%
50%
10%
OUTPUT Y
t
t
TLH
THL
Figure 4. Switching Waveforms
INPUT
OUTPUT
C
L*
*Includes all probe and jig capacitance.
A 1−MHz square input wave is recommended for propagation delay tests.
Figure 5. Test Circuit
ORDERING INFORMATION
Device
†
Package
Shipping
MC74HC1G32DFT1G
SC70−5/SC−88A/SOT−353
(Pb−Free)
MC74HC1G32DFT2G
MC74HC1G32DTT1G
SC70−5/SC−88A/SOT−353
(Pb−Free)
3000 / Tape & Reel
SOT23−5/TSOP−5/SC59−5
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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4
MC74HC1G32
PACKAGE DIMENSIONS
SC−88A (SC−70−5/SOT−353)
CASE 419A−02
ISSUE K
A
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
G
2. CONTROLLING DIMENSION: INCH.
3. 419A−01 OBSOLETE. NEW STANDARD
419A−02.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
5
4
3
−B−
S
INCHES
DIM MIN MAX
MILLIMETERS
MIN
1.80
1.15
0.80
0.10
MAX
2.20
1.35
1.10
0.30
1
2
A
B
C
D
G
H
J
0.071
0.045
0.031
0.004
0.087
0.053
0.043
0.012
0.026 BSC
0.65 BSC
M
M
B
D 5 PL
0.2 (0.008)
---
0.004
0.004
0.004
0.010
0.012
---
0.10
0.10
0.10
0.25
0.30
K
N
S
N
0.008 REF
0.20 REF
0.079
0.087
2.00
2.20
J
C
K
H
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5
MC74HC1G32
PACKAGE DIMENSIONS
TSOP−5
CASE 483−02
ISSUE H
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES
LEAD FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS
OF BASE MATERIAL.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
5. OPTIONAL CONSTRUCTION: AN
ADDITIONAL TRIMMED LEAD IS ALLOWED
IN THIS LOCATION. TRIMMED LEAD NOT TO
EXTEND MORE THAN 0.2 FROM BODY.
NOTE 5
5X
D
0.20 C A B
2X
2X
0.10
T
T
M
5
4
3
0.20
B
S
1
2
K
L
DETAIL Z
G
A
MILLIMETERS
DIM
A
B
C
D
MIN
3.00 BSC
1.50 BSC
MAX
DETAIL Z
J
0.90
1.10
0.50
C
0.25
SEATING
PLANE
0.05
G
H
J
K
L
M
S
0.95 BSC
H
0.01
0.10
0.20
1.25
0
0.10
0.26
0.60
1.55
10
3.00
T
_
_
2.50
SOLDERING FOOTPRINT*
1.9
0.074
0.95
0.037
2.4
0.094
1.0
0.039
0.7
0.028
mm
inches
ǒ
Ǔ
SCALE 10:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
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MC74HC1G32/D
相关型号:
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