MC74HCT20ADTR2G [ONSEMI]
Dual 4-Input NAND Gate;
| 型号： | MC74HCT20ADTR2G |
| 厂家： | 
ONSEMI |
| 描述： | Dual 4-Input NAND Gate 栅 |
| 文件： | 总6页 (文件大小：121K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MC74HCT20A
Dual 4-Input NAND Gate
with LSTTL-Compatible
Inputs
High−Performance Silicon−Gate CMOS
http://onsemi.com
The MC74HCT20A is identical in pinout to the LS20. The device
inputs are compatible with standard CMOS LSTTL outputs.
MARKING
DIAGRAMS
Features
14
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 4.5 V to 5.5 V
• Low Input Current: 1 mA
SOIC−14
D SUFFIX
CASE 751A
HCT20AG
AWLYWW
14
14
1
1
• High Noise Immunity Characteristic of CMOS Devices
• These are Pb−Free Devices
14
1
TSSOP−14
DT SUFFIX
CASE 948G
HCT
20A
ALYW
1
A1
2
B1
C1
D1
6
8
ꢀ
1
4
5
Y1
ꢀ
Y = ABCD
9
A2
B2
C2
D2
10
12
13
A
= Assembly Location
= Wafer Lot
Y1
WL, L
YY, Y
= Year
WW, W = Work Week
G or = Pb−Free Package
PIN 14 = V
CC
PIN 7 = GND
PINS 3, 11 = NO CONNECTION
ꢀ
(Note: Microdot may be in either location)
Figure 1. Logic Diagram
PIN ASSIGNMENT
A1
B1
1
2
14
13 D2
12
V
CC
NC
C1
3
4
C2
11 NC
10 B2
D1
Y1
5
6
9
8
A2
Y2
GND
7
FUNCTION TABLE
Inputs
Output
Y
A
B
C
D
L
X
X
X
H
X
L
X
X
H
X
X
L
X
H
X
X
X
L
H
H
H
H
L
H
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
© Semiconductor Components Industries, LLC, 2011
1
Publication Order Number:
March, 2011 − Rev. 1
MC74HCT20A/D
MC74HCT20A
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high−impedance cir-
V
DC Supply Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
−0.5 to +7.0
CC
V
−0.5 to V +0.5
V
in
CC
V
out
−0.5 to V +0.5
V
CC
I
20
25
50
mA
mA
mA
mW
in
cuit. For proper operation, V and
in
I
I
DC Output Current, per Pin
out
V
out
should be constrained to the
range GND v (V or V ) v V
.
DC Supply Current, V and GND Pins
in
out
CC
CC
CC
Unused inputs must always be
tied to an appropriate logic voltage
P
D
Power Dissipation in Still Air
SOIC Package
TSSOP Package
500
450
level (e.g., either GND or V ).
CC
Unused outputs must be left open.
T
stg
Storage Temperature
−65 to +150
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress
ratings only. Functional operation above the Recommended Operating Conditions is not implied.
Extended exposure to stresses above the Recommended Operating Conditions may affect device
reliability.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
4.5
0
Max
Unit
V
V
CC
DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to GND)
Operating Temperature Range, All Package Types
Input Rise/Fall Time (Figure 1)
5.5
V , V
in out
V
CC
V
T
A
– 55
0
+ 125
500
ꢁ C
ns
t , t
r
f
DC CHARACTERISTICS (Voltages Referenced to GND)
Guaranteed Limit
V
CC
Symbol
Parameter
Condition
−55 to 25°C ≤85°C ≤125°C Unit
V
V
Minimum High−Level Input Voltage
V
= 0.1V
4.5
5.5
2.0
2.0
2.0
2.0
2.0
2.0
V
V
V
IH
out
|I | ≤ 20mA
out
V
Maximum Low−Level Input Voltage
V
out
= V − 0.1V
4.5
5.5
0.8
0.8
0.8
0.8
0.8
0.8
IL
CC
|I | ≤ 20mA
out
V
OH
Minimum High−Level Output
Voltage
V
in
= V
IL
4.5
5.5
4.4
5.4
4.4
5.4
4.4
5.4
|I | ≤ 20mA
out
V
V
= V
= V
|I | ≤ 4.0mA
out
4.5
3.98
3.84
3.70
in
IL
V
OL
Maximum Low−Level Output
Voltage
4.5
5.5
0.1
0.1
0.1
0.1
0.1
0.1
V
in
IH
|I | ≤ 20mA
out
V
V
V
= V
|I | ≤ 4.0mA
out
4.5
5.5
5.5
0.26
0.1
1
0.33
1.0
10
0.40
1.0
40
in
IH
I
Maximum Input Leakage Current
= V or GND
mA
mA
in
in
CC
I
Maximum Quiescent Supply
Current (per Package)
= V or GND
CC
in
CC
I
= 0mA
out
DI
CC
Additional Quiescent Supply
Current
V
V
I
= 2.4V, Any One Input
in
in
≥ −55°C
25 to 125°C
2.4
= V or GND, Other Inputs
CC
2.9
= 0mA
mA
5.5
out
1. Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D).
2. Total Supply Current = I + ΣDI
.
CC
CC
http://onsemi.com
2
MC74HCT20A
AC ELECTRICAL CHARACTERISTICS (C = 50 pF, Input t = t = 6 ns, V = 5.0 V)
L
r
f
CC
Guaranteed Limit
− 55 to
25°C
v 85°C
35
v 125°C
Symbol
Parameter
Unit
t
,
Maximum Propagation Delay, Input A, B, or C to Output Y
(Figures 2 and 3)
28
42
ns
PLH
t
PHL
t
t
,
Maximum Output Transition Time, Any Output
(Figures 2 and 3)
15
10
19
10
22
10
ns
TLH
THL
C
Maximum Input Capacitance
pF
in
Typical @ 25°C, V = 5.0 V
CC
26
C
Power Dissipation Capacitance (Per Gate)
pF
PD
TEST POINT
OUTPUT
t
f
t
r
V
CC
90%
V
INPUT
A, B, C, OR D
(V)
DEVICE
UNDER
TEST
m
10%
GND
C *
L
t
t
PHL
PLH
i
90%
V
OUTPUT Y
m
10%
*Includes all probe and jig capacitance
t
t
THL
TLH
Figure 3. Test Circuit
V = GND to 3.0 V
i
V
m
= 1.3 V
Figure 2. Switching Waveforms
A
B
Y
C
D
Figure 4. Expanded Logic Diagram
(1/2 of the Device)
ORDERING INFORMATION
Device
†
Package
Shipping
MC74HCT20ADG
SOIC−14
(Pb−Free)
55 Units/Rail
MC74HCT20ADR2G
MC74HCT20ADTR2G
SOIC−14
(Pb−Free)
2500/Tape & Reel
TSSOP−14*
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb−Free.
http://onsemi.com
3
MC74HCT20A
PACKAGE DIMENSIONS
SOIC−14
CASE 751A−03
ISSUE J
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
−A−
14
8
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.127
(0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
−B−
P 7 PL
M
M
B
0.25 (0.010)
7
1
G
MILLIMETERS
DIM MIN MAX
INCHES
MIN MAX
F
R X 45ꢁ
C
A
B
C
D
F
G
J
K
M
P
R
8.55
3.80
1.35
0.35
0.40
1.27 BSC
0.19
0.10
8.75 0.337 0.344
4.00 0.150 0.157
1.75 0.054 0.068
0.49 0.014 0.019
1.25 0.016 0.049
0.050 BSC
0.25 0.008 0.009
0.25 0.004 0.009
−T−
SEATING
PLANE
J
M
K
D 14 PL
M
S
S
0.25 (0.010)
T
B
A
0 ꢁ
5.80
0.25
7ꢁ
0 ꢁ
7ꢁ
6.20 0.228 0.244
0.50 0.010 0.019
SOLDERING FOOTPRINT*
7X
7.04
14X
1.52
1
14X
0.58
1.27
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
4
MC74HCT20A
PACKAGE DIMENSIONS
TSSOP−14
CASE 948G−01
ISSUE B
NOTES:
14X K REF
1. DIMENSIONING AND TOLERANCING PER
M
S
S
V
ANSI Y14.5M, 1982.
0.10 (0.004)
T
U
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
S
0.15 (0.006) T
U
N
0.25 (0.010)
14
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
8
2X L/2
M
B
L
N
−U−
PIN 1
IDENT.
F
7
1
DETAIL E
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
S
K
0.15 (0.006) T
U
A
−V−
MILLIMETERS
INCHES
K1
DIM MIN
MAX
MIN MAX
A
B
C
D
F
4.90
4.30
−−−
0.05
0.50
5.10 0.193 0.200
4.50 0.169 0.177
1.20
0.15 0.002 0.006
0.75 0.020 0.030
J J1
−−− 0.047
SECTION N−N
G
H
J
J1
K
0.65 BSC
0.026 BSC
0.60 0.020 0.024
0.20 0.004 0.008
0.16 0.004 0.006
0.30 0.007 0.012
0.25 0.007 0.010
0.50
0.09
0.09
0.19
−W−
C
K1 0.19
L
M
6.40 BSC
0.252 BSC
0.10 (0.004)
0 ꢁ
8 ꢁ
0 ꢁ
8 ꢁ
SEATING
PLANE
−T−
H
G
DETAIL E
D
SOLDERING FOOTPRINT*
7.06
1
0.65
PITCH
01.34X6
14X
1.26
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
5
MC74HCT20A
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
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Phone: 81−3−5773−3850
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
For additional information, please contact your local
Sales Representative
MC74HCT20A/D
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