MC74LCX06MG [ONSEMI]

IC LVC/LCX/Z SERIES, HEX 1-INPUT INVERT GATE, PDSO14, EIAJ, SO-14, Gate;
MC74LCX06MG
型号: MC74LCX06MG
厂家: ONSEMI    ONSEMI
描述:

IC LVC/LCX/Z SERIES, HEX 1-INPUT INVERT GATE, PDSO14, EIAJ, SO-14, Gate

文件: 总6页 (文件大小:79K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
MC74LCX06  
Low−Voltage CMOS Hex  
Inverter with Open Drain  
Outputs  
With 5 V − Tolerant Inputs  
http://onsemi.com  
The MC74LCX06 is a high performance hex inverter operating  
from a 2.3 V to 3.6 V supply. High impedance TTL compatible inputs  
significantly reduce current loading to input drivers. These LCX  
devices have open drain outputs which provide the ability to set output  
MARKING  
DIAGRAMS  
levels, or do active−HIGH AND or active−LOW OR functions. A V  
I
14  
specification of 5.5 V allows MC74LCX06 inputs to be safely driven  
from 5.0 V devices.  
SOIC−14  
D SUFFIX  
CASE 751A  
LCX06  
AWLYWW  
14  
1
Features  
1
Designed for 2.3 V to 3.6 V V Operation  
CC  
14  
5.0 V Tolerant Inputs/Outputs  
LVTTL Compatible  
LVCMOS Compatible  
24 mA Output Sink Capability  
LCX  
06  
ALYW  
TSSOP−14  
DT SUFFIX  
CASE 948G  
14  
1
Near Zero Static Supply Current (10 mA) Substantially Reduces  
System Power Requirements  
Latchup Performance Exceeds 500 mA  
Wired−OR, Wired−AND  
1
Output Level Can Be Set Externally Without Affecting Speed of  
14  
Device  
Functionally Compatible with LCX05  
74LCX06  
ALYW  
SOEIAJ−14  
M SUFFIX  
CASE 965  
ESD Performance:  
Human Body Model >1500 V;  
Machine Model >200 V  
14  
1
1
Pb−Free Packages are Available*  
A
= Assembly Location  
WL, L = Wafer Lot  
= Year  
WW, W = Work Week  
V
A3  
O3  
12  
A4  
O4  
A5  
O5  
CC  
Y
14  
13  
11  
10  
9
8
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 2 of this data sheet.  
1
2
3
4
5
6
7
A0  
O0  
A1  
O1  
A2  
O2 GND  
Figure 1. Pinout: 14−Lead (Top View)  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
January, 2005 − Rev. 7  
MC74LCX06/D  
MC74LCX06  
1
2
4
*
*
*
*
*
*
Table 1. PIN NAMES  
A0  
A1  
A2  
A3  
A4  
A5  
O0  
O1  
O2  
O3  
O4  
O5  
Pins  
Function  
3
An  
On  
Data Inputs  
Outputs  
5
6
13  
11  
9
12  
10  
8
Table 2. TRUTH TABLE  
An  
On  
L
H
Z
L
* OD  
Figure 2. Logic Diagram  
MAXIMUM RATINGS  
Symbol  
Parameter  
Value  
−0.5 to +7.0  
−0.5 V +7.0  
Condition  
Unit  
V
V
V
V
DC Supply Voltage  
CC  
I
DC Input Voltage  
V
I
DC Output Voltage  
−0.5 V +7.0  
Output in HIGH or LOW State (Note 1)  
V < GND  
V
O
O
I
I
DC Input Diode Current  
DC Output Diode Current  
−50  
−50  
mA  
mA  
mA  
mA  
mA  
mA  
°C  
IK  
I
V
O
< GND  
OK  
+50  
V > V  
O CC  
I
I
I
DC Output/Sink Current  
+50  
O
DC Supply Current Per Supply Pin  
±100  
CC  
GND  
DC Ground Current Per Ground Pin  
Storage Temperature Range  
±100  
T
−65 to +150  
STG  
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit  
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,  
damage may occur and reliability may be affected.  
1. I absolute maximum rating must be observed.  
O
ORDERING INFORMATION  
Device  
Package  
Shipping  
MC74LCX06D  
SOIC−14  
50 Units / Rail  
50 Units / Rail  
MC74LCX06DG  
SOIC−14  
(Pb−Free)  
MC74LCX06DR2  
SOIC−14  
2500 / Tape & Reel  
2500 / Tape & Reel  
MC74LCX06DR2G  
SOIC−14  
(Pb−Free)  
MC74LCX06DT  
MC74LCX06DTR2  
MC74LCX06M  
TSSOP−14*  
TSSOP−14*  
SOEIAJ−14  
SOEIAJ−14  
96 Units / Rail  
2500 / Tape & Reel  
50 Units / Rail  
MC74LCX06MEL  
2000 / Tape & Reel  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging  
Specifications Brochure, BRD8011/D.  
*This package is inherently Pb−Free.  
http://onsemi.com  
2
 
MC74LCX06  
RECOMMENDED OPERATING CONDITIONS  
Symbol  
Parameter  
Min  
Typ  
Max  
Unit  
V
CC  
Supply Voltage  
Operating  
Data Retention Only  
2.0  
1.5  
2.5, 3.3  
2.5, 3.3  
3.6  
3.6  
V
V
V
Input Voltage  
0
0
5.5  
V
V
I
Output Voltage  
(HIGH or LOW State)  
V
CC  
O
I
OL  
LOW Level Output Current  
Sink  
V
CC  
V
CC  
V
CC  
= 3.0 V − 3.6 V  
= 2.7 V − 3.0 V  
= 2.3 V − 2.7 V  
+24  
+12  
+8  
mA  
T
Operating Free−Air Temperature  
Input Transition Rise or Fall Rate, V from 0.8 V to 2.0 V, V = 3.0 V  
−40  
0
+85  
10  
°C  
A
Dt/DV  
ns/V  
IN  
CC  
DC ELECTRICAL CHARACTERISTICS (T = −40°C to +85°C)  
A
Symbol  
Characteristic  
Condition  
2.3 V V 2.7 V  
Min  
1.7  
2.0  
Max  
Unit  
V
IH  
HIGH Level Input Voltage (Note 2)  
V
CC  
2.7 V V 3.6 V  
CC  
V
LOW Level Input Voltage (Note 2)  
LOW Level Output Voltage  
V
V
2.3 V V 2.7 V  
0.7  
0.8  
0.2  
0.3  
0.4  
0.4  
0.55  
±5.0  
10  
IL  
CC  
2.7 V V 3.6 V  
CC  
V
OL  
2.3 V V 3.6 V; I = 100 mA  
CC  
OL  
V
= 2.3 V; I = 8 mA  
OL  
CC  
V
= 2.7 V; I = 12 mA  
OL  
CC  
CC  
CC  
V
V
= 3.0 V; I = 16 mA  
OL  
= 3.0 V; I = 24 mA  
OL  
I
I
I
Input Leakage Current  
2.3 V V 3.6 V; 0 V V 5.5 V  
mA  
mA  
mA  
mA  
mA  
I
CC  
I
Power−Off Leakage Current  
Quiescent Supply Current  
V
= 0 V; V or V = 5.5 V  
CC I O  
OFF  
CC  
2.3 V V 3.6 V; V = GND or V  
CC  
10  
CC  
I
2.3 V V 3.6 V; 3.6 V 5.5 V  
±10  
500  
CC  
I
DI  
Increase in I per Input  
2.3 V V 3.6 V  
CC  
CC  
CC  
One Input at V = V − 0.6 V  
IH  
CC  
2. These values of V are used to test DC electrical characteristics only.  
I
AC ELECTRICAL CHARACTERISTICS (T = −40°C to +85°C)  
A
V
CC  
= 3.3 V ± 0.3 V  
V
CC  
= 2.7 V  
V
CC  
= 2.5 V ± 0.2 V  
C = 50 pF  
L
C = 50 pF  
L
C = 30 pF  
L
Min  
Max  
Min  
Max  
Min  
Max  
Symbol  
Parameter  
Propagation Delay  
Unit  
t
0.8  
0.8  
3.7  
3.7  
1.0  
1.0  
4.1  
4.1  
0.8  
0.8  
3.5  
3.5  
ns  
ns  
PLZ  
PZL  
t
Input to Output  
DYNAMIC SWITCHING CHARACTERISTICS (T = +25°C)  
A
Symbol  
Characteristic  
Condition  
Min  
Typ  
Max  
Unit  
V
OLP  
Dynamic LOW Peak Voltage (Note 3)  
V
CC  
V
CC  
= 3.3 V, C = 50 pF, V = 3.3 V, V = 0 V  
0.9  
0.7  
V
L
IH  
IL  
= 2.5 V, C = 30 pF, V = 2.5 V, V = 0 V  
L
IH  
IL  
V
OLV  
Dynamic LOW Valley Voltage (Note 3)  
V
CC  
V
CC  
= 3.3 V, C = 50 pF, V = 3.3 V, V = 0 V  
−0.8  
−0.6  
V
L
IH  
IL  
= 2.5 V, C = 30 pF, V = 2.5 V, V = 0 V  
L
IH  
IL  
3. Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output is  
measured in the LOW state.  
CAPACITIVE CHARACTERISTICS  
Symbol  
Parameter  
Condition  
= 3.3 V, V = 0 V or V  
Typical  
Unit  
pF  
C
C
C
Input Capacitance  
V
V
7
8
IN  
CC  
I
CC  
CC  
Output Capacitance  
= 3.3 V, V = 0 V or V  
pF  
OUT  
PD  
CC  
I
Power Dissipation Capacitance  
10 MHz, V = 3.3 V, V = 0 V or V  
CC  
25  
pF  
CC  
I
http://onsemi.com  
3
 
MC74LCX06  
V
CC  
Vmi  
Vmi  
An  
On  
0 V  
t
t
PLZ  
PZL  
Vmo  
V
V
LZ  
OL  
PROPAGATION DELAYS  
t
R
= t = 2.5 ns, 10% to 90%; f = 1 MHz; t = 500 ns  
F W  
Table 3. AC WAVEFORMS  
V
CC  
3.3 V $ 0.3 V  
2.7 V  
1.5 V  
1.5 V  
2.5 V $ 0.2 V  
Symbol  
V
V
V
1.5 V  
V
/ 2  
mi  
CC  
1.5 V  
V
CC  
/ 2  
mo  
LZ  
V
OL  
+ 0.3 V  
V
+ 0.3 V  
V
OL  
+ 0.15 V  
OL  
V
CC  
6 V or V × 2  
CC  
R
1
GND  
PULSE  
GENERATOR  
DUT  
R
T
C
L
R
L
Table 4. TEST CIRCUIT  
TEST  
SWITCH  
6 V  
t
, t  
PZL PLZ  
Open Collector/Drain t  
and t  
6 V  
PLH  
PHL  
t
, t  
GND  
PZH PHZ  
C = 50 pF at V = 3.3 $ 0.3 V or equivalent (includes jig and  
L
CC  
probe capacitance)  
C = 30 pF at V = 2.5 $ 0.2 V or equivalent (includes jig and  
L
CC  
probe capacitance)  
R = R = 500 W or equivalent  
L
1
OUT  
R = Z  
T
of pulse generator (typically 50 W)  
http://onsemi.com  
4
MC74LCX06  
PACKAGE DIMENSIONS  
SOIC−14  
D SUFFIX  
CASE 751A−03  
ISSUE G  
NOTES:  
−A−  
1. DIMENSIONING AND TOLERANCING PER  
ANSI Y14.5M, 1982.  
14  
8
2. CONTROLLING DIMENSION: MILLIMETER.  
3. DIMENSIONS A AND B DO NOT INCLUDE  
MOLD PROTRUSION.  
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)  
PER SIDE.  
−B−  
P 7 PL  
5. DIMENSION D DOES NOT INCLUDE  
DAMBAR PROTRUSION. ALLOWABLE  
DAMBAR PROTRUSION SHALL BE 0.127  
(0.005) TOTAL IN EXCESS OF THE D  
DIMENSION AT MAXIMUM MATERIAL  
CONDITION.  
M
M
B
0.25 (0.010)  
7
1
G
F
R X 45  
_
C
MILLIMETERS  
DIM MIN MAX  
INCHES  
MIN MAX  
A
B
C
D
F
G
J
K
M
P
R
8.55  
3.80  
1.35  
0.35  
0.40  
8.75 0.337 0.344  
4.00 0.150 0.157  
1.75 0.054 0.068  
0.49 0.014 0.019  
1.25 0.016 0.049  
0.050 BSC  
0.25 0.008 0.009  
0.25 0.004 0.009  
−T−  
SEATING  
PLANE  
J
M
K
D 14 PL  
M
S
S
A
0.25 (0.010)  
T
B
1.27 BSC  
0.19  
0.10  
0
7
0
7
_
_
_
_
5.80  
0.25  
6.20 0.228 0.244  
0.50 0.010 0.019  
TSSOP−14  
DT SUFFIX  
CASE 948G−01  
ISSUE O  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
2. CONTROLLING DIMENSION: MILLIMETER.  
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH,  
PROTRUSIONS OR GATE BURRS. MOLD FLASH  
OR GATE BURRS SHALL NOT EXCEED 0.15  
(0.006) PER SIDE.  
4. DIMENSION B DOES NOT INCLUDE INTERLEAD  
FLASH OR PROTRUSION. INTERLEAD FLASH OR  
PROTRUSION SHALL NOT EXCEED  
0.25 (0.010) PER SIDE.  
14X K REF  
M
S
S
0.10 (0.004)  
T U  
V
S
0.15 (0.006) T U  
N
0.25 (0.010)  
14  
8
2X L/2  
M
B
−U−  
5. DIMENSION K DOES NOT INCLUDE DAMBAR  
PROTRUSION. ALLOWABLE DAMBAR  
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN  
EXCESS OF THE K DIMENSION AT MAXIMUM  
MATERIAL CONDITION.  
L
N
PIN 1  
IDENT.  
F
7
1
6. TERMINAL NUMBERS ARE SHOWN FOR  
REFERENCE ONLY.  
DETAIL E  
7. DIMENSION A AND B ARE TO BE DETERMINED  
AT DATUM PLANE −W−.  
S
K
0.15 (0.006) T U  
A
MILLIMETERS  
INCHES  
MIN  
K1  
DIM MIN  
MAX  
5.10  
4.50  
1.20  
0.15  
0.75  
MAX  
0.200  
0.177  
0.047  
0.006  
0.030  
−V−  
A
B
4.90  
4.30  
−−−  
0.193  
0.169  
−−−  
J J1  
C
D
0.05  
0.50  
0.002  
0.020  
F
SECTION N−N  
G
H
0.65 BSC  
0.026 BSC  
0.50  
0.09  
0.09  
0.19  
0.19  
0.60  
0.20  
0.16  
0.30  
0.25  
0.020  
0.004  
0.004  
0.007  
0.007  
0.024  
0.008  
0.006  
0.012  
0.010  
J
J1  
K
−W−  
C
K1  
L
6.40 BSC  
0.252 BSC  
0
0.10 (0.004)  
M
0
8
8
_
_
_
_
SEATING  
PLANE  
−T−  
H
G
DETAIL E  
D
http://onsemi.com  
5
MC74LCX06  
PACKAGE DIMENSIONS  
SOEIAJ−14  
M SUFFIX  
CASE 965−01  
ISSUE O  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
2. CONTROLLING DIMENSION: MILLIMETER.  
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD  
FLASH OR PROTRUSIONS AND ARE MEASURED  
AT THE PARTING LINE. MOLD FLASH OR  
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)  
PER SIDE.  
L
14  
8
E
Q
1
H
E
_
E
M
4. TERMINAL NUMBERS ARE SHOWN FOR  
REFERENCE ONLY.  
L
7
1
5. THE LEAD WIDTH DIMENSION (b) DOES NOT  
INCLUDE DAMBAR PROTRUSION. ALLOWABLE  
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)  
TOTAL IN EXCESS OF THE LEAD WIDTH  
DIMENSION AT MAXIMUM MATERIAL CONDITION.  
DAMBAR CANNOT BE LOCATED ON THE LOWER  
RADIUS OR THE FOOT. MINIMUM SPACE  
BETWEEN PROTRUSIONS AND ADJACENT LEAD  
TO BE 0.46 ( 0.018).  
DETAIL P  
Z
D
VIEW P  
A
e
c
MILLIMETERS  
INCHES  
MIN  
−−−  
DIM MIN  
MAX  
MAX  
0.081  
0.008  
0.020  
0.011  
0.413  
0.215  
A
−−−  
0.05  
0.35  
0.18  
9.90  
5.10  
2.05  
b
A
1
A
1
b
c
0.20 0.002  
0.50 0.014  
0.27 0.007  
M
0.13 (0.005)  
0.10 (0.004)  
D
E
e
10.50 0.390  
5.45 0.201  
1.27 BSC  
0.050 BSC  
H
7.40  
0.50  
1.10  
8.20 0.291  
0.85 0.020  
1.50 0.043  
0.323  
0.033  
0.059  
E
L
L
E
M
0
10  
0.90 0.028  
10  
_
0.035  
0.056  
0
_
_
_
Q
0.70  
−−−  
1
Z
1.42  
−−−  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice  
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All  
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights  
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should  
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,  
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death  
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal  
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMENT:  
N. American Technical Support: 800−282−9855 Toll Free  
USA/Canada  
ON Semiconductor Website: http://onsemi.com  
Order Literature: http://www.onsemi.com/litorder  
Literature Distribution Center for ON Semiconductor  
P.O. Box 61312, Phoenix, Arizona 85082−1312 USA  
Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada  
Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada  
Email: orderlit@onsemi.com  
Japan: ON Semiconductor, Japan Customer Focus Center  
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051  
Phone: 81−3−5773−3850  
For additional information, please contact your  
local Sales Representative.  
MC74LCX06/D  

相关型号:

MC74LCX06_12

Low-Voltage CMOS Hex Inverter with Open Drain Outputs
ONSEMI

MC74LCX07

Low-Voltage CMOS Hex Buffer with Open Drain Outputs
ONSEMI

MC74LCX07D

Low-Voltage CMOS Hex Buffer with Open Drain Outputs
ONSEMI

MC74LCX07DG

Low-Voltage CMOS Hex Buffer with Open Drain Outputs
ONSEMI

MC74LCX07DR2

Low-Voltage CMOS Hex Buffer with Open Drain Outputs
ONSEMI

MC74LCX07DR2

LVC/LCX/Z SERIES, HEX 1-INPUT NON-INVERT GATE, PDSO14, SOIC-14
ROCHESTER

MC74LCX07DR2G

Low-Voltage CMOS Hex Buffer with Open Drain Outputs
ONSEMI

MC74LCX07DT

Low-Voltage CMOS Hex Buffer with Open Drain Outputs
ONSEMI

MC74LCX07DTG

Low-Voltage CMOS Hex Buffer with Open Drain Outputs
ONSEMI

MC74LCX07DTR2

Low-Voltage CMOS Hex Buffer with Open Drain Outputs
ONSEMI

MC74LCX07DTR2

LVC/LCX/Z SERIES, HEX 1-INPUT NON-INVERT GATE, PDSO14, LEAD FREE, TSSOP-14
ROCHESTER

MC74LCX07DTR2G

Low-Voltage CMOS Hex Buffer with Open Drain Outputs
ONSEMI