MC74LVX245MELG [ONSEMI]

LV/LV-A/LVX/H SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO20, LEAD FREE, EIAJ, SO-20;
MC74LVX245MELG
型号: MC74LVX245MELG
厂家: ONSEMI    ONSEMI
描述:

LV/LV-A/LVX/H SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO20, LEAD FREE, EIAJ, SO-20

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MC74LVX245  
Octal Bus Transceiver  
With 5 V−Tolerant Inputs  
The MC74LVX245 is an advanced high speed CMOS octal bus  
transceiver.  
It is intended for two−way asynchronous communication between  
data buses. The direction of data transmission is determined by the  
level of the T/R input. The output enable pin (OE) can be used to  
disable the device, so that the buses are effectively isolated.  
All inputs are equipped with protection circuits against static  
discharge.  
http://onsemi.com  
MARKING  
DIAGRAMS  
20  
Features  
SOIC−20  
DW SUFFIX  
CASE 751D  
LVX245  
AWLYYWW  
High Speed: t = 4.7 ns (Typ) at V = 3.3 V  
PD  
CC  
20  
Low Power Dissipation: I = 4 mA (Max) at T = 25°C  
CC  
A
1
Power Down Protection Provided on Inputs  
1
Balanced Propagation Delays  
Low Noise: V  
= 0.8 V (Max)  
OLP  
20  
1
Pin and Function Compatible with Other Standard Logic Families  
Latchup Performance Exceeds 300 mA  
ESD Performance: Human Body Model > 2000 V;  
Machine Model > 200 V  
LVX  
245  
ALYW  
TSSOP−20  
DT SUFFIX  
CASE 948E  
20  
1
Pb−Free Packages are Available*  
Application Notes  
20  
Do not force a signal on an I/O pin when it is an active output,  
damage may occur  
SOEIAJ−20  
M SUFFIX  
CASE 967  
74LVX245  
AWLYWW  
All floating (high impedance) input or I/O pins must be fixed by  
means of pullup or pulldown resistors or bus terminator ICs  
20  
1
1
A parasitic diode is formed between the bus and V terminals.  
CC  
Therefore, the LVX245 cannot be used to interface 5.0 V to 3.0 V  
systems directly  
V
OE  
19  
B0  
18  
B1  
17  
B2  
16  
B3  
15  
B4  
14  
B5  
13  
B6  
12  
B7  
11  
CC  
A
= Assembly Location  
WL, L = Wafer Lot  
Y, YY = Year  
20  
W, WW = Work Week  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 2 of this data sheet.  
1
2
3
4
5
6
7
9
8
10  
T/R  
A0  
A1  
A2  
A3  
A4  
A5  
A6  
A7 GND  
Figure 1. 20−Lead Pinout (Top View)  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
March, 2005 − Rev. 3  
MC74LVX245/D  
MC74LVX245  
Table 1. PIN NAMES  
OE 19  
T/R 1  
Pins  
Function  
OE  
Output Enable Input  
T/R  
A0−A7  
Bo−B7  
Transmit/Receive Input  
Side A 3−State Inputs or 3−State Outputs  
Side B 3−State Inputs or 3−State Outputs  
2
3
4
5
6
7
8
9
A0  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
18  
17  
16  
15  
14  
13  
12  
B0  
B1  
B2  
B3  
B4  
B5  
B6  
B7  
INPUTS  
OPERATING MODE  
Non−Inverting  
OE  
L
T/R  
L
B Data to A Bus  
A Data to B Bus  
Z
L
H
H
X
H = High Voltage Level; L = Low Voltage Level; Z = High  
Impedance State; X = High or Low Voltage Level and Transitions  
are Acceptable; For I reasons, Do Not Float Inputs  
CC  
11  
Figure 2. Logic Diagram  
ORDERING INFORMATION  
Device  
Package  
Shipping  
MC74LVX245DWR2  
MC74LVX245DWR2G  
SOIC−20  
1000 / Tape & Reel  
1000 / Tape & Reel  
SOIC−20  
(Pb−Free)  
MC74LVX245DTR2  
MC74LVX245M  
TSSOP−20*  
2500 / Tape & Reel  
50 Units / Rail  
SOEIAJ−20  
(Pb−Free)  
MC74LVX245MEL  
SOEIAJ−20  
(Pb−Free)  
2000 / Tape & Reel  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging  
Specifications Brochure, BRD8011/D.  
*This package is inherently Pb−Free.  
http://onsemi.com  
2
MC74LVX245  
MAXIMUM RATINGS  
Symbol  
Parameter  
Value  
Unit  
V
V
CC  
DC Supply Voltage  
–0.5 to +7.0  
–0.5 to +7.0  
V
DC Input Voltage (T/R, OE)  
DC Output Voltage  
V
in  
I/O  
IK  
V
–0.5 to V +0.5  
V
CC  
I
Input Diode Current  
−20  
±20  
mA  
mA  
mA  
mA  
mW  
°C  
I
Output Diode Current  
DC Output Current, per Pin  
OK  
I
±25  
out  
CC  
I
DC Supply Current, V and GND Pins  
±75  
CC  
P
D
Power Dissipation  
180  
T
stg  
Storage Temperature  
–65 to +150  
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit  
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,  
damage may occur and reliability may be affected.  
RECOMMENDED OPERATING CONDITIONS  
Symbol  
Parameter  
Min  
2.0  
0
Max  
3.6  
Unit  
V
V
CC  
DC Supply Voltage  
V
in  
DC Input Voltage (T/R, OE)  
DC Output Voltage  
5.5  
V
V
I/O  
0
V
CC  
V
T
Operating Temperature, All Package Types  
Input Rise and Fall Time  
−40  
0
+85  
100  
°C  
ns/V  
A
Dt/DV  
DC ELECTRICAL CHARACTERISTICS  
T
A
= 25°C  
T
A
= − 40 to 85°C  
V
CC  
V
Min  
Typ  
Max  
Min  
1.5  
2.0  
2.4  
Max  
Symbol  
Parameter  
Test Conditions  
Unit  
V
IH  
High−Level Input Voltage  
2.0  
3.0  
3.6  
1.5  
2.0  
2.4  
V
V
Low−Level Input Voltage  
High−Level Output Voltage  
2.0  
3.0  
3.6  
0.5  
0.8  
0.8  
0.5  
0.8  
0.8  
V
V
V
IL  
V
OH  
I
I
I
= −50 mA  
= −50 mA  
= −4 mA  
2.0  
3.0  
3.0  
1.9  
2.9  
2.58  
2.0  
3.0  
1.9  
2.9  
2.48  
OH  
OH  
OH  
(V = V or V )  
in  
IH  
IL  
V
I
Low−Level Output Voltage  
(V = V or V )  
I
OL  
I
OL  
I
OL  
= 50 mA  
= 50 mA  
= 4 mA  
2.0  
3.0  
3.0  
0.0  
0.0  
0.1  
0.1  
0.36  
0.1  
0.1  
0.44  
OL  
in  
IH  
IL  
Input Leakage Current  
V
= 5.5 V or GND  
3.6  
3.6  
3.6  
±0.1  
±1.0  
±2.5  
40.0  
mA  
mA  
mA  
in  
in  
(T/R, OE)  
= V or V  
IH  
I
Maximum 3−State Leakage Current  
Quiescent Supply Current  
V
V
±0.2  
5
OZ  
in  
out  
IL  
= V or GND  
CC  
I
V
= V or GND  
4.0  
CC  
in  
CC  
http://onsemi.com  
3
MC74LVX245  
AC ELECTRICAL CHARACTERISTICS (Input t = t = 3.0 ns)  
r
f
T
A
= 25°C  
T = − 40 to 85°C  
A
Min  
Typ  
Max  
Min  
1.0  
Max  
Symbol  
Parameter  
Test Conditions  
Unit  
t
t
t
,
Propagation Delay  
Input to Output  
V
V
V
= 2.7 V  
C = 15 pF  
L
6.1  
8.6  
10.7  
14.2  
13.5  
17.0  
ns  
PLH  
t
CC  
CC  
CC  
C = 50 pF  
L
1.0  
PHL  
= 3.3 ± 0.3 V  
= 2.7 V  
C = 15 pF  
C = 50 pF  
L
4.7  
7.2  
6.6  
10.1  
1.0  
1.0  
8.0  
11.5  
L
,
Output Enable Time to  
High and Low Level  
C = 15 pF  
L
9.0  
11.5 20.4  
16.9  
1.0  
1.0  
20.5  
24.0  
ns  
ns  
ns  
PZL  
t
R = 1 kW  
C = 50 pF  
L
PZH  
L
V
CC  
= 3.3 ± 0.3 V  
C = 15 pF  
L
7.1  
9.6  
11.0  
14.5  
1.0  
1.0  
13.0  
16.5  
R = 1 kW  
C = 50 pF  
L
L
,
Output Disable Time From  
High and Low Level  
V
CC  
= 2.7 V  
C = 50 pF  
L
11.5 18.0  
1.0  
21.0  
PLZ  
t
R = 1 kW  
PHZ  
L
V
CC  
= 3.3 ± 0.3 V  
C = 50 pF  
L
9.6  
12.8  
1.0  
14.5  
R = 1 kW  
L
t
t
Output−to−Output Skew  
(Note 1)  
V
CC  
V
CC  
= 2.7 V  
C = 50 pF  
L
1.5  
1.5  
1.5  
1.5  
OSHL  
OSLH  
= 3.3 ±0.3 V  
C = 50 pF  
L
1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.  
The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (t  
guaranteed by design.  
) or LOW−to−HIGH (t  
); parameter  
OSHL  
OSLH  
CAPACITIVE CHARACTERISTICS  
T
A
= 25°C  
T = − 40 to 85°C  
A
Min  
Typ  
4
Max  
Min  
Max  
Symbol  
Parameter  
Unit  
pF  
C
Input Capacitance (T/R, OE)  
10  
10  
in  
C
I/O  
C
PD  
Maximum 3−State I/O Capacitance  
8
pF  
Power Dissipation Capacitance (Note 2)  
21  
pF  
2. C is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.  
PD  
Average operating current can be obtained by the equation: I  
dynamic power consumption; P = C V  
) = C V f + I /8 (per bit). C is used to determine the no−load  
CC(OPR  
PD CC in CC PD  
2
f + I V  
.
D
PD  
CC  
in  
CC  
CC  
NOISE CHARACTERISTICS (Input t = t = 3.0ns, C = 50pF, V = 3.3V, Measured in SOIC Package)  
r
f
L
CC  
T
A
= 25°C  
Typ  
0.5  
Max  
Symbol  
Characteristic  
Unit  
V
V
Quiet Output Maximum Dynamic V  
0.8  
−0.8  
2.0  
OLP  
OLV  
OL  
V
Quiet Output Minimum Dynamic V  
−0.5  
V
OL  
V
IHD  
Minimum High Level Dynamic Input Voltage  
Maximum Low Level Dynamic Input Voltage  
V
V
ILD  
0.8  
V
http://onsemi.com  
4
 
MC74LVX245  
SWITCHING WAVEFORMS  
V
CC  
T/R  
50%  
GND  
V
CC  
V
CC  
Input  
50% V  
OE  
50% V  
CC  
CC  
50%  
A or B  
GND  
t
t
PLZ  
GND  
PZL  
HIGH  
t
t
PHL  
PLH  
IMPEDANCE  
50% V  
Output  
B or A  
CC  
A or B  
A or B  
50% V  
CC  
V
+0.3V  
−0.3V  
OL  
t
t
PHZ  
PZH  
V
OH  
50% V  
CC  
HIGH  
IMPEDANCE  
Figure 3.  
Figure 4.  
TEST CIRCUITS  
TEST POINT  
OUTPUT  
TEST POINT  
1 kW  
CONNECT TO V WHEN  
CC  
OUTPUT  
TESTING t AND t  
PLZ  
.
PZL  
DEVICE  
UNDER  
TEST  
DEVICE  
UNDER  
TEST  
CONNECT TO GND WHEN  
TESTING t AND t  
.
PZH  
PHZ  
C *  
L
C *  
L
*Includes all probe and jig capacitance  
*Includes all probe and jig capacitance  
Figure 5. Propagation Delay Test Circuit  
Figure 6. 3−State Test Circuit  
http://onsemi.com  
5
MC74LVX245  
PACKAGE DIMENSIONS  
SOIC−20  
DW SUFFIX  
CASE 751D−05  
ISSUE G  
NOTES:  
D
1. DIMENSIONS ARE IN MILLIMETERS.  
2. INTERPRET DIMENSIONS AND TOLERANCES  
PER ASME Y14.5M, 1994.  
A
q
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD  
PROTRUSION.  
20  
11  
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.  
5. DIMENSION B DOES NOT INCLUDE DAMBAR  
PROTRUSION. ALLOWABLE PROTRUSION  
SHALL BE 0.13 TOTAL IN EXCESS OF B  
DIMENSION AT MAXIMUM MATERIAL  
CONDITION.  
E
B
1
10  
MILLIMETERS  
DIM MIN  
MAX  
2.65  
0.25  
0.49  
0.32  
12.95  
7.60  
A
A1  
B
C
D
E
2.35  
0.10  
0.35  
0.23  
12.65  
7.40  
20X B  
M
S
S
B
T
0.25  
A
e
1.27 BSC  
H
h
10.05  
0.25  
0.50  
0
10.55  
0.75  
0.90  
7
A
L
q
_
_
SEATING  
PLANE  
18X e  
A1  
C
T
TSSOP−20  
DT SUFFIX  
CASE 948E−02  
ISSUE B  
NOTES:  
20X K REF  
1. DIMENSIONING AND TOLERANCING  
PER ANSI Y14.5M, 1982.  
2. CONTROLLING DIMENSION:  
MILLIMETER.  
M
S
S
V
0.10 (0.004)  
T U  
S
0.15 (0.006) T U  
K
3. DIMENSION A DOES NOT INCLUDE  
MOLD FLASH, PROTRUSIONS OR GATE  
BURRS. MOLD FLASH OR GATE BURRS  
SHALL NOT EXCEED 0.15 (0.006) PER  
SIDE.  
4. DIMENSION B DOES NOT INCLUDE  
INTERLEAD FLASH OR PROTRUSION.  
INTERLEAD FLASH OR PROTRUSION  
SHALL NOT EXCEED 0.25 (0.010) PER  
SIDE.  
K1  
20  
11  
2X L/2  
J J1  
B
L
−U−  
PIN 1  
IDENT  
SECTION N−N  
5. DIMENSION K DOES NOT INCLUDE  
DAMBAR PROTRUSION. ALLOWABLE  
DAMBAR PROTRUSION SHALL BE 0.08  
(0.003) TOTAL IN EXCESS OF THE K  
DIMENSION AT MAXIMUM MATERIAL  
CONDITION.  
1
10  
0.25 (0.010)  
N
S
0.15 (0.006) T U  
6. TERMINAL NUMBERS ARE SHOWN  
FOR REFERENCE ONLY.  
7. DIMENSION A AND B ARE TO BE  
DETERMINED AT DATUM PLANE −W−.  
M
A
−V−  
N
MILLIMETERS  
DIM MIN MAX  
INCHES  
MIN  
MAX  
0.260  
0.177  
0.047  
0.006  
0.030  
F
A
B
6.40  
4.30  
−−−  
6.60 0.252  
4.50 0.169  
DETAIL E  
C
1.20  
−−−  
D
0.05  
0.50  
0.15 0.002  
0.75 0.020  
−W−  
F
C
G
H
0.65 BSC  
0.026 BSC  
0.27  
0.09  
0.09  
0.19  
0.19  
0.37  
0.011  
0.015  
0.008  
0.006  
0.012  
0.010  
J
0.20 0.004  
0.16 0.004  
0.30 0.007  
0.25 0.007  
G
D
J1  
K
H
DETAIL E  
0.100 (0.004)  
−T− SEATING  
K1  
L
6.40 BSC  
0 8 0 8  
0.252 BSC  
M
_
_
_
_
PLANE  
http://onsemi.com  
6
MC74LVX245  
PACKAGE DIMENSIONS  
SOEIAJ−20  
M SUFFIX  
CASE 967−01  
ISSUE O  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
L
E
20  
11  
Q
2. CONTROLLING DIMENSION: MILLIMETER.  
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD  
FLASH OR PROTRUSIONS AND ARE MEASURED  
AT THE PARTING LINE. MOLD FLASH OR  
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)  
PER SIDE.  
1
H
E
_
E
M
4. TERMINAL NUMBERS ARE SHOWN FOR  
REFERENCE ONLY.  
L
1
10  
5. THE LEAD WIDTH DIMENSION (b) DOES NOT  
INCLUDE DAMBAR PROTRUSION. ALLOWABLE  
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)  
TOTAL IN EXCESS OF THE LEAD WIDTH  
DIMENSION AT MAXIMUM MATERIAL CONDITION.  
DAMBAR CANNOT BE LOCATED ON THE LOWER  
RADIUS OR THE FOOT. MINIMUM SPACE  
BETWEEN PROTRUSIONS AND ADJACENT LEAD  
TO BE 0.46 ( 0.018).  
DETAIL P  
Z
D
VIEW P  
e
A
c
MILLIMETERS  
INCHES  
MIN  
DIM MIN  
MAX  
2.05  
0.20  
0.50  
0.27  
12.80  
5.45  
MAX  
0.081  
0.008  
0.020  
0.011  
0.504  
0.215  
A
A
1
−−−  
0.05  
0.35  
0.18  
12.35  
5.10  
−−−  
0.002  
0.014  
0.007  
0.486  
0.201  
A
b
1
b
c
M
0.10 (0.004)  
0.13 (0.005)  
D
E
e
1.27 BSC  
0.050 BSC  
H
7.40  
0.50  
1.10  
8.20  
0.85  
1.50  
0.291  
0.020  
0.043  
0.323  
0.033  
0.059  
E
L
L
E
M
Q
0
10  
0
10  
_
0.035  
0.032  
_
_
_
0.70  
−−−  
0.90  
0.81  
0.028  
−−−  
1
Z
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7
MC74LVX245  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice  
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All  
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights  
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should  
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,  
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death  
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal  
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
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Order Literature: http://www.onsemi.com/litorder  
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For additional information, please contact your  
local Sales Representative.  
MC74LVX245/D  

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VISHAY

SI9135LG-T1-E3

SMBus Multi-Output Power-Supply Controller

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VISHAY

SI9135_11

SMBus Multi-Output Power-Supply Controller

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VISHAY

SI9136_11

Multi-Output Power-Supply Controller

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VISHAY

SI9130CG-T1-E3

Pin-Programmable Dual Controller - Portable PCs

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VISHAY

SI9130LG-T1-E3

Pin-Programmable Dual Controller - Portable PCs

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VISHAY

SI9130_11

Pin-Programmable Dual Controller - Portable PCs

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VISHAY

SI9137

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

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VISHAY

SI9137DB

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

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VISHAY

SI9137LG

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

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VISHAY

SI9122E

500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification Drivers

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VISHAY