MC74LVXU04DG [ONSEMI]
Hex Inverter(Unbuffered); 六反相器（无缓冲）
| 型号： | MC74LVXU04DG |
| 厂家： | 
ONSEMI |
| 描述： | Hex Inverter(Unbuffered) |
| 文件： | 总6页 (文件大小：83K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MC74LVXU04
Hex Inverter
(Unbuffered)
The MC74LVX04 is an advanced high speed CMOS unbuffered hex
inverter. The inputs tolerate voltages up to 7.0 V, allowing the
interface of 5.0 V systems to 3.0 V systems.
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MARKING
Features
• High Speed: t = 4.1 ns (Typ) at V = 3.3 V
PD
CC
DIAGRAMS
• Low Power Dissipation: I = 2 mA (Max) at T = 25°C
CC
A
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
14
SOIC−14
D SUFFIX
CASE 751A
LVXU04
AWLYWW
14
• Low Noise: V
= 0.5 V (Max)
OLP
1
• Pin and Function Compatible with Other Standard Logic Families
• Pb−Free Packages are Available*
1
14
TSSOP−14
DT SUFFIX
CASE 948G
LVX
U04
ALYW
14
1
1
14
74LVXU04
ALYW
SOEIAJ−14
M SUFFIX
CASE 965
14
1
1
A
=
=
=
=
Assembly Location
Wafer Lot
Year
WL or L
Y
WW or W
Work Week
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
Semiconductor Components Industries, LLC, 2005
1
Publication Order Number:
March, 2005 − Rev. 1
MC74LVXU04/D
MC74LVXU04
V
A5
13
O5
12
A4
11
O4
10
A3
9
O3
8
1
CC
2
4
A0
O0
O1
O2
O3
O4
O5
14
3
A1
A2
A3
A4
A5
5
6
13
11
9
8
1
2
3
4
5
6
7
10
12
A0
O0
A1
O1
A2
O2 GND
14−Lead Pinout (Top View)
PIN NAMES
Pins
Figure 1. Logic Diagram
Function
An
On
Data Inputs
Outputs
FUNCTION TABLE
An
On
L
H
H
L
ORDERING INFORMATION
Device
†
Package
Shipping
MC74LVXU04D
SOIC−14
55 Units / Rail
55 Units / Rail
MC74LVXU04DG
SOIC−14
(Pb−Free)
MC74LVXU04DR2
MC74LVXU04DR2G
SOIC−14
2500 Tape & Reel
2500 Tape & Reel
SOIC−14
(Pb−Free)
MC74LVXU04DT
MC74LVXU04DTR2
MC74LVXU04M
TSSOP−14*
TSSOP−14*
SOEIAJ−14
96 Units / Rail
2500 Tape & Reel
50 Units / Rail
MC74LVXU04MG
SOEIAJ−14
(Pb−Free)
50 Units / Rail
MC74LVXU04MEL
MC74LVXU04MELG
SOEIAJ−14
2000 Tape & Reel
2000 Tape & Reel
SOEIAJ−14
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb−Free.
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2
MC74LVXU04
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
V
CC
DC Supply Voltage
*0.5 to )7.0
*0.5 to )7.0
V
IN
DC Input Voltage
V
V
OUT
DC Output Voltage
*0.5 to V )0.5
V
CC
I
DC Input Diode Current
DC Output Diode Current
DC Output Sink Current
DC Supply Current per Supply Pin
Storage Temperature Range
V < GND
*20
$20
mA
mA
mA
mA
_C
IK
I
I
V
< GND
O
OK
I
$25
OUT
I
$50
CC
T
*65 to )150
260
STG
T
Lead Temperature, 1 mm from Case for 10 Seconds
Junction Temperature under Bias
Thermal Resistance
_C
L
T
)150
250
_C
_C/W
J
q
SOIC
TSSOP
JA
P
D
Power Dissipation in Still Air at 85_C
SOIC
TSSOP
250
mW
MSL
Moisture Sensitivity
Flammability Rating
ESD Withstand Voltage
Level 1
F
R
Oxygen Index: 30% − 35%
UL 94−V0 @ 0.125 in
V
ESD
Human Body Model (Note 1)
Machine Model (Note 2)
> 2000
> 200
2000
V
Charged Device Model (Note 3)
I
Latchup Performance
Above V and Below GND at 85_C (Note 4)
$300
mA
Latchup
CC
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. Tested to EIA/JESD22−A114−A.
2. Tested to EIA/JESD22−A115−A.
3. Tested to JESD22−C101−A.
4. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
2.0
0
Max
3.6
Unit
V
V
CC
Supply Voltage
V
I
Input Voltage
(Note 5)
5.5
V
V
O
Output Voltage
(HIGH or LOW State)
0
V
CC
V
T
Operating Free−Air Temperature
Input Transition Rise or Fall Rate
*40
0
)85
_C
ns/V
A
Dt/DV
V
= 3.0 V $0.3 V
100
CC
5. Unused inputs may not be left open. All inputs must be tied to a high− or low−logic input voltage level.
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3
MC74LVXU04
DC ELECTRICAL CHARACTERISTICS
T
A
= 25°C
T = −40 to 85°C
A
V
CC
V
Min
Typ
Max
Min
1.5
2.0
2.4
Max
Symbol
Parameter
Test Conditions
Unit
V
IH
High−Level Input Voltage
2.0
3.0
3.6
1.5
2.0
2.4
V
V
Low−Level Input Voltage
High−Level Output Voltage
2.0
3.0
3.6
0.5
0.8
0.8
0.5
0.8
0.8
V
V
V
IL
V
OH
I
I
I
= −50 mA
= −50 mA
= −4 mA
2.0
3.0
3.0
1.9
2.9
2.58
2.0
3.0
1.9
2.9
2.48
OH
OH
OH
(V = V or V )
in
IH
IL
V
OL
Low−Level Output Voltage
(V = V or V )
I
OL
I
OL
I
OL
= 50 mA
= 50 mA
= 4 mA
2.0
3.0
3.0
0.0
0.0
0.1
0.1
0.36
0.1
0.1
0.44
in
IH
IL
I
Input Leakage Current
V
V
= 5.5 V or GND
3.6
3.6
±0.1
±1.0
mA
mA
in
in
I
Quiescent Supply Current
= V or GND
2.0
20.0
CC
in
CC
AC ELECTRICAL CHARACTERISTICS (Input t = t = 3.0ns)
r
f
T
A
= 25°C
T = −40 to 85°C
A
Min
Typ
Max
Min
Max
Symbol
Parameter
Test Conditions
Unit
Propagation Delay, Input to
Output
t
t
,
V
V
= 2.7V
C = 15 pF
C = 50 pF
L
5.4
7.9
10.1
13.6
1.0
1.0
12.5
16.0
ns
PLH
CC
L
PHL
= 3.3 ± 0.3V C = 15 pF
4.1
6.6
6.2
9.7
1.0
1.0
7.5
11.0
CC
L
C = 50 pF
L
t
t
Output−to−Output Skew
(Note 6)
V
CC
V
CC
= 2.7V
= 3.3 ±0.3V C = 50 pF
C = 50 pF
1.5
1.5
1.5
1.5
ns
OSHL
OSLH
L
L
6. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (t
) or LOW−to−HIGH (t
); parameter
OSHL
OSLH
guaranteed by design.
CAPACITIVE CHARACTERISTICS
T
A
= 25°C
T = −40 to 85°C
A
Min
Typ
4
Max
Min
Max
Symbol
Parameter
Unit
pF
Cin
Input Capacitance
Power Dissipation Capacitance (Note 7)
10
10
C
18
pF
PD
7. C is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
PD
Average operating current can be obtained by the equation: I
no−load dynamic power consumption; P = C ꢀ V
) = C ꢀ V ꢀ f + I /6 (per buffer). C is used to determine the
CC(OPR
PD CC in CC PD
2
ꢀ f + I ꢀ V
.
D
PD
CC
in
CC
CC
NOISE CHARACTERISTICS (Input t = t = 3.0 ns, C = 50 pF, V = 3.3 V, Measured in SOIC Package)
r
f
L
CC
T
A
= 25°C
Typ
0.3
Max
Symbol
Characteristic
Unit
V
V
Quiet Output Maximum Dynamic V
0.5
−0.5
2.0
OLP
OLV
OL
V
Quiet Output Minimum Dynamic V
−0.3
V
OL
V
IHD
Minimum High Level Dynamic Input Voltage
Maximum Low Level Dynamic Input Voltage
V
V
ILD
0.8
V
TEST POINT
V
CC
A
OUTPUT
50%
DEVICE
UNDER
TEST
GND
t
t
PHL
PLH
C *
L
O
50% V
CC
*Includes all probe and jig capacitance
Figure 2. Switching Waveforms
Figure 3. Test Circuit
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4
MC74LVXU04
PACKAGE DIMENSIONS
SOIC−14
D SUFFIX
CASE 751A−03
ISSUE G
NOTES:
−A−
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
14
8
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
−B−
P 7 PL
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.127
(0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
M
M
B
0.25 (0.010)
7
1
G
F
R X 45
_
C
MILLIMETERS
DIM MIN MAX
INCHES
MIN MAX
A
B
C
D
F
G
J
K
M
P
R
8.55
3.80
1.35
0.35
0.40
8.75 0.337 0.344
4.00 0.150 0.157
1.75 0.054 0.068
0.49 0.014 0.019
1.25 0.016 0.049
0.050 BSC
0.25 0.008 0.009
0.25 0.004 0.009
−T−
SEATING
PLANE
J
M
K
D 14 PL
M
S
S
0.25 (0.010)
T
B
A
1.27 BSC
0.19
0.10
0
7
0
7
_
_
_
_
5.80
0.25
6.20 0.228 0.244
0.50 0.010 0.019
TSSOP−14
DT SUFFIX
CASE 948G−01
ISSUE A
NOTES:
14X K REF
1. DIMENSIONING AND TOLERANCING PER
M
S
S
V
ANSI Y14.5M, 1982.
0.10 (0.004)
T
U
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
S
0.15 (0.006) T U
N
0.25 (0.010)
14
8
2X L/2
M
B
−U−
L
N
PIN 1
IDENT.
F
7
1
DETAIL E
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
S
K
0.15 (0.006) T U
A
K1
−V−
MILLIMETERS
DIM MIN MAX
INCHES
MIN MAX
A
B
C
D
F
4.90
4.30
−−−
0.05
0.50
5.10 0.193 0.200
4.50 0.169 0.177
J J1
1.20
−−− 0.047
0.15 0.002 0.006
0.75 0.020 0.030
SECTION N−N
G
H
J
J1
K
0.65 BSC
0.026 BSC
0.60 0.020 0.024
0.20 0.004 0.008
0.16 0.004 0.006
0.30 0.007 0.012
0.25 0.007 0.010
0.50
0.09
0.09
0.19
−W−
C
0.10 (0.004)
K1 0.19
L
M
6.40 BSC
0.252 BSC
SEATING
PLANE
−T−
H
G
DETAIL E
D
0
8
0
8
_
_
_
_
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5
MC74LVXU04
PACKAGE DIMENSIONS
SOEIAJ−14
M SUFFIX
CASE 965−01
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
L
14
8
E
Q
1
H
E
_
E
M
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
L
7
1
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
DETAIL P
Z
D
VIEW P
A
e
c
MILLIMETERS
INCHES
MIN
−−−
DIM MIN
MAX
MAX
0.081
0.008
0.020
0.011
0.413
0.215
A
−−−
0.05
0.35
0.18
9.90
5.10
2.05
b
A
1
A
1
b
c
0.20 0.002
0.50 0.014
0.27 0.007
M
0.13 (0.005)
0.10 (0.004)
D
E
e
10.50 0.390
5.45 0.201
1.27 BSC
0.050 BSC
H
7.40
0.50
1.10
8.20 0.291
0.85 0.020
1.50 0.043
0.323
0.033
0.059
E
L
L
E
M
0
10
0.90 0.028
10
_
0.035
0.056
0
_
_
_
Q
0.70
−−−
1
Z
1.42
−−−
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are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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MC74LVXU04/D
相关型号：
MC74VCX162240DT
ALVC/VCX/A SERIES, QUAD 4-BIT DRIVER, INVERTED OUTPUT, PDSO48, PLASTIC, TSSOP-48
MOTOROLA
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