MC74VHC1G126DTT2 [ONSEMI]
AHC/VHC SERIES, 1-BIT DRIVER, TRUE OUTPUT, PDSO5, SC-59, SOT-23, TSOP-5;
| 型号： | MC74VHC1G126DTT2 |
| 厂家： | 
ONSEMI |
| 描述： | AHC/VHC SERIES, 1-BIT DRIVER, TRUE OUTPUT, PDSO5, SC-59, SOT-23, TSOP-5 驱动 光电二极管 输出元件 逻辑集成电路 |
| 文件： | 总6页 (文件大小：120K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MC74VHC1G126
Noninverting 3-State Buffer
The MC74VHC1G126 is an advanced high speed CMOS
noninverting 3−state buffer fabricated with silicon gate CMOS
technology. It achieves high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining CMOS low power
dissipation.
The internal circuit is composed of three stages, including a buffered
3−state output which provides high noise immunity and stable output.
The MC74VHC1G126 input structure provides protection when
voltages up to 7 V are applied, regardless of the supply voltage. This
allows the MC74VHC1G126 to be used to interface 5 V circuits to 3 V
circuits.
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MARKING
DIAGRAMS
5
5
1
W2 M G
SC−88A / SOT−353 / SC−70
DF SUFFIX
Features
G
• High Speed: t = 3.5 ns (Typ) at V = 5 V
CASE 419A
PD
CC
1
5
• Low Power Dissipation: I = 1 mA (Max) at T = 25°C
CC
A
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
5
W2 M G
• Pin and Function Compatible with Other Standard Logic Families
• Chip Complexity: FETs = 58; Equivalent Gates = 15
• These Devices are Pb−Free and are RoHS Compliant
G
1
TSOP−5 / SOT−23 / SC−59
DT SUFFIX
1
CASE 483
W2 = Device Code
M
G
= Date Code*
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation and/or position may vary
depending upon manufacturing location.
5
1
2
3
V
CC
OE
IN A
GND
PIN ASSIGNMENT
4
OUT Y
1
2
3
4
5
OE
IN A
GND
Figure 1. Pinout (Top View)
OUT Y
V
CC
OE
IN A
EN
OUT Y
FUNCTION TABLE
OE Input
A Input
Y Output
Figure 2. Logic Symbol
L
H
X
H
H
L
L
H
Z
ORDERING INFORMATION
See detailed ordering and shipping information in the
package dimensions section on page 4 of this data sheet.
© Semiconductor Components Industries, LLC, 2011
1
Publication Order Number:
May, 2011 − Rev. 15
MC74VHC1G126/D
MC74VHC1G126
MAXIMUM RATINGS
Symbol
Characteristics
Value
Unit
V
V
CC
DC Supply Voltage
DC Input Voltage
DC Output Voltage
−0.5 to +7.0
−0.5 to +7.0
−0.5 to 7.0
V
IN
V
V
OUT
V
= 0
CC
V
High or Low State
−0.5 to V + 0.5
CC
I
Input Diode Current
−20
+20
mA
mA
mA
mA
mW
°C/W
°C
IK
I
Output Diode Current
DC Output Current, per Pin
V
< GND; V
> V
OK
OUT
OUT CC
I
+25
OUT
I
DC Supply Current, V and GND
+50
CC
CC
P
Power dissipation in still air
Thermal resistance
SC−88A, TSOP−5
SC−88A, TSOP−5
200
D
q
333
JA
T
Lead temperature, 1 mm from case for 10 secs
Junction temperature under bias
Storage temperature
260
L
T
+150
−65 to +150
°C
J
T
stg
°C
V
ESD
ESD Withstand Voltage
Human Body Model (Note 1)
Machine Model (Note 2)
Charged Device Model (Note 3)
> 2000
> 200
N/A
V
I
Latchup Performance
Above V and Below GND at 125°C (Note 4)
500
mA
Latchup
CC
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Tested to EIA/JESD22−A114−A
2. Tested to EIA/JESD22−A115−A
3. Tested to JESD22−C101−A
4. Tested to EIA/JESD78
RECOMMENDED OPERATING CONDITIONS
Symbol
Characteristics
Min
2.0
0.0
0.0
−55
Max
5.5
Unit
V
V
CC
DC Supply Voltage
V
IN
DC Input Voltage
5.5
V
V
OUT
DC Output Voltage
V
CC
V
T
A
Operating Temperature Range
Input Rise and Fall Time
+125
°C
ns/V
t , t
V
CC
V
CC
= 3.3 V 0.3 V
= 5.0 V 0.5 V
0
0
100
20
r
f
Device Junction Temperature versus
Time to 0.1% Bond Failures
Junction
Temperature °C
FAILURE RATE OF PLASTIC = CERAMIC
UNTIL INTERMETALLICS OCCUR
Time, Hours
Time, Years
117.8
47.9
80
1,032,200
419,300
178,700
79,600
37,000
17,800
8,900
90
100
110
120
130
140
20.4
1
9.4
4.2
1
10
100
1000
2.0
TIME, YEARS
1.0
Figure 3. Failure Rate vs. Time Junction Temperature
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2
MC74VHC1G126
DC ELECTRICAL CHARACTERISTICS
T
A
= 25°C
T
A
≤ 85°C
−55 ≤ T ≤ 125°C
A
V
CC
Min
Typ
Max
Min
Max
Min
Max
(V)
Symbol
Parameter
Test Conditions
Unit
V
IH
Minimum High−Level
Input Voltage
2.0
3.0
4.5
5.5
1.5
2.1
3.15
3.85
1.5
2.1
3.15
3.85
1.5
2.1
3.15
3.85
V
V
IL
Maximum Low−Level
Input Voltage
2.0
3.0
4.5
5.5
0.5
0.9
1.35
1.65
0.5
0.9
1.35
1.65
0.5
0.9
1.35
1.65
V
V
Minimum High−Level
V
OH
= V or V
2.0
3.0
4.5
1.9
2.9
4.4
2.0
3.0
4.5
1.9
2.9
4.4
1.9
2.9
4.4
V
V
V
V
OH
IN
IH
IL
IL
IL
IL
IL
Output Voltage
I
= −50 mA
V
IN
= V or V
IH IL
V
= V or V
IN
OH
OH
IH
I
I
= −4 mA
= −8 mA
3.0
4.5
2.58
3.94
2.48
3.80
2.34
3.66
V
Maximum Low−Level
V
OL
= V or V
2.0
3.0
4.5
0.0
0.0
0.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
OL
IN
IH
Output Voltage
I
= 50 mA
V
IN
= V or V
IH IL
V
= V or V
IN
OL
OL
IH
I
I
= 4 mA
= 8 mA
3.0
4.5
0.36
0.36
0.44
0.44
0.52
0.52
I
Maximum 3−State
Leakage Current
V
V
= V or V
5.5
0.2
5
2.5
1.0
20
2.5
1.0
40
mA
mA
mA
OZ
IN
OUT
IH
= V or GND
CC
I
Maximum Input
Leakage Current
V
= 5.5 V or GND
0 to
5.5
0.1
IN
IN
IN
I
Maximum Quiescent
Supply Current
V
= V or GND
5.5
1.0
CC
CC
AC ELECTRICAL CHARACTERISTICS C
= 50 pF, Input t = t = 3.0 ns
r f
load
T
A
= 25°C
T
A
≤ 85°C
−55 ≤ T ≤ 125°C
A
Min
Typ
Max
Min
Max
Min
Max
Symbol
Parameter
Test Conditions
Unit
t
,
Maximum Propagation
Delay, Input A to Y
(Figures 3. and 5.)
V
V
V
= 3.3 0.3 V C = 15 pF
4.5
6.4
8.0
9.5
12.0
16.0
ns
PLH
CC
CC
CC
L
t
C = 50 pF
11.5
13.0
PHL
L
= 5.0 0.5 V C = 15 pF
3.5
4.5
5.5
7.5
6.5
8.5
8.5
10.5
L
C = 50 pF
L
t
,
Maximum Output Enable
Time, Input OE to Y
(Figures 4. and 5.)
= 3.3 0.3 V C = 15 pF
4.5
6.4
8.0
11.5
9.5
13.0
11.5
15.0
ns
ns
PZL
L
L
t
R = 1000 W
C = 50 pF
PZH
L
V
CC
= 5.0 0.5 V C = 15 pF
3.5
4.5
5.1
7.1
6.0
8.0
8.5
10.5
L
R = 1000 W
C = 50 pF
L
L
t
,
Maximum Output Disable
Time, Input OE to Y
(Figures 4. and 5.)
V
CC
= 3.3 0.3 V C = 15 pF
6.5
8.0
9.7
13.2
11.5
15.0
14.5
18.0
PLZ
L
t
R = 1000 W
C = 50 pF
PHZ
L
L
V
CC
= 5.0 0.5 V C = 15 pF
4.8
7.0
6.8
8.8
8.0
10.0
10.0
12.0
L
R = 1000 W
C = 50 pF
L
L
C
Maximum Input
Capacitance
4.0
10
10
10
pF
pF
IN
C
Maximum 3−State Output
Capacitance (Output in
High Impedance State)
6.0
OUT
Typical @ 25°C, V = 5.0 V
CC
8.0
C
Power Dissipation Capacitance (Note 5)
pF
PD
5. C is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
PD
Average operating current can be obtained by the equation: I
) = C ꢀ V ꢀ f + I . C is used to determine the no−load dynamic
CC(OPR
PD CC in CC PD
2
power consumption; P = C ꢀ V
ꢀ f + I ꢀ V
.
D
PD
CC
in
CC
CC
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3
MC74VHC1G126
SWITCHING WAVEFORMS
V
CC
OE
50%
GND
t
t
PZL
PLZ
HIGH
V
CC
IMPEDANCE
50%
50% V
Y
Y
CC
A
Y
V
+ 0.3V
OL
GND
t
t
PZH
PHZ
t
PHL
t
PLH
V
OH
- 0.3V
50% V
CC
50% V
CC
HIGH
IMPEDANCE
Figure 4. Switching Waveforms
Figure 5.
TEST POINT
1 kW
TEST POINT
OUTPUT
CONNECT TO V WHEN
CC
TESTING t AND t
PLZ
OUTPUT
PZL.
CONNECT TO GND WHEN
TESTING t AND t
DEVICE
UNDER
TEST
DEVICE
UNDER
TEST
PHZ
PZH.
C *
L
C *
L
*Includes all probe and jig capacitance
*Includes all probe and jig capacitance
Figure 6. Test Circuit
Figure 7. Test Circuit
INPUT
Figure 8. Input Equivalent Circuit
Package
ORDERING INFORMATION
†
Device
Shipping
M74VHC1G126DFT1G
SC−88A/SOT−353/SC−70
(Pb−Free)
M74VHC1G126DFT2G
M74VHC1G126DTT1G
SC−88A/SOT−353/SC−70
(Pb−Free)
3000 Units / Tape & Reel
TSOP−5/SOT−23/SC−59
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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4
MC74VHC1G126
PACKAGE DIMENSIONS
SC−88A (SC−70−5/SOT−353)
CASE 419A−02
ISSUE K
A
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
G
2. CONTROLLING DIMENSION: INCH.
3. 419A−01 OBSOLETE. NEW STANDARD
419A−02.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
5
4
3
−B−
S
INCHES
DIM MIN MAX
MILLIMETERS
MIN
1.80
1.15
0.80
0.10
MAX
2.20
1.35
1.10
0.30
1
2
A
B
C
D
G
H
J
0.071
0.045
0.031
0.004
0.087
0.053
0.043
0.012
0.026 BSC
0.65 BSC
M
M
B
D 5 PL
0.2 (0.008)
---
0.004
0.004
0.004
0.010
0.012
---
0.10
0.10
0.10
0.25
0.30
K
N
S
N
0.008 REF
0.20 REF
0.079
0.087
2.00
2.20
J
C
K
H
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5
MC74VHC1G126
PACKAGE DIMENSIONS
TSOP−5
CASE 483−02
ISSUE H
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES
LEAD FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS
OF BASE MATERIAL.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
5. OPTIONAL CONSTRUCTION: AN
ADDITIONAL TRIMMED LEAD IS ALLOWED
IN THIS LOCATION. TRIMMED LEAD NOT TO
EXTEND MORE THAN 0.2 FROM BODY.
NOTE 5
5X
D
0.20 C A B
2X
2X
0.10
T
T
M
5
4
3
0.20
B
S
1
2
K
L
DETAIL Z
G
A
MILLIMETERS
DIM
A
B
C
D
MIN
3.00 BSC
1.50 BSC
MAX
DETAIL Z
J
0.90
1.10
0.50
C
0.25
SEATING
PLANE
0.05
G
H
J
K
L
M
S
0.95 BSC
H
0.01
0.10
0.20
1.25
0
0.10
0.26
0.60
1.55
10
3.00
T
_
_
2.50
SOLDERING FOOTPRINT*
1.9
0.074
0.95
0.037
2.4
0.094
1.0
0.039
0.7
0.028
mm
inches
ǒ
Ǔ
SCALE 10:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
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MC74VHC1G126/D
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