MC74VHC1GT32DTTG [ONSEMI]
AHC/VHC SERIES, 2-INPUT OR GATE, PDSO5, SC-59, SOT-23, TSOP-5;
| 型号： | MC74VHC1GT32DTTG |
| 厂家： | 
ONSEMI |
| 描述： | AHC/VHC SERIES, 2-INPUT OR GATE, PDSO5, SC-59, SOT-23, TSOP-5 转换器 电平转换器 栅 |
| 文件： | 总8页 (文件大小：93K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MC74VHC1GT32
2-Input OR Gate/CMOS
Logic Level Shifter
The MC74VHC1GT32 is an advanced high speed CMOS 2–input OR
gate fabricated with silicon gate CMOS technology. It achieves high speed
operation similar to equivalent Bipolar Schottky TTL while maintaining
CMOS low power dissipation.
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The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output.
MARKING
The device input is compatible with TTL–type input thresholds and the
output has a full 5 V CMOS level output swing. The input protection
circuitry on this device allows overvoltage tolerance on the input,
allowing the device to be used as a logic–level translator from 3.0 V
CMOS logic to 5.0 V CMOS Logic or from 1.8 V CMOS logic to 3.0 V
CMOS Logic while operating at the high–voltage power supply.
The MC74VHC1GT32 input structure provides protection when
voltages up to 7 V are applied, regardless of the supply voltage. This
allows the MC74VHC1GT32 to be used to interface 5 V circuits to 3 V
DIAGRAMS
SC–88A / SOT–353/SC–70
DF SUFFIX
d
VN
CASE 419A
Pin 1
d = Date Code
circuits. The output structures also provide protection when V
= 0 V.
CC
These input and output structures help prevent device destruction caused
by supply voltage – input/output voltage mismatch, battery backup, hot
insertion, etc.
TSOP–5/SOT–23/SC–59
DT SUFFIX
d
VN
CASE 483
• High Speed: t
= 3.5 ns (Typ) at V
= 5 V
PD
• Low Power Dissipation: I
CC
= 2 µA (Max) at T = 25°C
Pin 1
CC
A
d = Date Code
• TTL–Compatible Inputs: V = 0.8 V; V = 2.0 V
IL
IH
> 0.8 V ; V
• CMOS–Compatible Outputs: V
< 0.1 V @Load
OH
CC OL CC
• Power Down Protection Provided on Inputs and Outputs
• Balanced Propagation Delays
• Pin and Function Compatible with Other Standard Logic Families
• Chip Complexity: FETs = 65; Equivalent Gates = 15
PIN ASSIGNMENT
1
2
3
4
5
IN B
IN A
GND
OUT Y
V
CC
FUNCTION TABLE
5
V
1
2
IN B
IN A
GND
CC
Inputs
Output
Y
A
B
L
L
L
H
L
L
H
H
H
H
H
4
OUT Y
3
H
Figure 1. Pinout (Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
IN A
IN B
≥ 1
OUT Y
Figure 2. Logic Symbol
Semiconductor Components Industries, LLC, 2001
1
Publication Order Number:
November, 2001 – Rev. 4
MC74VHC1GT32/D
MC74VHC1GT32
MAXIMUM RATINGS (Note 1)
Symbol
Characteristics
Value
Unit
V
V
V
V
DC Supply Voltage
DC Input Voltage
DC Output Voltage
–0.5 to +7.0
–0.5 to +7.0
–0.5 to 7.0
CC
V
IN
V
= 0
V
OUT
CC
High or Low State
–0.5 to V
CC
+ 0.5
I
I
I
I
Input Diode Current
–20
mA
mA
mA
mA
mW
_C/W
°C
IK
Output Diode Current
DC Output Current, per Pin
V
< GND; V > V
OUT CC
+20
+25
OK
OUT
OUT
CC
DC Supply Current, V
CC
and GND
+50
P
Power dissipation in still air
Thermal resistance
SC–88A, TSOP–5
SC–88A, TSOP–5
200
D
q
333
JA
T
Lead temperature, 1 mm from case for 10 s
Junction temperature under bias
Storage temperature
260
L
J
T
+150
–65 to +150
°C
T
°C
stg
V
ESD
ESD Withstand Voltage
Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
> 2000
> 200
N/A
V
I
Latch–Up Performance
Above V
and Below GND at 125°C (Note 5)
CC
±500
mA
Latch–Up
1. Maximum Ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those
indicated may adversely affect device reliability. Functional operation under absolute–maximum–rated conditions is not implied. Functional
operation should be restricted to the Recommended Operating Conditions.
2. Tested to EIA/JESD22–A114–A
3. Tested to EIA/JESD22–A115–A
4. Tested to JESD22–C101–A
5. Tested to EIA/JESD78
RECOMMENDED OPERATING CONDITIONS
Symbol
Characteristics
Min
3.0
0.0
Max
5.5
5.5
5.5
Unit
V
V
V
V
DC Supply Voltage
DC Input Voltage
DC Output Voltage
CC
V
IN
V
= 0
0.0
0.0
V
OUT
CC
High or Low State
V
CC
T
Operating Temperature Range
Input Rise and Fall Time
–55
+125
°C
A
t , t
r
V
CC
V
CC
= 3.3 V ± 0.3 V
= 5.0 V ± 0.5 V
0
0
100
20
ns/V
f
DEVICE JUNCTION TEMPERATURE VERSUS
TIME TO 0.1% BOND FAILURES
Junction
Temperature °C
FAILURE RATE OF PLASTIC = CERAMIC
UNTIL INTERMETALLICS OCCUR
Time, Hours
Time, Years
80
1,032,200
419,300
178,700
79,600
37,000
17,800
8,900
117.8
47.9
20.4
9.4
90
100
110
120
130
140
1
4.2
1
10
100
1000
2.0
TIME, YEARS
1.0
Figure 3. Failure Rate vs. Time Junction
Temperature
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2
MC74VHC1GT32
DC ELECTRICAL CHARACTERISTICS
V
CC
T
A
= 25°C
T
A
≤ 85°C
–55 ≤ T ≤ 125°C
A
Symbol
Parameter
Test Conditions
(V)
Min
Typ
Max
Min
Max
Min
Max
Unit
V
V
V
Minimum High–Level
Input Voltage
3.0
4.5
5.5
1.4
2.0
2.0
1.4
2.0
2.0
1.4
2.0
2.0
V
IH
Maximum Low–Level
Input Voltage
3.0
4.5
5.5
0.53
0.8
0.8
0.53
0.8
0.8
0.53
0.8
0.8
V
IL
V
I
= V or V
= –50 µA
3.0
4.5
2.9
4.4
3.0
4.5
2.9
4.4
2.9
4.4
V
V
Minimum High–Level
Output Voltage
IN
OH
IH
IL
OH
V
IN
= V or V
IH IL
V
= V or V
IH
IN
OH
OH
IL
I
I
= –4 mA
= –8 mA
3.0
4.5
2.58
3.94
2.48
3.80
2.34
3.66
V
I
= V or V
IH
3.0
4.5
0.0
0.0
0.1
0.1
0.1
0.1
0.1
0.1
V
V
V
OL
Maximum Low–Level
Output Voltage
IN
OL
IL
= 50 µA
V
IN
= V or V
IH IL
V
= V or V
IH
IN
OL
OL
IL
I
I
= 4 mA
= 8 mA
3.0
4.5
0.36
0.36
0.44
0.44
0.52
0.52
I
I
I
I
Maximum Input
Leakage Current
V
= 5.5 V or GND
0 to
5.5
±0.1
±1.0
±1.0
µA
µA
mA
µA
IN
IN
Maximum Quiescent
Supply Current
V
IN
= V
CC
or GND
5.5
5.5
0.0
2.0
20
40
CC
Quiescent Supply
Current
Input: V = 3.4 V
IN
1.35
0.5
1.50
5.0
1.65
10
CCT
OPD
Output Leakage
Current
V
OUT
= 5.5 V
AC ELECTRICAL CHARACTERISTICS (C
= 50 pF, Input t = t = 3.0ns)
load
r
f
T
A
= 25°C
T
A
≤ 85°C
–55 ≤ T ≤ 125°C
A
Min
Typ
Max
Min
Max
Min
Max
Symbol
Parameter
Maximum
Propogation Delay,
Input A or B to Y
Test Conditions
Unit
t
t
,
V
V
= 3.3 ± 0.3 V
C
C
= 15 pF
= 50 pF
4.8
6.1
7.9
11.4
9.5
13.0
11.5
15.5
ns
PLH
PHL
CC
L
L
= 5.0 ± 0.5 V
C
C
= 15 pF
= 50 pF
3.7
4.4
5.5
7.5
6.5
8.5
8.0
10.0
CC
L
L
C
Maximum Input
Capacitance
5.5
10
10
10
pF
pF
IN
Typical @ 25°C, V
= 5.0 V
CC
11
C
Power Dissipation Capacitance (Note 6)
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: I
PD
6. C
PD
= C ꢀ V is used to determine the no–load dynamic
ꢀ f + I . C
CC(OPR)
ꢀ V .
CC
PD CC in CC PD
2
power consumption; P = C
ꢀ V
ꢀ f + I
in CC
D
PD
CC
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3
MC74VHC1GT32
TEST POINT
OUTPUT
50%
PLH
50% V
t
Input A or B
Output Y
CC
DEVICE
UNDER
TEST
GND
t
C *
L
PHL
V
OH
50% V
CC
V
OL
*Includes all probe and jig capacitance
Figure 4. Switching Waveforms
Figure 5. Test Circuit
DEVICE ORDERING INFORMATION
Device Nomenclature
Device
Temp
Range
Identifier
Tape &
Reel
Suffix
Circuit
Package
Suffix
Package
Type
Tape and Reel
Size
Indicator
MC
Function
Technology
Device Order Number
SC–88A /
SOT–353
/ SC–70
178 mm (7”)
3000 Unit
MC74VHC1GT32DFT1
74
74
74
VHC1G
VHC1G
VHC1G
T32
T32
T32
DF
T1
T2
T1
SC–88A /
SOT–353
/ SC–70
178 mm (7”)
3000 Unit
MC74VHC1GT32DFT2
MC74VHC1GT32DTT1
MC
DF
TSOPS /
SOT–23
/ SC–59
178 mm (7”)
3000 Unit
MC
DT
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4
MC74VHC1GT32
TAPE TRAILER
(Connected to Reel Hub)
NO COMPONENTS
160 mm MIN
TAPE LEADER
NO COMPONENTS
400 mm MIN
COMPONENTS
DIRECTION OF FEED
CAVITY TOP TAPE
TAPE
Figure 6. Tape Ends for Finished Goods
TAPE DIMENSIONS mm
4.00
4.00
Ğ1.50 TYP
2.00
1.75
3.50 $0.50
8.00 $0.30
1
Ğ1.00 MIN
DIRECTION OF FEED
Figure 7. SC–70–5/SC–88A/SOT–353 DFT1 Reel Configuration/Orientation
TAPE DIMENSIONS mm
4.00
4.00
Ğ1.50 TYP
2.00
1.75
3.50 $0.50
8.00 $0.30
1
Ğ1.00 MIN
DIRECTION OF FEED
Figure 8. SC–70/SC–88A/SOT–353 DFT2 and SOT23–5/TSOP–5/SC59–5 DTT1 Reel Configuration/Orientation
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5
MC74VHC1GT32
t MAX
13.0 mm $0.2 mm
(0.512 in $0.008 in)
1.5 mm MIN
(0.06 in)
50 mm MIN
(1.969 in)
20.2 mm MIN
(0.795 in)
A
FULL RADIUS
G
Figure 9. Reel Dimensions
REEL DIMENSIONS
Tape Size
T and R Suffix
A Max
G
t Max
8 mm
T1, T2
178 mm
(7 in)
8.4 mm, + 1.5 mm, –0.0
(0.33 in + 0.059 in, –0.00)
14.4 mm
(0.56 in)
DIRECTION OF FEED
BARCODE LABEL
POCKET
HOLE
Figure 10. Reel Winding Direction
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6
MC74VHC1GT32
PACKAGE DIMENSIONS
SC–88A/SOT–353/SC–70
DF SUFFIX
5–LEAD PACKAGE
CASE 419A–01
ISSUE E
A
G
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
V
INCHES
DIM MIN MAX
MILLIMETERS
MIN
1.80
1.15
0.80
0.10
MAX
2.20
1.35
1.10
0.30
5
1
4
3
A
B
C
D
G
H
J
0.071
0.045
0.031
0.004
0.087
0.053
0.043
0.012
–B–
S
2
0.026 BSC
0.65 BSC
---
0.004
0.004
0.004
0.010
0.012
---
0.10
0.10
0.10
0.25
0.30
K
N
S
V
0.008 REF
0.20 REF
M
M
B
0.2 (0.008)
D 5 PL
0.079
0.012
0.087
0.016
2.00
0.30
2.20
0.40
N
J
C
K
H
0.5 mm (min)
1.9 mm
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7
MC74VHC1GT32
PACKAGE DIMENSIONS
TSOP–5/SOT–23/SC–59
DT SUFFIX
5–LEAD PACKAGE
CASE 483–01
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
ISSUE A
D
2. CONTROLLING DIMENSION: MILLIMETER.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE
MATERIAL.
5
4
3
B
C
S
1
2
MILLIMETERS
DIM MIN MAX
INCHES
MIN MAX
L
G
A
B
C
D
G
H
J
2.90
1.30
0.90
0.25
0.85
0.013
0.10
0.20
1.25
0
3.10 0.1142 0.1220
1.70 0.0512 0.0669
1.10 0.0354 0.0433
0.50 0.0098 0.0197
1.00 0.0335 0.0413
0.100 0.0005 0.0040
0.26 0.0040 0.0102
0.60 0.0079 0.0236
1.55 0.0493 0.0610
A
J
0.05 (0.002)
K
L
H
M
K
M
S
10
0
3.00 0.0985 0.1181
10
_
_
_
_
2.50
0.094
2.4
0.037
0.95
0.074
1.9
0.037
0.95
0.028
0.7
0.039
1.0
inches
mm
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MC74VHC1GT32/D
相关型号：
MC74VHC1GT50DFR2
AHC/VHC SERIES, 1-INPUT NON-INVERT GATE, PDSO5, SC-70, SC-88A, SOT-353, 5 PIN
ONSEMI
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