MM74HCT138N [ONSEMI]

3-8 线路解码器;
MM74HCT138N
型号: MM74HCT138N
厂家: ONSEMI    ONSEMI
描述:

3-8 线路解码器

PC 驱动 输入元件 光电二极管 逻辑集成电路 解码器
文件: 总8页 (文件大小:233K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
DATA SHEET  
www.onsemi.com  
3-to-8 Line Decoder  
MM74HCT138  
SOIC−16  
CASE 751B−05/751BG−01  
General Description  
The MM74HCT138 decoder utilizes advanced silicon−gate CMOS  
technology, and are well suited to memory address decoding or data  
routing applications. Both circuits feature high noise immunity and  
low power consumption usually associated with CMOS circuitry, yet  
have speeds comparable to low power Schottky TTL logic.  
The MM74HCT138 have 3 binary select inputs (A, B, and C). If the  
device is enabled these inputs determine which one of the eight  
normally HIGH outputs will go LOW. Two active LOW and one  
active HIGH enables (G1, G2A and G2B) are provided to ease the  
cascading decoders.  
The decoders’ output can drive 10 low power Schottky TTL  
equivalent loads and are functionally and pin equivalent to the  
74LS138. All inputs are protected from damage due to static discharge  
by diodes to VCC and ground.  
MM74HCT devices are intended to interface between TTL and  
NMOS components and standard CMOS devices. These parts are also  
plug−in replacements for LS−TTL devices and can be used to reduce  
power consumption in existing designs.  
16  
1
TSSOP−16  
CASE 948F−01  
MARKING DIAGRAM  
HCT138A  
AWLYWW  
SOIC−16  
16  
HCT  
138A  
ALYW  
Features  
1
TTL Input Compatible  
TSSOP−16  
Typical Propagation Delay: 20 ns  
Low Quiescent Current: 160 mA Maximum (74HCT Series)  
Low Input Current: 1 mA Maximum  
Fanout of 10 LS−TTL Loads  
These are Pb−Free Devices  
HCT138A = Specific Device Code  
A
WL, L  
Y
= Assembly Location  
= Wafer Lot  
= Year  
WW, W = Work Week  
Connection Diagram  
ORDERING INFORMATION  
See detailed ordering and shipping information on page 4 of  
this data sheet.  
Top View  
Figure 1. Pin Assignments for SOIC and TSSOP  
© Semiconductor Components Industries, LLC, 1999  
1
Publication Order Number:  
November, 2022 − Rev. 1  
MM74HCT138/D  
MM74HCT138  
TRUTH TABLE  
Inputs  
Enable  
G2  
Select  
Outputs  
Y3  
G1  
X
(Note 1)  
C
X
X
L
B
X
X
L
A
X
X
L
Y0  
H
H
L
Y01  
H
Y2  
H
H
H
H
L
Y4  
H
H
H
H
H
H
L
Y5  
H
H
H
H
H
H
H
L
Y6  
H
H
H
H
H
H
H
H
L
Y7  
H
H
H
H
H
H
H
H
H
L
H
X
L
L
L
L
L
L
L
L
H
H
H
H
H
L
L
H
H
H
H
H
H
H
H
H
H
L
L
H
L
H
H
H
H
H
H
H
L
L
H
H
L
H
L
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H = HIGH Level  
L = LOW Level  
X = Don’t Care  
1. G2 = G2A + G2B  
Logic Diagram  
Figure 2. Logic Diagram  
www.onsemi.com  
2
 
MM74HCT138  
ABSOLUTE MAXIMUM RATINGS (Note 2)  
Symbol  
Parameter  
Rating  
V
CC  
Supply Voltage  
–0.5 to +7.0 V  
V
IN  
DC Input Voltage  
–0.5 to V + 0.5 V  
CC  
V
DC Output Voltage  
Clamp Diode Current  
DC Output Current, per Pin  
–0.5 to V + 0.5 V  
OUT  
CC  
I , I  
IK OK  
20 mA  
25 mA  
I
OUT  
I
DC V or GND Current, per Pin  
50 mA  
CC  
CC  
T
Storage Temperature Range  
Power Dissipation  
–65°C to +150°C  
500 mW  
STG  
P
S.O. Package Only  
D
T
L
Lead Temperature (Soldering 10 Seconds)  
260°C  
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality  
should not be assumed, damage may occur and reliability may be affected.  
2. Unless otherwise specified all voltages are referenced to ground.  
RECOMMENDED OPERATING CONDITIONS  
Symbol  
Parameter  
Min  
4.5  
0
Max  
Unit  
V
V
CC  
Supply Voltage  
5.5  
V , V  
IN OUT  
DC Input or Output Voltage  
Operating Temperature Range  
Input Rise or Fall Times  
V
CC  
V
T
A
–55  
+125  
500  
°C  
ns  
t , t  
r
f
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond  
the Recommended Operating Ranges limits may affect device reliability.  
DC ELECTRICAL CHARACTERISTICS (V = 5 V 10% (unless otherwise specified))  
CC  
T
= 255C  
T
A
= −405C to 855C T = −555C to 1255C  
A
A
Typ  
Guaranteed Limits  
Symbol  
Parameter  
Conditions  
Unit  
V
Minimum HIGH  
Level Input Voltage  
2.0  
2.0  
0.8  
2.0  
0.8  
V
IH  
V
Maximum LOW  
0.8  
V
IL  
Level Input Voltage  
V
OH  
Minimum HIGH Level  
Output Voltage  
V
= V or V  
IN IH IL  
V
V
− 0.1  
V
− 0.1  
V − 0.1  
CC  
V
V
V
|I  
| = 20 mA  
| = 4.0 mA, V = 4.5 V  
| = 4.8 mA, V = 5.5 V  
CC  
CC  
CC  
OUT  
OUT  
OUT  
4.2  
5.2  
3.98  
4.98  
3.84  
4.84  
3.7  
4.7  
|I  
|I  
CC  
CC  
V
I
Maximum LOW Level  
Voltage  
V
= V or V  
IN IH IL  
OL  
0
0.1  
0.1  
0.1  
0.4  
0.4  
V
V
V
|I  
| = 20 mA  
| = 4.0 mA, V = 4.5 V  
| = 4.8 mA, V = 5.5 V  
OUT  
OUT  
OUT  
0.2  
0.2  
0.26  
0.26  
0.33  
0.33  
|I  
|I  
CC  
CC  
Maximum Input  
Current  
V
IN  
V
IH  
= V or GND,  
0.1  
8.0  
0.3  
1.0  
1.0  
160  
0.5  
mA  
IN  
CC  
or V  
IL  
I
Maximum Quiescent  
Supply Current  
80  
V
IN  
= V or GND,  
CC  
= 0 mA  
mA  
CC  
I
OUT  
V
IN  
= 2.4 V or 0.5 V (Note 3)  
0.4  
mA  
3. This is measured per input pin. All other inputs are held at V or ground.  
CC  
www.onsemi.com  
3
 
MM74HCT138  
AC ELECTRICAL CHARACTERISTICS (T = 25°C, V = 5.0 V, t = t = 6 ns, C = 15 pF (unless otherwise specified))  
A
CC  
r
f
L
Symbol  
Parameter  
Conditions  
Typ  
20  
13  
14  
13  
17  
13  
Guaranteed Limit  
Unit  
ns  
t
Maximum Propagation Delay, A, B, or C to Output  
Maximum Propagation Delay, A, B, or C to Output  
Maximum Propagation Delay, G1 to Y Output  
35  
25  
25  
25  
30  
25  
PHL  
t
ns  
PLH  
t
ns  
PHL  
t
Maximum Propagation Delay, G1 to Y Output  
ns  
PLH  
t
Maximum Propagation Delay, G2A or G2B to Y Output  
Maximum Propagation Delay, G2A or G2B to Y Output  
ns  
PHL  
t
ns  
PLH  
AC ELECTRICAL CHARACTERISTICS (V = 5 V 10%, C = 50 pF, t = t = 6 ns (unless otherwise specified))  
CC  
L
r
f
T
= 255C  
T
A
= −405C to 855C T = −555C to 1255C  
A
A
Typ  
Guaranteed Limits  
Symbol  
Parameter  
Conditions  
Unit  
t
Maximum Propagation Delay  
A, B, or C to Output  
24  
40  
30  
30  
30  
35  
50  
38  
38  
38  
43  
60  
45  
45  
45  
52  
ns  
PHL  
t
Maximum Propagation Delay  
A, B, or C to Output  
18  
17  
20  
23  
ns  
ns  
ns  
ns  
PLH  
t
Maximum Propagation Delay  
G1 to Y Output  
PHL  
t
Maximum Propagation Delay  
G1 to Y Output  
PLH  
t
Maximum Propagation Delay  
G2A or G2B to Y Output  
PHL  
t
Maximum Propagation Delay  
G2A or G2B to Y Output  
18  
30  
38  
45  
ns  
PLH  
t
, t  
Maximum Output Rise and Fall Time  
Input Capacitance  
15  
5
19  
10  
22  
10  
ns  
pF  
pF  
THL TLH  
C
IN  
C
Power Dissipation Capacitance  
(Note 4)  
55  
PD  
2
4. C determines the no load dynamic power consumption, P = C  
V
f + I V , and the no load dynamic current consumption,  
CC CC  
PD  
D
PD CC  
I
S
= C  
V
f + I  
.
PD CC  
CC  
ORDERING INFORMATION  
Part Number  
Package  
Shipping  
MM74HCT138M  
SOIC−16, Case 751B−05  
(Pb−Free)  
48 Units / Tube  
96 Units / Tube  
MM74HCT138MTC  
MM74HCT138MX  
MM74HCT138MTCX  
TSSOP−16, Case 948F−01  
(Pb−Free)  
SOIC−16, Case 751BG−01  
(Pb−Free)  
2500 Units / Tape & Reel  
2500 Units / Tape & Reel  
TSSOP−16, Case 948F−01  
(Pb−Free)  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging  
Specifications Brochure, BRD8011/D.  
www.onsemi.com  
4
 
MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
SOIC16  
CASE 751B05  
ISSUE K  
DATE 29 DEC 2006  
SCALE 1:1  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
A−  
2. CONTROLLING DIMENSION: MILLIMETER.  
3. DIMENSIONS A AND B DO NOT INCLUDE MOLD  
PROTRUSION.  
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.  
5. DIMENSION D DOES NOT INCLUDE DAMBAR  
PROTRUSION. ALLOWABLE DAMBAR PROTRUSION  
SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D  
DIMENSION AT MAXIMUM MATERIAL CONDITION.  
16  
9
8
B−  
P 8 PL  
M
S
B
0.25 (0.010)  
1
MILLIMETERS  
INCHES  
MIN  
0.386  
DIM MIN  
MAX  
MAX  
0.393  
0.157  
0.068  
0.019  
0.049  
A
B
C
D
F
9.80  
3.80  
1.35  
0.35  
0.40  
10.00  
G
4.00 0.150  
1.75 0.054  
0.49 0.014  
1.25 0.016  
F
R X 45  
K
_
G
J
1.27 BSC  
0.050 BSC  
0.19  
0.10  
0
0.25 0.008  
0.25 0.004  
0.009  
0.009  
7
K
M
P
R
C
7
0
_
_
_
_
T−  
SEATING  
PLANE  
5.80  
0.25  
6.20 0.229  
0.50 0.010  
0.244  
0.019  
J
M
D
16 PL  
M
S
S
A
0.25 (0.010)  
T B  
STYLE 1:  
STYLE 2:  
STYLE 3:  
STYLE 4:  
PIN 1. COLLECTOR  
2. BASE  
3. EMITTER  
4. NO CONNECTION  
5. EMITTER  
6. BASE  
7. COLLECTOR  
8. COLLECTOR  
9. BASE  
10. EMITTER  
11. NO CONNECTION  
12. EMITTER  
13. BASE  
PIN 1. CATHODE  
2. ANODE  
3. NO CONNECTION  
4. CATHODE  
5. CATHODE  
6. NO CONNECTION  
7. ANODE  
8. CATHODE  
9. CATHODE  
10. ANODE  
11. NO CONNECTION  
12. CATHODE  
13. CATHODE  
14. NO CONNECTION  
15. ANODE  
PIN 1. COLLECTOR, DYE #1  
2. BASE, #1  
3. EMITTER, #1  
4. COLLECTOR, #1  
5. COLLECTOR, #2  
6. BASE, #2  
PIN 1. COLLECTOR, DYE #1  
2. COLLECTOR, #1  
3. COLLECTOR, #2  
4. COLLECTOR, #2  
5. COLLECTOR, #3  
6. COLLECTOR, #3  
7. COLLECTOR, #4  
8. COLLECTOR, #4  
9. BASE, #4  
10. EMITTER, #4  
11. BASE, #3  
12. EMITTER, #3  
13. BASE, #2  
7. EMITTER, #2  
8. COLLECTOR, #2  
9. COLLECTOR, #3  
10. BASE, #3  
11. EMITTER, #3  
12. COLLECTOR, #3  
13. COLLECTOR, #4  
14. BASE, #4  
SOLDERING FOOTPRINT  
14. COLLECTOR  
15. EMITTER  
16. COLLECTOR  
14. EMITTER, #2  
15. BASE, #1  
16. EMITTER, #1  
15. EMITTER, #4  
16. COLLECTOR, #4  
8X  
6.40  
16. CATHODE  
16X  
1.12  
STYLE 5:  
STYLE 6:  
STYLE 7:  
PIN 1. SOURCE N‐CH  
PIN 1. DRAIN, DYE #1  
2. DRAIN, #1  
3. DRAIN, #2  
4. DRAIN, #2  
5. DRAIN, #3  
6. DRAIN, #3  
7. DRAIN, #4  
8. DRAIN, #4  
9. GATE, #4  
PIN 1. CATHODE  
2. CATHODE  
3. CATHODE  
4. CATHODE  
5. CATHODE  
6. CATHODE  
7. CATHODE  
8. CATHODE  
9. ANODE  
2. COMMON DRAIN (OUTPUT)  
3. COMMON DRAIN (OUTPUT)  
4. GATE P‐CH  
5. COMMON DRAIN (OUTPUT)  
6. COMMON DRAIN (OUTPUT)  
7. COMMON DRAIN (OUTPUT)  
8. SOURCE P‐CH  
1
16  
16X  
0.58  
9. SOURCE P‐CH  
10. SOURCE, #4  
11. GATE, #3  
12. SOURCE, #3  
13. GATE, #2  
14. SOURCE, #2  
15. GATE, #1  
16. SOURCE, #1  
10. ANODE  
11. ANODE  
12. ANODE  
13. ANODE  
14. ANODE  
15. ANODE  
16. ANODE  
10. COMMON DRAIN (OUTPUT)  
11. COMMON DRAIN (OUTPUT)  
12. COMMON DRAIN (OUTPUT)  
13. GATE N‐CH  
14. COMMON DRAIN (OUTPUT)  
15. COMMON DRAIN (OUTPUT)  
16. SOURCE N‐CH  
1.27  
PITCH  
8
9
DIMENSIONS: MILLIMETERS  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98ASB42566B  
SOIC16  
PAGE 1 OF 1  
ON Semiconductor and  
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding  
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically  
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the  
rights of others.  
© Semiconductor Components Industries, LLC, 2019  
www.onsemi.com  
MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
SOIC16, 150 mils  
CASE 751BG01  
ISSUE O  
DATE 19 DEC 2008  
SYMBOL  
MIN  
NOM  
MAX  
1.35  
A
A1  
b
1.75  
0.25  
0.51  
0.25  
0.10  
0.33  
0.19  
c
D
E
E1  
e
9.80  
5.80  
3.80  
9.90  
6.00  
10.00  
6.20  
4.00  
E1  
E
3.90  
1.27 BSC  
h
0.25  
0.40  
0º  
0.50  
1.27  
8º  
L
θ
PIN#1 IDENTIFICATION  
TOP VIEW  
D
h
q
A
c
e
b
L
A1  
END VIEW  
SIDE VIEW  
Notes:  
(1) All dimensions are in millimeters. Angles in degrees.  
(2) Complies with JEDEC MS-012.  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98AON34275E  
SOIC16, 150 MILS  
PAGE 1 OF 1  
ON Semiconductor and  
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding  
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically  
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the  
rights of others.  
© Semiconductor Components Industries, LLC, 2019  
www.onsemi.com  
MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
TSSOP16  
CASE 948F01  
ISSUE B  
16  
DATE 19 OCT 2006  
1
SCALE 2:1  
16X KREF  
NOTES:  
M
S
S
0.10 (0.004)  
T U  
V
1. DIMENSIONING AND TOLERANCING PER  
ANSI Y14.5M, 1982.  
S
0.15 (0.006) T U  
2. CONTROLLING DIMENSION: MILLIMETER.  
3. DIMENSION A DOES NOT INCLUDE MOLD  
FLASH. PROTRUSIONS OR GATE BURRS.  
MOLD FLASH OR GATE BURRS SHALL NOT  
EXCEED 0.15 (0.006) PER SIDE.  
4. DIMENSION B DOES NOT INCLUDE  
INTERLEAD FLASH OR PROTRUSION.  
INTERLEAD FLASH OR PROTRUSION SHALL  
NOT EXCEED 0.25 (0.010) PER SIDE.  
5. DIMENSION K DOES NOT INCLUDE DAMBAR  
PROTRUSION. ALLOWABLE DAMBAR  
PROTRUSION SHALL BE 0.08 (0.003) TOTAL  
IN EXCESS OF THE K DIMENSION AT  
MAXIMUM MATERIAL CONDITION.  
K
K1  
16  
9
2X L/2  
J1  
SECTION NN  
B
U−  
L
J
PIN 1  
IDENT.  
N
6. TERMINAL NUMBERS ARE SHOWN FOR  
REFERENCE ONLY.  
8
0.25 (0.010)  
1
7. DIMENSION A AND B ARE TO BE  
DETERMINED AT DATUM PLANE W.  
M
S
0.15 (0.006) T U  
MILLIMETERS  
DIM MIN MAX  
INCHES  
MIN MAX  
A
V−  
N
A
4.90  
4.30  
−−−  
5.10 0.193 0.200  
4.50 0.169 0.177  
B
F
C
1.20  
−−− 0.047  
D
F
0.05  
0.50  
0.15 0.002 0.006  
0.75 0.020 0.030  
DETAIL E  
G
H
J
J1  
K
K1  
L
0.65 BSC  
0.026 BSC  
0.18  
0.09  
0.09  
0.19  
0.19  
0.28 0.007 0.011  
W−  
0.20 0.004 0.008  
0.16 0.004 0.006  
0.30 0.007 0.012  
0.25 0.007 0.010  
C
0.10 (0.004)  
6.40 BSC  
0.252 BSC  
DETAIL E  
H
SEATING  
PLANE  
T−  
M
0
8
0
8
_
_
_
_
D
G
GENERIC  
MARKING DIAGRAM*  
SOLDERING FOOTPRINT  
7.06  
16  
XXXX  
XXXX  
ALYW  
1
1
XXXX = Specific Device Code  
A
L
= Assembly Location  
= Wafer Lot  
Y
W
= Year  
= Work Week  
0.65  
PITCH  
G or G = PbFree Package  
*This information is generic. Please refer to  
device data sheet for actual part marking.  
PbFree indicator, “G” or microdot “ G”,  
may or may not be present.  
01.36X6  
16X  
1.26  
DIMENSIONS: MILLIMETERS  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98ASH70247A  
TSSOP16  
PAGE 1 OF 1  
ON Semiconductor and  
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding  
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically  
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the  
rights of others.  
© Semiconductor Components Industries, LLC, 2019  
www.onsemi.com  
onsemi,  
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