MMBFJ309 [ONSEMI]
JFET VHF/UHF Amplifier Transistor; JFET VHF / UHF放大器晶体管
| 型号： | MMBFJ309 |
| 厂家： | 
ONSEMI |
| 描述： | JFET VHF/UHF Amplifier Transistor |
| 文件： | 总8页 (文件大小：88K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ON Semiconductort
JFET - VHF/UHF Amplifier
Transistor
N–Channel
MMBFJ309LT1
MMBFJ310LT1
3
MAXIMUM RATINGS
1
2
Rating
Drain–Source Voltage
Symbol
Value
25
Unit
Vdc
V
V
DS
CASE 318–08, STYLE 10
SOT–23 (TO–236AB)
Gate–Source Voltage
25
Vdc
GS
Gate Current
I
10
mAdc
G
2 SOURCE
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
3
(1)
Total Device Dissipation FR–5 Board
P
225
mW
D
GATE
T
= 25°C
A
Derate above 25°C
1.8
556
mW/°C
°C/W
°C
Thermal Resistance, Junction to Ambient
Junction and Storage Temperature
DEVICE MARKING
R
1 DRAIN
qJA
T , T
–55 to +150
J
stg
MMBFJ309LT1 = 6U; MMBFJ310LT1 = 6T
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
A
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Gate–Source Breakdown Voltage (I = –1.0 µAdc, V
= 0)
V
(BR)GSS
–25
–
–
Vdc
G
DS
Gate Reverse Current (V
Gate Reverse Current (V
= –15 Vdc)
= –15 Vdc, T = 125°C)
I
–
–
–
–
–1.0
–1.0
nAdc
µAdc
GS
GS
GSS
A
Gate Source Cutoff Voltage
(V = 10 Vdc, I = 1.0 nAdc)
MMBFJ309
MMBFJ310
V
–1.0
–2.0
–
–
–4.0
–6.5
Vdc
GS(off)
DS
D
ON CHARACTERISTICS
Zero–Gate–Voltage Drain Current
MMBFJ309
MMBFJ310
I
12
24
–
–
30
60
mAdc
Vdc
DSS
(V
DS
= 10 Vdc, V
= 0)
GS
Gate–Source Forward Voltage (I = 1.0 mAdc, V
G
= 0)
V
–
–
1.0
DS
GS(f)
SMALL–SIGNAL CHARACTERISTICS
Forward Transfer Admittance (V
= 10 Vdc, I = 10 mAdc, f = 1.0 kHz)
|Y
|
8.0
–
–
–
18
250
5.0
2.5
–
mmhos
µmhos
pF
DS
D
fs
Output Admittance (V
= 10 Vdc, I = 10 mAdc, f = 1.0 kHz)
|y
|
DS
D
os
Input Capacitance (V
= –10 Vdc, V
= 0 Vdc, f = 1.0 MHz)
C
–
–
GS
DS
= –10 Vdc, V
iss
rss
Reverse Transfer Capacitance (V
GS
= 0 Vdc, f = 1.0 MHz)
C
–
–
pF
DS
Equivalent Short–Circuit Input Noise Voltage
(V = 10 Vdc, I = 10 mAdc, f = 100 Hz)
e
–
10
Ǹ
n
nVń Hz
DS
D
1. FR–5 = 1.0 ꢀ 0.75 ꢀ 0.062 in.
Semiconductor Components Industries, LLC, 2001
1
Publication Order Number:
November, 2001 – Rev. 2
MMBFJ309LT1/D
MMBFJ309LT1 MMBFJ310LT1
70
60
50
40
30
20
10
0
70
60
V
= 10 V
T = -ā55°C
A
DS
50
40
30
20
10
+ā25°C
I
DSS
+ā25°C
+150°C
+150°C
+ā25°C
-ā55°C
-1.0
0
-5.0
-4.0
-3.0
-2.0
I
D
- V , GATE-SOURCE VOLTAGE (VOLTS)
GS
I - V , GATE-SOURCE CUTOFF VOLTAGE (VOLTS)
DSS GS
Figure 1. Drain Current and Transfer
Characteristics versus Gate–Source Voltage
100 k
10 k
10
120
96
72
48
24
0
1.0 k
100
R
DS
Y
fs
Y
fs
7.0
C
gs
4.0
V
V
= -ā2.3 V =
= -ā5.7 V =
10
1.0 k
100
GS(off)
GS(off)
Y
os
C
gd
1.0
0
1.0
0.01
0.1 0.2 0.3 0.5 1.0 2.0 3.0 5.0 10 20 30 50 100
10 9.0 8.0 7.0 6.0 5.0 4.0 3.0 2.0 1.0
0
I , DRAIN CURRENT (mA)
D
V , GATE SOURCE VOLTAGE (VOLTS)
GS
Figure 2. Common–Source Output
Admittance and Forward Transconductance
versus Drain Current
Figure 3. On Resistance and Junction
Capacitance versus Gate–Source Voltage
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2
MMBFJ309LT1 MMBFJ310LT1
|S |, |S
21 11
|
|S |, |S |
12 22
0.85 0.45
0.79 0.39
0.73 0.33
0.67 0.27
0.61 0.21
0.55 0.15
0.060 1.00
0.048 0.98
0.036 0.96
0.024 0.94
0.012 0.92
0.90
30
24
18
12
6.0
0
3.0
2.4
1.8
1.2
0.6
S
22
V
= 10 V
= 10 mA
= 25°C
DS
I
D
S
21
T
A
Y
11
V
= 10 V
= 10 mA
= 25°C
DS
I
D
T
A
Y
Y
21
S
11
22
S
12
Y
12
500 700 1000
f, FREQUENCY (MHz)
100
200
300
500 700 1000
100
200
300
f, FREQUENCY (MHz)
Figure 4. Common–Gate Y Parameter
Magnitude versus Frequency
Figure 5. Common–Gate S Parameter
Magnitude versus Frequency
θ
, θ
21 11
θ
, θ
12 22
θ
, θ
11 12
θ
, θ
21 22
180° 50°
170° 40°
160° 30°
150° 20°
140° 10°
-ā20° 87°
-ā20° 120°
-ā40° 100°
-ā60° 80°
-ā80° 60°
-ā100° 40°
-ā120° 20°
0
θ
11
θ
22
-ā20°
θ
21
-ā40° 86°
-ā60°
θ
-ā20°
-ā40°
-ā60°
-ā80°
-ā100°
22
θ
21
-ā80° 85°
-ā100°
-ā120° 84°
-ā140°
θ
21
θ
12
θ
θ
12
11
V
I
= 10 V
V
I
T
A
= 10 V
= 10 mA
= 25°C
DS
= 10 mA
-ā160° 83°
-ā180°
DS
D
θ
11
D
T
= 25°C
A
130°
0°
100
-ā200° 82°
200
300
500 700 1000
100
200
300
500 700 1000
f, FREQUENCY (MHz)
f, FREQUENCY (MHz)
Figure 6. Common–Gate Y Parameter
Phase–Angle versus Frequency
Figure 7. S Parameter Phase–Angle
versus Frequency
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3
MMBFJ309LT1 MMBFJ310LT1
INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the
total design. The footprint for the semiconductor packages
must be the correct size to insure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
0.037
0.95
0.037
0.95
0.079
2.0
0.035
0.9
0.031
0.8
inches
mm
SOT–23
SOT–23 POWER DISSIPATION
SOLDERING PRECAUTIONS
The power dissipation of the SOT–23 is a function of the
pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power dissipa-
tion. Power dissipation for a surface mount device is deter-
The melting temperature of solder is higher than the
rated temperature of the device. When the entire device is
heated to a high temperature, failure to complete soldering
within a short time could result in device failure. There-
fore, the following items should always be observed in
order to minimize the thermal stress to which the devices
are subjected.
mined byT
of the die, R
, the maximum rated junction temperature
, the thermal resistance from the device
J(max)
θJA
junction to ambient, and the operating temperature, T .
A
Using the values provided on the data sheet for the SOT–23
package, P can be calculated as follows:
• Always preheat the device.
D
• The delta temperature between the preheat and
soldering should be 100°C or less.*
T
– T
A
J(max)
P
=
D
R
θJA
• When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering
method, the difference shall be a maximum of 10°C.
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values
into the equation for an ambient temperature T of 25°C,
A
one can calculate the power dissipation of the device which
in this case is 225 milliwatts.
• The soldering temperature and time shall not exceed
260°C for more than 10 seconds.
150°C – 25°C
556°C/W
P
=
= 225 milliwatts
D
• When shifting from preheating to soldering, the
maximum temperature gradient shall be 5°C or less.
The 556°C/W for the SOT–23 package assumes the use
of the recommended footprint on a glass epoxy printed
circuit board to achieve a power dissipation of 225 milli-
watts. There are other alternatives to achieving higher
power dissipation from the SOT–23 package. Another
alternative would be to use a ceramic substrate or an
aluminum core board such as Thermal Clad . Using a
board material such as Thermal Clad, an aluminum core
board, the power dissipation can be doubled using the same
footprint.
• After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and
result in latent failure due to mechanical stress.
• Mechanical stress or shock should not be applied
during cooling.
* Soldering a device without preheating can cause exces-
sive thermal shock and stress which can result in damage
to the device.
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4
MMBFJ309LT1 MMBFJ310LT1
PACKAGE DIMENSIONS
SOT–23 (TO–236AB)
CASE 318–08
ISSUE AF
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE
MATERIAL.
A
L
3
INCHES
DIM MIN MAX
MILLIMETERS
S
C
B
MIN
2.80
1.20
0.89
0.37
1.78
MAX
3.04
1.40
1.11
0.50
2.04
0.100
0.177
0.69
1.02
2.64
0.60
1
2
A
B
C
D
G
H
J
0.1102 0.1197
0.0472 0.0551
0.0350 0.0440
0.0150 0.0200
0.0701 0.0807
V
G
0.0005 0.0040 0.013
0.0034 0.0070 0.085
K
L
0.0140 0.0285
0.0350 0.0401
0.0830 0.1039
0.0177 0.0236
0.35
0.89
2.10
0.45
S
V
H
J
D
K
STYLE 10:
PIN 1. DRAIN
2. SOURCE
3. GATE
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5
MMBFJ309LT1 MMBFJ310LT1
Notes
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6
MMBFJ309LT1 MMBFJ310LT1
Notes
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7
MMBFJ309LT1 MMBFJ310LT1
SENSEFET is a trademark of Semiconductor Components Industries, LLC.
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
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including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
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MMBFJ309LT1/D
相关型号：
MMBFJ309D87Z
RF Small Signal Field-Effect Transistor, 1-Element, Ultra High Frequency Band, Silicon, N-Channel, Junction FET, SOT-23, 3 PIN
FAIRCHILD
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