N02L6181AB28I [ONSEMI]
2Mb Ultra-Low Power Asynchronous CMOS SRAM 128Kx16 bit; 2MB超低功耗异步SRAM CMOS 128Kx16位
| 型号： | N02L6181AB28I |
| 厂家： | 
ONSEMI |
| 描述： | 2Mb Ultra-Low Power Asynchronous CMOS SRAM 128Kx16 bit |
| 文件： | 总11页 (文件大小：215K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
N02L6181A
2Mb Ultra-Low Power Asynchronous CMOS SRAM
128Kx16 bit
Features
• Single Wide Power Supply Range
1.65 to 2.2 Volts
Overview
• Very low standby current
The N02L6181A is an integrated memory device
containing a 2 Mbit Static Random Access Memory
organized as 131,072 words by 16 bits. The device
is designed and fabricated using ON
0.5µA at 1.8V (Typical)
• Very low operating current
1.4mA at 1.8V and 1µs (Typical)
Semiconductor’s advanced CMOS technology to
provide both high-speed performance and ultra-low
power. The base design is the same as ON
• Very low Page Mode operating current
0.5mA at 1.8V and 1µs (Typical)
• Simple memory control
Semiconductor’s N02L63W3A, which is processed
to operate at higher voltages. The device operates
with a single chip enable (CE) control and output
enable (OE) to allow for easy memory expansion.
Byte controls (UB and LB) allow the upper and
lower bytes to be accessed independently. The
N02L6181A is optimal for various applications
where low-power is critical such as battery backup
and hand-held devices. The device can operate
Single Chip Enable (CE)
Byte control for independent byte operation
Output Enable (OE) for memory expansion
• Low voltage data retention
Vcc = 1.2V
• Very fast output enable access time
30ns OE access time
• Automatic power down to standby mode
• TTL compatible three-state output driver
• Compact space saving BGA package
o
over a very wide temperature range of -40 C to
o
+85 C and is available in JEDEC standard
packages compatible with other standard 128Kb x
16 SRAMs.
Product Family
Standby
Power
Supply
(Vcc)
Operating
Current (Icc),
Max
Operating
Current (ISB),
Part Number
Package Type
Speed
Temperature
Max
N02L6181AB
N02L6181AB2
48 - BGA
70 and 85ns
@ 1.65V
-40oC to +85oC
1.65V - 2.2V
10 µA
3 mA @ 1MHz
Green 48-BGA
©2008 SCILLC. All rights reserved.
July 2008 - Rev. 4
Publication Order Number:
N02L6181A/D
N02L6181A
Pin Configurations
1
2
3
A0
A3
4
5
A2
6
A1
A4
A6
A7
LB
OE
NC
A
B
C
D
E
F
I/O8
I/O0
UB
CE
I/O9 I/O10 A5
I/O1 I/O2
I/O3 VCC
VSS I/O11
VCC I/O12
NC
NC
A16 I/O4 VSS
A15 I/O5 I/O6
I/O14 I/O13 A14
I/O15
NC
A12
A9
A13
A10
I/O7
NC
NC
A8
WE
A11
G
H
48 Pin BGA (top)
6 x 8 mm
Pin Descriptions
Pin Name
A0-A16
Pin Function
Address Inputs
Write Enable Input
Chip Enable Input
Output Enable Input
Lower Byte Enable Input
Upper Byte Enable Input
Data Inputs/Outputs
Not Connected
WE
CE
OE
LB
UB
I/O0-I/O15
NC
VCC
Power
VSS
Ground
Rev. 4 | Page 2 of 11 | www.onsemi.com
N02L6181A
Functional Block Diagram
Word
Address
Inputs
Address
Decode
Logic
A - A
0
3
Input/
Output
Mux
Page
8K Page
x 16 word
x 16 bit
Address
Inputs
Address
Decode
I/O - I/O
0
7
A - A
4
16
and
Logic
RAM Array
Buffers
I/O - I/O
8
15
CE
WE
OE
UB
LB
Control
Logic
Functional Description
1
CE
WE
OE
UB
LB
MODE
POWER
I/O0 - I/O15
Standby2
Standby2
Write3
H
L
L
L
L
X
X
L
X
X
X3
X
H
L1
L1
L1
X
H
L1
L1
L1
High Z
High Z
Standby
Standby
Active
Data In
Data Out
High Z
H
H
L
Active
Read
Active
H
Active
1. When UB and LB are in select mode (low), I/O0 - I/O15 are affected as shown. When LB only is in the select mode only I/O0 - I/O7
are affected as shown. When UB is in the select mode only I/O8 - I/O15 are affected as shown.
2. When the device is in standby mode, control inputs (WE, OE, UB, and LB), address inputs and data input/outputs are internally
isolated from any external influence and disabled from exerting any influence externally.
3. When WE is invoked, the OE input is internally disabled and has no effect on the circuit.
1
Capacitance
Item
Symbol
CIN
Test Condition
Min
Max
8
Unit
pF
VIN = 0V, f = 1 MHz, TA = 25oC
VIN = 0V, f = 1 MHz, TA = 25oC
Input Capacitance
I/O Capacitance
CI/O
8
pF
1. These parameters are verified in device characterization and are not 100% tested
Rev. 4 | Page 3 of 11 | www.onsemi.com
N02L6181A
Absolute Maximum Ratings
1
Item
Symbol
VIN,OUT
VCC
Rating
–0.3 to VCC+0.3
–0.3 to 3.0
500
Unit
V
Voltage on any pin relative to VSS
Voltage on VCC Supply Relative to VSS
Power Dissipation
V
PD
mW
oC
oC
oC
TSTG
Storage Temperature
–40 to 125
TA
Operating Temperature
-40 to +85
240oC, 10sec(Lead only)
TSOLDER
Soldering Temperature and Time
1. Stresses greater than those listed above may cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the operating section of this specification is not
implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Operating Characteristics (Over Specified Temperature Range)
Typ1
Item
Symbol
Test Conditions
Min.
Max
Unit
VCC
VDR
VIH
VIL
Supply Voltage
Data Retention Voltage
Input High Voltage
1.65
1.2
1.8
2.2
2.2
VCC+0.3
0.3Vcc
V
V
Chip Disabled2
0.7Vcc
–0.3
V
Input Low Voltage
V
VOH
VOL
ILI
IOH = 0.2mA
IOL = -0.2mA
VCC–0.2
Output High Voltage
Output Low Voltage
Input Leakage Current
Output Leakage Current
V
0.3
0.5
0.5
V
VIN = 0 to VCC
µA
µA
ILO
OE = VIH or Chip Disabled
VCC=2.2 V, VIN=VIH or VIL
Chip Enabled, IOUT = 0
Read/Write Operating Supply Current
ICC1
ICC2
1.4
8.0
3.0
mA
mA
@ 1 µs Cycle Time2
VCC=2.2 V, VIN=VIH or VIL
Chip Enabled, IOUT = 0
Read/Write Operating Supply Current
17.0
@ 70 ns Cycle Time2
Page Mode Operating Supply Current
@ 70ns Cycle Time2 (Refer to Power
Savings with Page Mode Operation
diagram)
VCC=2.2V, VIN=VIH or VIL
Chip Enabled, IOUT = 0
ICC3
2.0
4.0
0.1
mA
mA
VCC=2.2V, VIN=VIH or VIL
Chip Enabled, IOUT = 0,
f = 0
Read/Write Quiescent Operating Sup-
ply Current3
ICC4
VIN = VCC or 0V
Maximum Standby Current3
Chip Disabled
ISB1
0.5
10.0
5.0
µA
µA
tA= 85oC, VCC = 2.2 V
VCC = 1.2V, VIN = VCC or 0
Chip Disabled, tA= 85oC
Maximum Data Retention Current3
IDR
1. Typical values are measured at Vcc=Vcc Typ., TA=25°C and are not 100% tested.
2. This parameter is specified with the outputs disabled to avoid external loading effects. The user must add current required to drive
output capacitance expected in the actual system.
3. This device assumes a standby mode if the chip is disabled (CE high). In order to achieve low standby current all inputs must be
within 0.2 volts of either VCC or VSS
Rev. 4 | Page 4 of 11 | www.onsemi.com
N02L6181A
Power Savings with Page Mode Operation (WE = V )
IH
Page Address (A4 - A16 )
Word Address (A0 - A3)
CE
Open page
...
Word 16
Word 1
Word 2
OE
LB, UB
Note: Page mode operation is a method of addressing the SRAM to save operating current. The internal
organization of the SRAM is optimized to allow this unique operating mode to be used as a valuable power
saving feature.
The only thing that needs to be done is to address the SRAM in a manner that the internal page is left open
and 16-bit words of data are read from the open page. By treating addresses A0-A3 as the least significant
bits and addressing the 16 words within the open page, power is reduced to the page mode value which is
considerably lower than standard operating currents for low power SRAMs.
Rev. 4 | Page 5 of 11 | www.onsemi.com
N02L6181A
Timing Test Conditions
Item
0.1VCC to 0.9 VCC
Input Pulse Level
Input Rise and Fall Time
Input and Output Timing Reference Levels
Output Load
5ns
0.5 VCC
CL = 30pF
1.65 - 2.2V
Power Supply Voltage
-40 to +85 oC
Operating Temperature
Timing
85ns
70ns
Item
Symbol
Units
Min.
Max.
Min.
Max.
tRC
tAA
Read Cycle Time
85
70
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Address Access Time
85
85
30
85
70
70
25
70
tCO
Chip Enable to Valid Output
Output Enable to Valid Output
Byte Select to Valid Output
Chip Enable to Low-Z output
Output Enable to Low-Z Output
Byte Select to Low-Z Output
Chip Disable to High-Z Output
Output Disable to High-Z Output
Byte Select Disable to High-Z Output
Output Hold from Address Change
Write Cycle Time
tOE
tLB, tUB
tLZ
10
5
10
5
tOLZ
tLBZ, tUBZ
tHZ
10
10
30
30
30
25
25
25
tOHZ
tLBHZ, tUBHZ
tOH
5
5
tWC
85
50
50
50
50
0
70
40
40
40
40
0
tCW
Chip Enable to End of Write
Address Valid to End of Write
Byte Select to End of Write
Write Pulse Width
tAW
tLBW, tUBW
tWP
tAS
Address Setup Time
tWR
Write Recovery Time
0
0
tWHZ
tDW
Write to High-Z Output
25
20
Data to Write Time Overlap
Data Hold from Write Time
End Write to Low-Z Output
40
0
40
0
tDH
tOW
10
10
ns
Rev. 4 | Page 6 of 11 | www.onsemi.com
N02L6181A
Timing of Read Cycle (CE = OE = V , WE = V )
IL
IH
t
RC
Address
t
AA
t
OH
Previous Data Valid
Data Valid
Data Out
Timing Waveform of Read Cycle (WE= V )
IH
t
RC
Address
t
AA
t
HZ
t
CO
CE
OE
t
LZ
t
OHZ
t
OE
t
OLZ
t
t
LB, UB
LB, UB
t
t
t
t
LBLZ, UBLZ
LBHZ, UBHZ
High-Z
Data Valid
Data Out
Rev. 4 | Page 7 of 11 | www.onsemi.com
N02L6181A
Timing Waveform of Write Cycle (WE control)
t
WC
Address
t
WR
t
AW
t
CW
CE
t
, t
LBW UBW
LB, UB
t
WP
t
AS
WE
t
t
DH
DW
High-Z
Data Valid
Data In
Data Out
t
WHZ
t
OW
High-Z
Timing Waveform of Write Cycle (CE Control)
t
WC
Address
CE
t
t
AW
WR
t
CW
t
AS
t
, t
LBW UBW
LB, UB
WE
t
WP
t
t
DH
DW
Data Valid
Data In
t
LZ
t
WHZ
High-Z
Data Out
Rev. 4 | Page 8 of 11 | www.onsemi.com
N02L6181A
44-Lead TSOP II Package (T44)
18.41±0.13
11.76±0.20
10.16±0.13
0.80mm REF
0.45
0.30
SEE DETAIL B
DETAIL B
1.10±0.15
o
o
0 -8
0.20
0.00
0.80mm REF
Note:
1. All dimensions in inches (Millimeters)
2. Package dimensions exclude molding flash
Rev. 4 | Page 9 of 11 | www.onsemi.com
N02L6181A
Ball Grid Array Package
0.28±0.05
1.24±0.10
D
A1 BALL PAD
CORNER (3)
1. 0.35±0.05 DIA.
E
2. SEATING PLANE - Z
0.15
Z
0.05
Z
TOP VIEW
SIDE VIEW
1. DIMENSION IS MEASURED AT THE
MAXIMUM SOLDER BALL DIAMETER.
PARALLEL TO PRIMARY Z.
A1 BALL PAD
CORNER
SD
2. PRIMARY DATUM Z AND SEATING
PLANE ARE DEFINED BY THE
SPHERICAL CROWNS OF THE
SOLDER BALLS.
e
SE
3. A1 BALL PAD CORNER I.D. TO BE
MARKED BY INK.
K TYP
J TYP
e
BOTTOM VIEW
Dimensions (mm)
e = 0.75
BALL
D
E
MATRIX
TYPE
SD
SE
J
K
6±0.10
8±0.10
0.375
0.375
1.125
1.375
FULL
Rev. 4 | Page 10 of 11 | www.onsemi.com
N02L6181A
Ordering Information
Part Number
Package
Shipping Method
Speed
N02L6181AB7I
N02L6181AB27I
N02L6181AB8I
N02L6181AB28I
N02L6181AB7IT
N02L6181AB27IT
N02L6181AB8IT
N02L6181AB28IT
Leaded 48-BGA
Green 48-BGA (RoHS Compliant)
Leaded 48-BGA
Green 48-BGA (RoHS Compliant)
Leaded 48-BGA
Green 48-BGA (RoHS Compliant)
Leaded 48-BGA
Tray
Tray
Tray
Tray
Tape & Reel
Tape & Reel
Tape & Reel
Tape & Reel
70ns
70ns
85ns
85ns
70ns
70ns
85ns
85ns
Green 48-BGA (RoHS Compliant)
Revision History
Revision #
Date
Change Description
A
B
C
4
Apr. 2003
Nov. 2005
Initial Release
Added TSOP II Green Pkg. , Green Pkg. Part # and RoHS Compliant
September 2006 Converted to AMI Semiconductor
July 2008
Converted to ON Semiconductor and new part numbers
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without
further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does
SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special,
consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer's technical
experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as
components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure
of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or
unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs,
damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or
unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative
Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
N. American Technical Support: 800-282-9855 Toll
ON Semiconductor Website: www.onsemi.com
Literature Distribution Center for ON Semiconductor
PO Box 5163, Denver, Colorado 80217 USA
Free USA/Canada
Europe, Middle East & Africa Technical Support: Phone Order Literature: http://www.onsemi.com/orderlit
Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada 421-33-790-2910
Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
Japan Customer Focus Center:
For additional information, please contact your local
Sales Representative
Phone 81-3-5773-3850
Rev. 4 | Page 11 of 11 | www.onsemi.com
相关型号：
SI9130DB
5- and 3.3-V Step-Down Synchronous ConvertersWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1-E3
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135_11
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9136_11
Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130CG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130LG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130_11
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137DB
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137LG
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9122E
500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification DriversWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
©2020 ICPDF网 联系我们和版权申明