NB4N527SMNEVB [ONSEMI]
Evaluation Board Manual for NB4N527S; 评估板手册NB4N527S
| 型号： | NB4N527SMNEVB |
| 厂家： | 
ONSEMI |
| 描述： | Evaluation Board Manual for NB4N527S |
| 文件： | 总8页 (文件大小：316K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NB4N527SMNEVB
Evaluation Board Manual
for NB4N527S
http://onsemi.com
EVALUATION BOARD MANUAL
Board Lay−Up
INTRODUCTION
The 16−lead QFN evaluation board is implemented in
four layers with split (dual) power supplies (Figure 2,
Evaluation Board Lay−up). For standard lab setup, a split
(dual) power supply is essential to enable the 50 W internal
impedance in the oscilloscope as a device termination. The
first layer or primary trace layer is 0.005, thick Rogers
RO6002 material, which is designed to have equal electrical
length on all signal traces from the device under the test
(DUT) to the sense output. The second layer is the 1.0 oz.
copper ground plane. The FR4 dielectric material is placed
between the second and third layer, and between the third
and fourth layer. The third layer is also a 1.0 oz copper
ground plane. The fourth layer is the secondary trace layer.
ON Semiconductor has developed an evaluation board for
the NB4N527S device as a convenience for the customers
interested in performing their own device engineering
assessment. This board provides a high bandwidth 50 W
controlled impedance environment. The pictures in Figure 1
show the top and bottom view of the evaluation board, which
can be configured in several different ways.
This evaluation board manual contains:
• Information on 16−lead QFN Evaluation Board
• Assembly Instructions
• Appropriate Lab Setup
• Bill of Materials
This manual should be used in conjunction with the
NB4N527S device data sheet, which contains full technical
details on the device specifications and operation.
Top View
Bottom View
Figure 1. Top and Bottom View of the 16 QFN Evaluation Board
© Semiconductor Components Industries, LLC, 2008
1
Publication Order Number:
September, 2008 − Rev. 1
NB4N527SMNEVB/D
NB4N527SMNEVB
Figure 2. Evaluation Board Lay−up
Connecting Power and Ground Planes
Top side of the evaluation board has the four surfaces
mount test point clips labeled V , V , SMA_GND, and
DUT_GND. DUT_GND is connected to the exposed flag of
the QFN package. For proper operation, the exposed flag is
recommended to be ELECTRICALLY left floating or tied
to V , but must be THERMALLY connected to a
EE
sufficient heat conduit such as a thermal plane Exact supply
voltage values that need to be applied can be found in
Table 1 and Figures 4 and 5.
CC
EE
Table 1. Power Supply Levels
Power Supply Span
V
V
SMA_GND
0 V
DUT_GND
CC
EE
3.0 V
3.3 V
3.6 V
1.75 V
2.05 V
2.35 V
−1.25 V
−1.25 V
−1.25 V
Float or V
Float or V
Float or V
EE
EE
EE
0 V
0 V
Stimulus (Generator) Termination
All ECL outputs need to be terminated to V (V = V
For the LVDS configuration, V
D1 input has to be shorted to form 100 W across differential
pin pads of the D0 or
TDx
TT TT
CC
–2.0 V = GND) via a 50 W resistor. The current board design
utilizes the internal resistors and the V pins are wired to
lines. This configuration is accomplished by moving the
jumper wire from SMA_GND ring to complementary V
TDx
TDx
ground. (More information on termination is provided in
AN8020). If evaluation does not require use of internal
termination resistors, 0402 chip resistor pads are provided
on the bottom side of the evaluation board. The jumper wires
pin pad (example: VTD0 and VTD0b for D0 input and
VTD1 and VTD1b for D1 input).
DUT Termination
For standard lab setup and test, a split (dual) power supply
is required enabling the 50 W internal impedance in the
oscilloscope to be used as a termination of the signals (in
split power supply setup SMA_GND is the system ground,
of the V
pin pads should be removed (J1, J4, J13 and J15
TDx
to SMA_GND jumper). Solder the chip resistors to the
bottom side of the board between the appropriate input of the
device pin pads and the ground pads (for split power supply
setup).
V
CC
is varied, and V is –1.25 V; see Table 1, Power
EE
Supply Levels).
Likewise for CML outputs, CML stimulus signal need to
be terminated to V via a 50 W resistor. If internal resistors
CC
Board Components Configuration
are used, the V
pin pads should be wired to V . To
TDx
CC
The NB4N527SMNEVB evaluation board requires eight
side SMA connectors. Placement locations are described in
Table 2 and Figure 3.
accomplish this configuration, the jumper wire has to be
moved from SMA_GND ring to V ring on the bottom of
CC
the board.
Table 2. SMA Connectors and Jumpers Placement
Device
J1
J2
J3
J4
J5
J6
J7
7
J8
8
J9
9
J10
10
J11
11
J12
12
J13
13
J14
14
J15
15
J16
16
Pin #
1
No
2
3
4
No
5
6
Connector
Wire
Yes
No
Yes
No
No
No
No
No
No
No
Yes
No
Yes
No
Yes
No
No
No
No
Yes
No
Yes
No
No
SMA_GND
SMA_GND
V
V
SMA_GND
SMA_GND
EE
CC
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2
NB4N527SMNEVB
4 x Surface Mount Test
Points
8 x SMA Connectors
J15
C4
J14
C2
J13
J16
J12
J1
J4
2 x 10 mF Decoupling
Capacitors on the back of
the PCB (C4, C2)
J2
J3
J11
D
U
T
J10
J9
J8
J5
J6
J7
Top View
VEE
VCC
Pin 1
Pad
SMA_GND
Wire
DUT_GND
4 x 0.01 mF or 0.1 mF
Decoupling Capacitors
(C1, C3, C5, C6)
Bottom View
Figure 3. Components Placement
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3
NB4N527SMNEVB
DO
DO
QO
Connect output of
the generator to the
input pins labeled
J2, J3, J14, J15
(D0/D0B, D1/D1B)
Note: Internal
termination pins are
connected to the
SMA GND on the PCB.
QO
Q1
Connect outputs of
the device labeled
J9, J10, J11 and J12
(Q0/Q0B, Q1/Q1B)
directly to the scope
head.
D1
D1
Q1
Figure 4. Lab Setup for NB4N527S
Power Supply
VCC
GND
VEE
Differential
Signal
Generator
Test
Measuring
Equipment
Out
Out
Channel 1
Channel 2
D
U
T
Trigger
Trigger
Figure 5. Simplified Equipment Lab Setup Block Diagram
1. Connect appropriate power supplies to V , V
,
EE
3. Connect a test measurement device on the device
output SMA connectors.
CC
SMA_GND, and SMA_DUT.
2. Connect a signal generator to the input SMA
connectors. Setup input signal according to the
device data sheet.
NOTE: The test measurement device must contain 50 W
termination.
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4
NB4N527SMNEVB
Table 3. Bill of Materials
Components
Manufacturer
Description
Part Number
Qty.
Web Site
SMA
Connector
Johnson*
Rosenberger
SMA Connector,
Side Launch, Gold
Plated
142−0701−851
32K243−40ME3
8
http://www.johnsoncomponents.com
http://www.rosenbergerna.com
Surface Mount
Test Points
Keystone*
SMT Miniature Test
Point
5015
4
4
http://www.keyelco.com
http://www.avxcorp.com
Chip
Capacitor
AVC
Corporation*
0603 0.01 mF "
10%
10 mF " 10%
06035C103KAT2A
T491C106K016AS
2
Chip Resistor
Panasonic*
0402 50 W " 1%
Presicion Thick
Film Chip Resistor
ERJ−2RKF49R9X
Optional**
http://www.panasonic.com
Evaluation
Board
ON
QFN 16 Evaluation
Board
ECLQFN16EVB
NB4N527SMN
1
1
http://www.onsemi.com
http://www.onsemi.com
Semiconductor
Device
Samples
ON
QFN 16 Package
Device
Semiconductor
*Components are available through most distributors, i.e. www.newark.com, www.Digikey.com
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5
NB4N527SMNEVB
Top Layer
Second Layer (SMA_GND Plane)
Figure 6. Gerber Files
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6
NB4N527SMNEVB
Third Layer (DUT_GND Trace)
Bottom Layer
Figure 7. Gerber Files
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7
NB4N527SMNEVB
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
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NB4N527SMNEVB/D
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