NC7SV05FHX [ONSEMI]

TinyLogic ULP-A反相器(漏极开路输出);
NC7SV05FHX
型号: NC7SV05FHX
厂家: ONSEMI    ONSEMI
描述:

TinyLogic ULP-A反相器(漏极开路输出)

栅 光电二极管 逻辑集成电路 触发器
文件: 总12页 (文件大小:646K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
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September 2011  
NC7SV05  
TinyLogic® ULP-A Inverter (Open-Drain Output)  
Features  
Description  
The NC7SV05 is a single inverter with open-drain output  
from Fairchild's Ultra-Low Power (ULP-A) Series of  
TinyLogic®. ULP-A is ideal for applications that require  
extreme high speed, high drive, and low power. This  
product is designed for a wide low-voltage operating  
range (0.9V to 3.6V VCC) and applications that require  
more drive and speed than the TinyLogic® ULP series,  
but still offer best-in-class, low-power operation.  
.
.
0.9V to 3.6V VCC Supply Operation  
3.6V Over-Voltage Tolerant I/Os at VCC from  
0.9V to 3.6V  
.
Extremely High Speed tPD  
- 1.0ns: Typical for 2.7V to 3.6V VCC  
- 1.2ns: Typical for 2.3V to 2.7V VCC  
- 2.0ns: Typical for 1.65V to 1.95V VCC  
- 3.2ns: Typical for 1.4V to 1.6V VCC  
- 6.0ns: Typical for 1.1V to 1.3V VCC  
- 13.0ns: Typical for 0.9V VCC  
The NC7SV05 is uniquely designed for optimized power  
and speed and is fabricated with an advanced CMOS  
technology to achieve high-speed operation while  
maintaining low CMOS power dissipation.  
.
.
Power-Off High-Impedance Inputs and Outputs  
High Static Drive (IOH/IOL  
- 24mA at 3.00V VCC  
-18mA at 2.30V VCC  
-6mA at 1.65V VCC  
- 4mA at 1.4V VCC  
- 2mA at 1.1V VCC  
- 0.1mA at 0.9V VCC  
)
.
Uses Proprietary Quiet Series™ Noise/EMI  
Reduction Circuitry  
.
.
Ultra-Small MicroPak™ Packages  
Ultra-Low Dynamic Power  
Ordering Information  
Part Number  
Top Mark  
Package  
Packing Method  
3000 Units on  
Tape & Reel  
NC7SV05P5X  
V05  
F9  
5-Lead SC70, EIAJ SC-88a, 1.25mm Wide  
5000 Units on  
Tape & Reel  
NC7SV05L6X  
NC7SV05FHX  
6-Lead MicroPak™, 1.00mm Wide  
5000 Units on  
Tape & Reel  
F9  
6-Lead, MicroPak2, 1x1mm Body, .35mm Pitch  
TinyLogic®is a registered trademark of Fairchild Semiconductor Corporation.  
MicroPak™and Quiet Series™are trademarks of Fairchild Semiconductor Corporation.  
© 2002 Fairchild Semiconductor Corporation  
NC7SV05 • Rev. 1.0.4  
www.fairchildsemi.com  
Battery Life  
700  
600  
500  
400  
300  
200  
100  
0
ULP (SP)  
Battery Life  
(Days)  
ULP-A (SV)  
UHS (SZ)  
0.9 1.2 1.5 1.8  
2.5 3.3 5.0  
VCC Supply Voltage  
Figure 1. Battery Life vs. VCC Supply Voltage  
Notes:  
1. TinyLogic® ULP and ULP-A with up to 50% less power consumption can extend battery life significantly.  
Battery Life (Vbattery•Ibattery•.9)/(Pdevice)/24hrs/day  
where, Pdevice (ICC • VCC) (CPD CL) • VCC2 • f.  
2. Assumes ideal 3.6V Lithium Ion battery with current rating of 900mAH and derated 90% and device frequency at  
10MHz, with CL=15pF load.  
Connection Diagram  
IEEE/IEC  
Y
A
1
Figure 2. Logic Symbol  
© 2002 Fairchild Semiconductor Corporation  
NC7SV05 • Rev. 1.0.4  
www.fairchildsemi.com  
2
Pin Configurations  
1
5
4
NC  
V
Y
CC  
1
2
3
6
5
4
NC  
A
V
CC  
2
A
NC  
Y
GND  
3
GND  
Figure 3. SC70 (Top View)  
Figure 4. MicroPak (Top Through View)  
Pin Definitions  
Pin # SC70  
Pin # MicroPak  
Name  
NC  
Description  
1
2
3
4
5
1, 5  
2
No Connect  
A
Input  
3
GND  
Y
Ground  
4
Output  
6
VCC  
Supply Voltage  
Function Table  
Inputs  
Output  
A
L
Y
*H  
L
H
H=HIGH Logic Level  
L=LOW Logic Level  
*H=HIGH Impedance Output Status (Open Drain)  
© 2002 Fairchild Semiconductor Corporation  
NC7SV05 • Rev. 1.0.4  
www.fairchildsemi.com  
3
Absolute Maximum Ratings  
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be  
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.  
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.  
The absolute maximum ratings are stress ratings only.  
Symbol  
VCC  
Parameter  
Min.  
-0.5  
-0.5  
-0.5  
Max.  
4.6  
Unit  
V
Supply Voltage  
VIN  
DC Input Voltage  
4.6  
V
VOUT  
IIK  
DC Output Voltage  
DC Input Diode Current  
DC Output Diode Current  
DC Output Sink Current  
4.6  
V
VIN < 0V  
VOUT < 0V  
-50  
mA  
mA  
mA  
mA  
°C  
°C  
°C  
IOK  
-50  
IOL  
+50  
±50  
+150  
+150  
+260  
150  
130  
120  
4000  
2000  
ICC or IGND  
TSTG  
TJ  
DC VCC or Ground Current per Supply Pin  
Storage Temperature Range  
-65  
Junction Temperature Under Bias  
Junction Lead Temperature, Soldering 10 Seconds  
SC70-5  
TL  
PD  
Power Dissipation at +85°C  
MicroPak-6  
mW  
V
MicroPak2-6  
Human Body Model, JEDEC:JESD22-A114  
Charge Device Model, JEDEC:JESD22-C101  
ESD  
Recommended Operating Conditions  
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended  
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not  
recommend exceeding them or designing to Absolute Maximum Ratings.  
Symbol  
VCC  
Parameter  
Conditions  
Min.  
0.9  
0
Max.  
3.6  
Unit  
V
Supply Voltage  
VIN  
Input Voltage  
3.6  
V
VOUT  
Output Voltage  
0
3.6  
V
V
CC=3.0V to 3.6V  
+24.0  
+18.0  
+6.0  
+4.0  
+2.0  
+0.1  
VCC=2.3V to 3.6V  
VCC=1.65V to 1.95V  
VCC=1.4V to 1.6V  
VCC=1.1V to 1.3V  
VCC=0.9V  
IOL  
Output Current in IOL  
mA  
TA  
Operating Temperature, Free Air  
Minimum Input Edge Rate  
-40  
+85  
°C  
VIN=0.8V to 2.0, VCC=3.0V  
SC70-5  
10  
ns/V  
t/V  
425  
500  
560  
Thermal Resistance  
MicroPak-6  
°C/W  
JA  
MicroPak2-6  
Note:  
3. Unused inputs must be held HIGH or LOW. They may not float.  
© 2002 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
NC7SV05 • Rev. 1.0.4  
4
DC Electrical Characteristics  
TA=25°C  
Min.  
TA=-40 to 85°C  
Symbol  
Parameter  
VCC  
Conditions  
Units  
Max.  
Min.  
.65 x VCC  
.65 x VCC  
.65 x VCC  
.65 x VCC  
1.6  
Max.  
0.90  
.65 x VCC  
.65 x VCC  
.65 x VCC  
.65 x VCC  
1.6  
1.10 VCC 1.30  
1.40 VCC 1.60  
1.65 VCC 1.95  
2.30 VCC 2.70  
2.70 VCC 3.60  
0.90  
HIGH Level Input  
Voltage  
VIH  
V
2.0  
2.0  
.35 x VCC  
.35 x VCC  
.35 x VCC  
.35 x VCC  
0.7  
.35 x VCC  
.35 x VCC  
.35 x VCC  
.35 x VCC  
0.7  
1.10 VCC 1.30  
1.40 VCC 1.60  
1.65 VCC 1.95  
2.30 VCC 2.70  
2.70 VCC 3.60  
0.90  
LOW Level Input  
Voltage  
VIL  
V
0.8  
0.8  
0.1  
0.1  
0.1  
0.1  
1.10 VCC 1.30  
1.40 VCC 1.60  
1.65 VCC 1.95  
2.30 VCC 2.70  
2.70 VCC 3.60  
1.10 VCC 1.30  
1.40 VCC 1.60  
1.65 VCC 1.95  
2.30 VCC 2.70  
2.70 VCC 3.60  
2.30VCC 2.70  
2.70 VCC 3.60  
2.70 VCC 3.60  
0.2  
0.2  
IOL=100µA  
0.2  
0.2  
0.2  
0.2  
0.2  
0.2  
IOL=2mA  
IOL=4mA  
IOL=6mA  
0.25 x VCC  
0.25 x VCC  
0.3  
0.25 x VCC  
0.25 x VCC  
0.3  
LOW Level Output  
Voltage  
VOL  
V
0.4  
0.4  
I
I
OL=12mA  
OL=18mA  
0.4  
0.4  
0.6  
0.6  
0.4  
0.4  
IOL=24mA  
0.55  
0.55  
Input Leakage  
Current  
IIN  
0.90 to 3.60  
0
±0.1  
0.5  
±0.5  
0.5  
µA  
µA  
0 VIN 3.60  
Power Off  
Leakage Current  
0 (VIN, VO)  
3.60  
IOFF  
VIN=VCC, or  
GND  
0.9  
0.9  
Quiescent Supply  
Current  
ICC  
0.90 to 3.60  
µA  
VCC VIN  
±0.9  
3.6V  
© 2002 Fairchild Semiconductor Corporation  
NC7SV05 • Rev. 1.0.4  
www.fairchildsemi.com  
5
AC Electrical Characteristics  
TA=25°C  
TA=-40 to 85°C  
Symbol Parameter  
VCC  
Conditions  
Units Figure  
Min. Typ. Max. Min.  
Max.  
CL=15pF,  
RU=RD=1k  
0.90  
13  
3.0  
1.0  
1.0  
0.8  
0.7  
6.0  
3.2  
2.0  
1.2  
1.0  
15.0  
8.7  
6.0  
3.6  
3.3  
1.0  
1.0  
1.0  
0.7  
0.6  
18.6  
9.7  
6.8  
4.7  
4.0  
1.10 VCC 1.30  
1.40 VCC 1.60  
1.65 VCC 1.95  
2.30 VCC 2.70  
2.70 VCC 3.60  
CL=30pF,  
RU=RD=1k  
Propagation  
tPZL, tPLZ  
Figure 5  
ns  
Delay  
Figure 6  
CL=30pF,  
RU=RD=1k  
Input  
CIN  
0
2
pF  
pF  
Capacitance  
Power  
VIN=0V or VCC  
f=10MHz  
,
CPD  
Dissipation  
0.90 to 3.60  
10  
Capacitance  
AC Loadings and Waveforms  
Figure 5. AC Test Circuit  
Figure 6. AC Waveforms for Inverting and Non-Inverting Functions  
VCC  
Symbol  
1.8V ±  
0.15V  
3.3V ± 0.3V  
2.5V ± 0.2V  
1.5V ± 0.1V  
1.2V ± 0.1V  
0.9V  
Vmi  
1.5V  
VCC/2  
VCC/2  
VCC/2  
VCC/2  
VCC/2  
Vmo  
VOL + 0.30V  
VOL + 0.15V  
VOL + 0.15V  
VOL + 0.10V  
VOL + 0.10V  
VOL + 0.10V  
© 2002 Fairchild Semiconductor Corporation  
NC7SV05 • Rev. 1.0.4  
www.fairchildsemi.com  
6
Physical Dimensions  
Figure 7. 5-Lead, SC70, EIAJ SC-88a, 1.25mm Wide  
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner  
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or  
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the  
warranty therein, which covers Fairchild products.  
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:  
http://www.fairchildsemi.com/packaging/.  
Tape and Reel Specification  
Please visit Fairchild Semiconductor’s online packaging area for the most recent tape and reel specifications:  
http://www.fairchildsemi.com/products/analog/pdf/sc70-5_tr.pdf.  
Package Designator  
Tape Section  
Leader (Start End)  
Carrier  
Cavity Number  
125 (Typical)  
3000  
Cavity Status Cover Type Status  
Empty  
Filled  
Sealed  
Sealed  
Sealed  
P5X  
Trailer (Hub End)  
75 (Typical)  
Empty  
© 2002 Fairchild Semiconductor Corporation  
NC7SV05 • Rev. 1.0.4  
www.fairchildsemi.com  
7
Physical Dimensions  
2X  
0.05 C  
1.45  
B
(1)  
2X  
0.05 C  
(0.49)  
5X  
(0.254)  
1.00  
(0.75)  
(0.52)  
1X  
TOP VIEW  
A
PIN 1 IDENTIFIER  
5
0.55MAX  
(0.30)  
6X  
PIN 1  
0.05 C  
0.05  
0.00  
RECOMMENED  
LAND PATTERN  
0.05 C  
C
0.45  
0.35  
0.10  
6X  
0.00  
0.25  
6X  
0.15  
1.0  
DETAIL A  
0.10  
C B A  
0.40  
0.30  
0.05  
C
0.35  
0.25  
5X  
5X  
0.40  
0.30  
DETAIL A  
PIN 1 TERMINAL  
0.075 X 45  
CHAMFER  
0.5  
BOTTOM VIEW  
(0.05)  
6X  
(0.13)  
4X  
Notes:  
1. CONFORMS TO JEDEC STANDARD M0-252 VARIATION UAAD  
2. DIMENSIONS ARE IN MILLIMETERS  
3. DRAWING CONFORMS TO ASME Y14.5M-1994  
4. FILENAME AND REVISION: MAC06AREV4  
5. PIN ONE IDENTIFIER IS 2X LENGTH OF ANY  
OTHER LINE IN THE MARK CODE LAYOUT.  
Figure 8. 6-Lead, MicroPak™, 1.0mm Wide  
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner  
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or  
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the  
warranty therein, which covers Fairchild products.  
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:  
http://www.fairchildsemi.com/packaging/.  
Tape and Reel Specification  
Please visit Fairchild Semiconductor’s online packaging area for the most recent tape and reel specifications:  
http://www.fairchildsemi.com/products/logic/pdf/micropak_tr.pdf.  
Package Designator  
Tape Section  
Leader (Start End)  
Carrier  
Cavity Number  
125 (Typical)  
5000  
Cavity Status Cover Type Status  
Empty  
Filled  
Sealed  
Sealed  
Sealed  
L6X  
Trailer (Hub End)  
75 (Typical)  
Empty  
© 2002 Fairchild Semiconductor Corporation  
NC7SV05 • Rev. 1.0.4  
www.fairchildsemi.com  
8
Physical Dimensions  
0.89  
0.35  
0.05 C  
2X  
B
1.00  
A
5X 0.40  
1X 0.45  
PIN 1  
0.66  
MIN 250uM  
1.00  
6X 0.19  
0.05 C  
TOP VIEW  
RECOMMENDED LAND PATTERN  
FOR SPACE CONSTRAINED PCB  
2X  
0.90  
0.35  
0.05 C  
0.55MAX  
C
5X 0.52  
SIDE VIEW  
0.73  
0.57  
1X  
(0.08) 4X  
DETAIL A  
0.09  
0.19  
6X  
1
2
3
0.20 6X  
ALTERNATIVE LAND PATTERN  
FOR UNIVERSAL APPLICATION  
(0.05) 6X  
0.35  
0.25  
5X  
0.60  
6
5
4
0.10  
.05 C  
C B A  
0.40  
0.30  
0.35  
(0.08)  
4X  
BOTTOM VIEW  
NOTES:  
A. COMPLIES TO JEDEC MO-252 STANDARD  
B. DIMENSIONS ARE IN MILLIMETERS.  
0.075X45°  
CHAMFER  
C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994  
D. LANDPATTERN RECOMMENDATION IS BASED ON FSC  
DESIGN.  
DETAIL A  
PIN 1 LEAD SCALE: 2X  
E. DRAWING FILENAME AND REVISION: MGF06AREV3  
Figure 9. 6-Lead, MicroPak2, 1x1mm Body, .35mm Pitch  
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner  
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or  
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the  
warranty therein, which covers Fairchild products.  
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:  
http://www.fairchildsemi.com/packaging/.  
Tape and Reel Specification  
Please visit Fairchild Semiconductor’s online packaging area for the most recent tape and reel specifications:  
http://www.fairchildsemi.com/packaging/MicroPAK2_6L_tr.pdf.  
Package Designator  
Tape Section  
Leader (Start End)  
Carrier  
Cavity Number  
125 (Typical)  
5000  
Cavity Status Cover Type Status  
Empty  
Filled  
Sealed  
Sealed  
Sealed  
FHX  
Trailer (Hub End)  
75 (Typical)  
Empty  
© 2002 Fairchild Semiconductor Corporation  
NC7SV05 • Rev. 1.0.4  
www.fairchildsemi.com  
9
© 2002 Fairchild Semiconductor Corporation  
NC7SV05 • Rev. 1.0.4  
www.fairchildsemi.com  
10  
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coverage may be accessed at www.onsemi.com/site/pdf/PatentMarking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.  
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regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or  
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer  
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not  
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