NCID9311R2 [ONSEMI]
High Speed 3-Channel Digital Isolator;
| 型号： | NCID9311R2 |
| 厂家： | 
ONSEMI |
| 描述： | High Speed 3-Channel Digital Isolator |
| 文件： | 总16页 (文件大小：281K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
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High Speed 3-Channel
Digital Isolator
NCID9301, NCID9311
Description
The NCID9301 and NCID9311 are galvanically isolated
high−speed 3−channel digital isolator with output enable. This device
supports isolated communications thereby allowing digital signals to
communicate between systems without conducting ground loops or
hazardous voltages.
SOIC16 W
CASE 751EN
MARKING DIAGRAM
It utilizes onsemi’s patented galvanic off−chip capacitor isolation
technology and optimized IC design to achieve high insulation and
high noise immunity, characterized by high common mode rejection
and power supply rejection specifications. The thick ceramic substrate
yields capacitors with ~25 times the thickness of thin film on−chip
capacitors and coreless transformers. The result is a combination of
the electrical performance benefits that digital isolators offer with the
safety reliability of a >0.5 mm insulator barrier similar to what has
historically been offered by optocouplers.
A
WL
Y
= Assembly Location
= Wafer Lot / Assembly Lot
= Year
The device is housed in a 16−pin wide body small outline package.
Features
WW
9301 / 9311
= Work Week
= Specific Device Code
• Off−Chip Capacitive Isolation to Achieve Reliable High Voltage
Insulation
♦ DTI (Distance Through Insulation): ≥ 0.5 mm
ORDERING INFORMATION
See detailed ordering and shipping information on page 14 of
this data sheet.
♦ Maximum Working Insulation Voltage: 2000 V
• Bi−directional Communication
peak
• 100 kV/ms Minimum Common Mode Rejection
• 8 mm Creepage and Clearance Distance to Achieve Reliable High
Voltage Insulation
• Specifications Guaranteed Over 2.5 V to 5.5 V Supply Voltage
and −40°C to 125°C Extended Temperature Range
• Over Temperature Detection
• Output Enable Function (Primary and Secondary side)
• NCIV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable (Pending)
• Safety and Regulatory Approvals
♦ UL1577, 5000 V
for 1 Minute
RMS
♦ DIN EN/IEC 60747−17 (Pending)
Typical Applications
• Isolated PWM Control
• Industrial Fieldbus Communications
2
• Microprocessor System Interface (SPI, I C, etc.)
• Programmable Logic Control
• Isolated Data Acquisition System
• Voltage Level Translator
© Semiconductor Components Industries, LLC, 2020
1
Publication Order Number:
January, 2022 − Rev. 0
NCID9301/D
NCID9301, NCID9311
BLOCK DIAGRAM
VDD1
GND1
VDD2
GND2
SYNC
SER
ENCODER
TX
RX
DECODER
DES
IO A
IO B
IO C
NC
IO A
IO B
IO C
NC
IO
SWITCH
IO
SWITCH
SYNC
DES
DECODER
RX
TX
ENCODER
SER
EN1
EN2
GND1
GND2
Figure 1. Functional Block Diagram
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2
NCID9301, NCID9311
PIN CONFIGURATION
NCID9301
NCID9311
1
2
3
4
5
6
7
8
16
15
14
13
12
11
1
16
15
14
13
12
V
V
V
V
DD2
DD1
DD2
DD1
2
3
4
5
6
7
8
GND1
GND2
GND1
GND2
V
V
V
V
V
V
V
V
V
V
INA
INB
OA
OB
INA
INB
OA
OB
V
V
OC
INC
OC
INC
NC
NC
NC
NC
EN1
11 NC
10
10 EN2
GND2
EN2
GND1
GND1
GND2
9
9
Figure 2. Pin and Channel Configuration
PIN DEFINITIONS
Pin No.
Pin No.
NCID9301
NCID9311
Name
Description
V
1
2
1
2
Power Supply, Side 1
Ground Connection for V
Input, Channel A
DD1
GND1
DD1
V
3
3
INA
V
INB
4
4
Input, Channel B
V
5
12
6
Input, Channel C
INC
NC
EN1
NC
6
No Connect
−
7
Output Enable 1
7
−
No Connect
GND1
GND2
EN2
NC
8
8
Ground Connection for V
Ground Connection for V
Output Enable 2
DD1
9
9
DD2
10
11
12
13
14
15
16
10
11
5
No Connect
V
OC
Output, Channel C
Output, Channel B
Output, Channel A
Ground Connection for V
Power Supply, Side 2
V
OB
13
14
15
16
V
OA
GND2
DD2
V
DD2
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3
NCID9301, NCID9311
SPECIFICATIONS
TRUTH TABLE (Note 1)
V
EN
V
V
V
OX
Comment
Normal Operation
Normal Operation
INX
X
DDI
DDO
H
H/NC
H/NC
L
Power Up
Power Up
Power Up
Power Up
Power Up
Power Up
H
L
L
X
X
Power Up
Hi−Z
L
H/NC
Power Down
Default low; V return to normal operation
OX
when V
change to Power Up
DDI
X
H/NC
Power Up
Power Down
Undetermined
(Note 2)
V
return to normal operation when V
OX DDO
change to Power Up
1. VINX = Input signal of a given channel (A, B or C). EN = Enable pin for primary or secondary side (1 or 2). V = Output signal of a given
X
OX
channel (A, B or C). V
= Input−side V . V
= Output−side V . X = Irrelevant. H = High level. L = Low level. NC = No Connection.
DDO
DDI
DD DDO DD
2. The outputs are in undetermined state when V
< V
.
UVLO
SAFETY AND INSULATION RATINGS
As per DIN EN/IEC 60747−17, this digital isolator is suitable for “safe electrical insulation” only within the safety limit data. Compliance with
the safety ratings must be ensured by means of protective circuits.
Symbol
Parameter
Min
−
Typ
I–IV
I–IV
I–IV
I–IV
I–III
40/125/21
2
Max
−
Unit
Installation Classifications per DIN VDE 0110/1.89
Table 1 Rated Mains Voltage
< 150 V
< 300 V
< 450 V
< 600 V
RMS
RMS
RMS
RMS
−
−
−
−
−
−
< 1000 V
−
−
RMS
Climatic Classification
−
−
Pollution Degree (DIN VDE 0110/1.89)
−
−
CTI
Comparative Tracking Index (DIN IEC 112/VDE 0303 Part 1)
Input−to−Output Test Voltage, Method b, V × 1.875 = V , 100%
600
3750
−
−
V
PR
−
−
V
peak
IORM
PR
Production Test with t = 1 s, Partial Discharge < 5 pC
m
Input−to−Output Test Voltage, Method a, V
× 1.6 = V , Type
3200
−
−
V
peak
IORM
PR
and Sample Test with t = 10 s, Partial Discharge < 5 pC
m
V
Maximum Working Insulation Voltage
Highest Allowable Over Voltage
2000
8000
8.0
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
V
V
IORM
peak
V
IOTM
peak
E
External Creepage
mm
mm
mm
°C
CR
E
External Clearance
8.0
CL
DTI
Insulation Thickness
0.50
150
100
600
109
Safety Limit Values – Maximum Values in Failure; Case Temperature
Safety Limit Values – Maximum Values in Failure; Input Power
Safety Limit Values – Maximum Values in Failure; Output Power
T
Case
P
mW
mW
W
S,INPUT
P
S,OUTPUT
R
Insulation Resistance at TS, V = 500 V
IO
IO
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4
NCID9301, NCID9311
ABSOLUTE MAXIMUM RATINGS (T = 25°C unless otherwise specified)
A
Symbol
Parameter
Value
−55 to +150
−40 to +125
−40 to +150
260 for 10 s
−0.5 to 6
−0.5 to 6
10
Unit
°C
°C
°C
°C
V
T
Storage Temperature
Operating Temperature
Junction Temperature
STG
OPR
T
T
J
T
SOL
Lead Solder Temperature (Refer to Reflow Temperature Profile)
Supply Voltage (V
V
DD
)
DDx
V
Voltage (V , V , ENx)
V
INx
Ox
I
O
Average Output Current
Power Dissipation
mA
mW
PD
210
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
RECOMMENDED OPERATING RANGES
Symbol
Parameter
Ambient Operating Temperature
Min
−40
2.5
0.7 × V
0
Max
+125
5.5
Unit
°C
V
T
A
V
V
Supply Voltage (Notes 3, 4)
High Level Input Voltage
DD1 DD2
V
INH
V
DDI
V
DDI
V
INL
Low Level Input Voltage
0.1 × V
V
DDI
V
V
Supply Voltage UVLO Rising Threshold
Supply Voltage UVLO Falling Threshold
Supply Voltage UVLO Hysteresis
High Level Output Current
Low Level Output Current
2.2
2.0
0.1
−2
−
−
V
UVLO+
V
UVLO−
UVLO
−
V
HYS
I
−
mA
mA
Mbps
OH
I
OL
−
2
DR
Signaling Rate
0
15
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
3. During power up or down, ensure that both the input and output supply voltages reach the proper recommended operating voltages to avoid
any momentary instability at the output state.
4. For reliable operation at recommended operating conditions, V supply pins require at least a pair of external bypass capacitors, placed
DD
within 2 mm from V pins 1 and 16 and GND pins 2 and 15. Recommended values are 0.1 mF and 1 mF.
DD
ISOLATION CHARACTERISTICS
Apply over all recommended conditions. All typical values are measured at T = 25°C.
A
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
V
ISO
Input−Output Isolation
Voltage
T
= 25°C, Relative Humidity < 50%,
5000
−
−
V
RMS
A
t = 1.0 minute, I
v 10 mA, 50 Hz
I−O
(Notes 5, 6, 7)
11
R
C
Isolation Resistance
Isolation Capacitance
V
V
= 500 V (Note 5)
−
−
10
−
−
ISO
ISO
I−O
= 0 V, Frequency = 1.0 MHz
(Note 5)
1
pF
I−O
5. Device is considered a two−terminal device: pins 1 to 8 are shorted together and pins 9 to 16 are shorted together.
6. 5,000 V for 1−minute duration is equivalent to 6,000 V for 1−second duration.
RMS
RMS
7. The input−output isolation voltage is a dielectric voltage rating per UL1577. It should not be regarded as an input−output continuous voltage
rating. For the continuous working voltage rating, refer to equipment−level safety specification or DIN EN/IEC 60747−17 Safety and Insulation
Ratings Table on page 4.
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5
NCID9301, NCID9311
ELECTRICAL CHARACTERISTICS
Apply over all recommended conditions, T =−40°C to +125°C, V
= V
= 2.5 V to 5.5 V, unless otherwise specified. All typical values
A
DD1
DD2
are measured at T = 25°C.
A
Symbol
Parameter
Conditions
Min
4.5
2.9
2.1
−
Typ
4.8
3.2
2.4
0.1
Max
Unit
Figure
V
OH
High Level Output
Voltage
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
= 5 V, I = −4 mA
−
V
11
OH
= 3.3 V, I = −2 mA
OH
= 2.5 V, I = −1 mA
OH
V
OL
Low Level Output
Voltage
= 5 V, I = 4 mA
0.4
V
12
OL
= 3.3 V, I = 2 mA
OL
= 2.5 V, I = 1 mA
OL
V
V
Rising Input Voltage
Threshold
−
−
−
0.7 × V
V
V
V
INT+
DDI
Falling Input Voltage
Threshold
0.1 × V
0.1 × V
−
−
INT−
DDI
V
Input Threshold Voltage
Hysteresis
0.2 × V
INT(HYS)
DDI
DDI
I
High Level Input Current
Low Level Input Current
V
V
= V
−
−
−
1
−
−
mA
mA
INH
IH
DDI
I
= 0 V
−1
INL
IL
CMTI
Common Mode Transient
Immunity
V = V
or 0 V,
100
150
kV/ms
16
I
DDI
= 1500 V
V
CM
C
Input Capacitance
V
= V /2 + 0.4 × sin (2pft),
−
2
−
pF
IN
IN
DDI
f = 1 MHz, V = 5 V
DD
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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NCID9301, NCID9311
SUPPLY CURRENT CHARACTERISTICS
Apply over all recommended conditions, T =−40°C to +125°C unless otherwise specified. All typical values are measured at T = 25°C.
A
A
Symbol
Parameter
Conditions
Min
Typ
8.6
Max
11.1
12.1
10.8
11.8
10.6
11.6
11.1
12.1
10.8
11.8
10.6
11.6
12.4
14.5
11.4
13.1
11.1
12.6
13.0
15.7
11.8
13.8
11.4
Unit
mA
Figure
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
DC Supply Current
V
IN
= 5 V, EN = 0/5 V,
DD
= 0/5 V
−
DD1
DD2
DD1
DD2
DD1
DD2
DD1
V
9.4
V
V
= 3.3 V, EN = 0/3.3 V,
= 0/3.3 V
8.3
DD
IN
9.2
V
V
= 2.5 V, EN = 0/2.5 V,
= 0/2.5 V
8.2
DD
IN
9.2
AC Supply Current
1 Mbps
V
DD
= 5 V, EN = 5 V,
−
−
−
8.5
mA
3, 4,
5, 6
C = 15 pF,
L
9.6
V
IN
= 5 V Square Wave
DD2
DD1
DD2
DD1
DD2
DD1
DD2
DD1
DD2
DD1
DD2
DD1
DD2
DD1
DD2
DD1
V
DD
= 3.3 V, EN = 3.3 V,
8.5
C = 15 pF,
L
9.3
V
IN
= 3.3 V Square Wave
V
DD
= 2.5 V, EN = 2.5 V,
8.2
C = 15 pF,
L
9.2
V
IN
= 2.5 V Square Wave
AC Supply Current
10 Mbps
V
DD
= 5 V, EN = 5 V,
9.8
mA
C = 15 pF,
L
12.0
9.1
V
IN
= 5 V Square Wave
V
DD
= 3.3 V, EN = 3.3 V,
C = 15 pF,
L
10.6
8.7
V
IN
= 3.3 V Square Wave
V
DD
= 2.5 V, EN = 2.5 V,
C = 15 pF,
L
10.2
10.4
13.2
9.5
V
IN
= 2.5 V Square Wave
AC Supply Current
15 Mbps
V
DD
= 5 V, EN = 5 V,
mA
C = 15 pF,
L
V
IN
= 5 V Square Wave
V
DD
= 3.3 V, EN = 3.3 V,
C = 15 pF,
L
11.3
9.0
V
IN
= 3.3 V Square Wave
V
DD
= 2.5 V, EN = 2.5 V,
C = 15 pF,
L
I
10.7
13.1
V
IN
= 2.5 V Square Wave
DD2
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NCID9301, NCID9311
SWITCHING CHARACTERISTICS – NCID9301
Apply over all recommended conditions, T =−40°C to +125°C unless otherwise specified. All typical values are measured at T = 25°C.
A
A
Symbol
Parameter
Ch
Conditions
= 5 V, C = 15 pF
Min
Typ
Max
Unit
Figure
t
Propagation Delay to Logic Low
Output (Note 8)
All
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
−
115
170
ns
ns
ns
ns
ns
ns
ns
ns
ms
ns
8, 13
PHL
L
= 3.3 V, C = 15 pF
L
= 2.5 V, C = 15 pF
L
t
Propagation Delay to Logic High
Output (Note 9)
All
All
All
All
All
All
All
All
All
= 5 V, C = 15 pF
−
−
116
26
−
170
70
70
−
PLH
L
= 3.3 V, C = 15 pF
L
= 2.5 V, C = 15 pF
L
PWD
Pulse Width Distortion
= 5 V, C = 15 pF
L
| t
PHL
– t
| (Note 10)
PLH
= 3.3 V, C = 15 pF
L
= 2.5 V, C = 15 pF
L
t
Propagation Delay Skew
(Part to Part) (Note 11)
= 5 V, C = 15 pF
−70
−
PSK(PP)
L
= 3.3 V, C = 15 pF
L
= 2.5 V, C = 15 pF
L
t
R
Output Rise Time (10% to 90%)
Output Fall Time (90% to 10%)
= 5 V, C = 15 pF
3.9
2.3
L
= 3.3 V, C = 15 pF
L
= 2.5 V, C = 15 pF
L
t
F
= 5 V, C = 15 pF
−
−
L
= 3.3 V, C = 15 pF
L
= 2.5 V, C = 15 pF
L
t
t
High Impedance to Logic Low
Output Delay (Note 12)
−
8.4
25
25
1
14
= 5 V, R = 1 kW
PZL
L
= 3.3 V, R = 1 kW
10.0
12.3
10.8
14.3
17.5
0.53
0.50
0.50
11.6
12.9
14.7
L
= 2.5 V, R = 1 kW
L
Logic Low to High Impedance
Output Delay (Note 13)
−
= 5 V, R = 1 kW
PLZ
L
= 3.3 V, R = 1 kW
L
= 2.5 V, R = 1 kW
L
t
t
High Impedance to Logic High
Output Delay (Note 14)
−
15
= 5 V, R = 1 kW
PZH
L
= 3.3 V, R = 1 kW
L
= 2.5 V, R = 1 kW
L
Logic High to High Impedance
Output Delay (Note 15)
−
25
= 5 V, R = 1 kW
PHZ
L
= 3.3 V, R = 1 kW
L
= 2.5 V, R = 1 kW
L
8. Propagation delay t
is measured from the 50% level of the falling edge of the input pulse to the 50% level of the falling edge of the V signal.
O
PHL
9. Propagation delay t
is measured from the 50% level of the rising edge of the input pulse to the 50% level of the rising edge of the V signal.
PLH
PHL
O
10.PWD is defined as | t
– t
PLH
| for any given device.
11. Part−to−part propagation delay skew is the difference between the measured propagation delay times of a specified channel of any two parts
at identical operating conditions and equal load.
12.Enable delay t
is measured from the 50% level of the rising edge of the EN pulse to the 50% of the falling edge of the V signal as it switches
PZL
O
from high impedance state to low state.
13.Disable delay t is measured from the 50% level of the falling edge of the EN pulse to 0.5 V level of the rising edge of the V signal as
PLZ
O
it switches from low state to high impedance state.
14.Enable delay t is measured from the 50% level of the rising edge of the EN pulse to the 50% of the rising edge of the V signal as it switches
PZH
O
from high impedance state to high state.
15.Disable delay t is measured from the 50% level of the falling edge of the EN pulse to V − 0.5 V level of the falling edge of the V signal
PHZ
OH
O
as it switches from high state to high impedance state.
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NCID9301, NCID9311
SWITCHING CHARACTERISTICS – NCID9311
Apply over all recommended conditions, T =−40°C to +125°C unless otherwise specified. All typical values are measured at T = 25°C.
A
A
Symbol
t
Parameter
Ch
Conditions
= 5 V, C = 15 pF
Min
Typ
Max
Unit
Figure
Propagation Delay to Logic
Low Output (Note 8)
A, B
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
−
95
140
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ns
9, 10, 13
PHL
L
= 3.3 V, C = 15 pF
L
= 2.5 V, C = 15 pF
L
C
A,B
C
= 5 V, C = 15 pF
−
−
77
96
77
19
13
−
110
140
110
60
40
60
−
L
= 3.3 V, C = 15 pF
L
= 2.5 V, C = 15 pF
L
t
Propagation Delay to Logic
High Output (Note 9)
= 5 V, C = 15 pF
L
PLH
= 3.3 V, C = 15 pF
L
= 2.5 V, C = 15 pF
L
= 5 V, C = 15 pF
−
L
= 3.3 V, C = 15 pF
L
= 2.5 V, C = 15 pF
L
PWD
Pulse Width Distortion
A,B
C
= 5 V, C = 15 pF
−
L
| t
PHL
– t
| (Note 10)
PLH
= 3.3 V, C = 15 pF
L
= 2.5 V, C = 15 pF
L
= 5 V, C = 15 pF
−
L
= 3.3 V, C = 15 pF
L
= 2.5 V, C = 15 pF
L
t
Propagation Delay Skew
(Part to Part) (Note 11)
All
All
All
All
All
All
All
= 5 V, C = 15 pF
−60
−
PSK(PP)
L
= 3.3 V, C = 15 pF
L
= 2.5 V, C = 15 pF
L
t
R
Output Rise Time
(10% to 90%)
= 5 V, C = 15 pF
2.7
2
L
= 3.3 V, C = 15 pF
L
= 2.5 V, C = 15 pF
L
t
F
Output Fall Time
(90% to 10%)
= 5 V, C = 15 pF
−
−
L
= 3.3 V, C = 15 pF
L
= 2.5 V, C = 15 pF
L
t
t
High Impedance to Logic
Low Output Delay (Note 12)
−
8.4
25
25
1
14
= 5 V, R = 1 kW
PZL
L
= 3.3 V, R = 1 kW
10.0
12.3
10.8
14.3
17.5
0.53
0.50
0.50
11.6
12.9
14.7
L
= 2.5 V, R = 1 kW
L
Logic Low to High Impedance
Output Delay (Note 13)
−
= 5 V, R = 1 kW
PLZ
L
= 3.3 V, R = 1 kW
L
= 2.5 V, R = 1 kW
L
t
t
High Impedance to Logic High
Output Delay (Note 14)
−
15
= 5 V, R = 1 kW
PZH
L
= 3.3 V, R = 1 kW
L
= 2.5 V, R = 1 kW
L
Logic High to High Impedance
Output Delay (Note 15)
−
25
= 5 V, R = 1 kW
PHZ
L
= 3.3 V, R = 1 kW
L
= 2.5 V, R = 1 kW
L
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9
NCID9301, NCID9311
TYPICAL PERFORMANCE CHARACTERISTICS
14
13
12
11
10
9
14
T
A = 25°C
T
A = 25°C
LOAD = No Load
LOAD = 15 pF
13
12
11
10
9
IDD2 VDD = 5 V
IDD2 VDD = 5 V
IDD2 VDD
=
3.3 V
IDD2 VDD = 3.3 V
IDD2 VDD = 2.5 V
IDD2 VDD = 2.5 V
IDD1 VDD = 3.3 V IDD1 VDD = 2.5 V
IDD1 VDD = 3.3 V IDD1 VDD = 2.5 V
IDD1 VDD = 5 V
IDD1 VDD = 5 V
8
8
7
7
0
5
10
15
0
5
10
15
Data Rate (Mbps)
Data Rate (Mbps)
Figure 3. NCID9301 Supply Current vs. Data Rate
(No Load)
Figure 4. NCID9301 Supply Current vs. Data Rate
(Load = 15 pF)
12
12
T
A = 25°C
T
A = 25°C
IDD2 VDD = 5 V
LOAD = No Load
LOAD = 15 pF
IDD2 VDD = 5 V
11
10
9
11
10
9
IDD2 VDD = 3.3 V
IDD2 VDD = 3.3 V
IDD2 VDD = 2.5 V
IDD2 VDD = 2.5 V
IDD1 VDD = 2.5 V
IDD1 VDD = 2.5 V
IDD1 VDD = 3.3 V
IDD1 VDD = 3.3 V
8
8
IDD1 VDD = 5 V
IDD1 VDD = 5 V
7
7
0
5
10
15
0
5
10
15
Data Rate (Mbps)
Data Rate (Mbps)
Figure 5. NCID9311 Supply Current vs. Data Rate
(No Load)
Figure 6. NCID9311 Supply Current vs. Data Rate
(Load = 15 pF)
3.0
130
VDD = 2.5 V to 5 V
Ch A/B/C
125
2.5
120
VUVLO+
tPHL
115
110
105
100
VUVLO−
tPLH
2.0
1.5
−40
−20
0
20
40
60
80
100
120
−40
−20
0
20
40
60
80
100
120
T
A
− Ambient Temperature (5C)
T
A
− Ambient Temperature (5C)
Figure 7. Supply Voltage UVLO Threshold vs.
Ambient Temperature
Figure 8. NCID9301 Propagation Delay vs. Ambient
Temperature
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10
NCID9301, NCID9311
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
110
105
100
95
90
VDD = 2.5 V to 5 V
Ch A/B
VDD = 2.5 V to 5 V
Ch C
85
80
tPHL
tPHL
75
tPLH
tPLH
90
70
65
60
85
80
−40
−20
0
20
40
60
80
100
120
−40
−20
0
20
40
60
80
100
120
T
A
− Ambient Temperature (5C)
T
A
− Ambient Temperature (5C)
Figure 9. NCID9311 Channel A/B Propagation Delay vs. Figure 10. NCID9311 Channel C Propagation Delay vs.
Ambient Temperature
Ambient Temperature
6
5
4
3
2
1
0
1.0
0.8
0.6
0.4
0.2
0.0
T
A = 25 °C
T
A = 25 °C
VDD = 5 V
VDD = 2.5 V
VDD = 3.3 V
VDD = 3.3 V
VDD = 2.5 V
VDD = 5 V
−10
−8
−6
−4
−2
0
0
2
4
6
8
10
I
− High Level Output Current (mA)
I
− Low Level Output Current (mA)
OH
OL
Figure 11. High Level Output Voltage vs. Current
Figure 12. Low Level Output Voltage vs. Current
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11
NCID9301, NCID9311
TEST CIRCUITS
50%
V
I
V
DDI
V
DDO
V
I
V
O
+
−
+
−
t
t
PHL
PLH
V
IN
90%
10%
V
EN
50%
+
−
C
L
V
O
t
R
t
F
Figure 13. VIN to VO Propagation Delay Test Circuit and Waveform
R
1 kW
L
50%
V
I
V
DDI
V
DDO
V
O
+
+
−
t
t
PZL
PLZ
−
V
I
V
IN
0.5 V
V
O
+
−
50%
C
L
V
EN
Figure 14. EN to Logic Low VO Propagation Delay Test Circuit and Waveform
50%
V
I
V
DDO
V
DDI
V
O
+
−
+
−
t
t
PZH
PHZ
V
I
V
IN
1 kW
R
C
L
+
−
L
0.5 V
50%
V
O
V
EN
Figure 15. EN to Logic High VO Propagation Delay Test Circuit and Waveform
1
V
V
DDI
S at 0, V remain consistently low
DDO
V
V
O
O
IN
2
S at 1, V remain consistently high
O
S
0
S at 2, V data same as V data
O IN
SCOPE
V
CM
Figure 16. Common Mode Transient Immunity Test Circuit
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12
NCID9301, NCID9311
APPLICATION INFORMATION
Theory of Operation
and Figure 19. At the transmitter side, the V T input logic
I
X
NCID9301 and NCID9311 are 3−channel digital
isolators. The chip to chip galvanic isolation are provided by
a pair of off−chip capacitors. Digital circuits are used for
processing signals through the 0.5 mm thick isolation
barrier.
state is modulated with a high frequency carrier signal. The
resulting signal is amplified and transmitted to the isolation
barrier. The receiver side detects the barrier signal and
demodulates it using an envelope detection technique and
output V R .
O
X
Pins are trimmed internally as input or output at IO
Switch. Each direction of communication between two
isolated circuits are achieved by implementing a pair of
Serializer/Deserializer and Manchester Encoder/Decoder
functional blocks as shown in Figure 17. The Serializer
circuit converts the parallel data from the IO Switch into a
serial (one bit) stream and the Manchester Encoder converts
this data stream into coded data making it more robust,
efficient and accurate for transmission. After encoding, all
inputs signals are coded as V T and transmitted across the
The output signal of the transceiver V R will go to the
O
X
Manchester Decoder. This decoder is used along with the
receiver to recover the original data from the coded form and
the Deserializer converts the serial stream back to the
original, parallel data and redistributed back to the
corresponding output pins. Both the Serializer/Deserializer
and Manchester Encoder/Decoder are functional blocks on
the transmitting and receiving chips.
The output enable pin EN controls the impedance of the
V
. When EN is at LOW, output V
is set to high
I
X
OX
OX
isolation barrier via Transceiver.
impedance state. The V will only follow the V
when
OX
INX
The off−chip ceramic capacitors that serve both as the
isolation barrier and as the medium of transmission for
signal switching using On−Off keying (OOK) technique,
illustrated in the transceiver block diagram in Figure 18
EN is set to HIGH. V is at default state LOW when the
power supply at the transmitter side is turned off or the input
OX
V
INX
is disconnected.
V
V
INA
INB
V
V
OA
OB
Transceiver
V T
I
V R
O X
IO
Switch
X
Manchester
Decoder
Manchester
Encoder
IO
Switch
Serializer
Deserializer
V
INn
V
On
EN
Figure 17. Operational Block Diagram of Multi−Channels for Forward Direction
ISOLATION
RECEIVER
BARRIER
TRANSMITTER
V T
I
X
TX
Amplifier
OOK
Modulator
RX
Amplifier
Envelope
Detector
ISOLATION
BARRIER
SIGNAL
V T
I
V R
O X
X
OFF−CHIP
CAPACITORS
OSC
V R
O
X
Figure 18. Block Diagram of Transceiver
Layout Recommendation
Figure 19. On−Off Keying Modulation Signals
power supply pins 1 and 16 and ground pins 2 and 15 as
Layout of the digital circuits relies on good suppression of
unwanted noise and electromagnetic interference. It is
recommended to use 4−layer FR4 PCB, with ground plane
below the components, power plane below the ground plane,
signal lines and power fill on top, and signal lines and ground
fill at the bottom as shown in Figure 20. The alternating
polarities of the layers creates interplane capacitances that
aids the bypass capacitors required for reliable operation at
digital switching rates.
In the layout with digital isolators, it is required that the
isolated circuits have separate ground and power planes. The
section below the device should be clear with no power,
ground or signal traces. Maintain a gap equal to or greater
than the specified minimum creepage clearance of the
device package.
shown in Figure 21. Recommended values are 1 mF and
0.1 mF, respectively. Place them between the V pins of the
DD
device and the via to the power planes, with the higher
frequency, lower value capacitor closer to the device pins.
Directly connect the device ground pins 2, 8, 9 and 15 by via
to their corresponding ground planes.
Over Temperature Detection
NCID9301 and NCID9311 have built−in Over
Temperature Detection (OTD) feature that protects the IC
from thermal damage. The output pins will automatically
switch to default state when the ambient temperature
exceeds the maximum junction temperature at threshold of
approximately 160°C. The device will return to normal
operation when the temperature decreases approximately
20°C below the OTD threshold.
It is highly advised to connect at least a pair of low ESR
supply bypass capacitors, placed within 2 mm from the
www.onsemi.com
13
NCID9301, NCID9311
1 mF 0.1 mF
0.1 mF 1 mF
Signal Lines / VDD2 Fill
Signal Lines / VDD1 Fill
V
V
DD2
GND2
DD1
GND1
Plane
GND2
Plane
GND1
No Trace
VDD1 Plane
VDD2 Plane
Signal Lines / GND2 Fill
Signal Lines / GND1 Fill
Figure 20. 4−Layer PCB for Digital Isolator
GND1
GND2
Figure 21. Placement of Bypass Capacitors
ORDERING INFORMATION
†
Part Number
NCID9301
Grade
Package
SOIC16 W
SOIC16 W
SOIC16 W
SOIC16 W
SOIC16 W
SOIC16 W
SOIC16 W
SOIC16 W
Shipping
Industrial
50 Units / Tube
NCID9301R2
Industrial
750 Units / Tape & Reel
50 Units / Tube
NCID9311
Industrial
NCID9311R2
Industrial
750 Units / Tape & Reel
50 Units / Tube
NCIV9301* (pending)
NCIV9301R2* (pending)
NCIV9311* (pending)
NCIV9311R2* (pending)
Automotive
Automotive
Automotive
Automotive
750 Units / Tape & Reel
50 Units / Tube
750 Units / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NCIV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable.
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14
NCID9301, NCID9311
PACKAGE DIMENSIONS
SOIC16 W
CASE 751EN
ISSUE O
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15
NCID9301, NCID9311
2
ON Semiconductor is licensed by the Philips Corporation to carry the I C bus protocol.
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use
of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products
and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems
or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should
Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal
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◊
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