NCL37733BSNT1G [ONSEMI]

LED Driver with Power Factor Correction, Primary-Side-Regulated;


型号：	NCL37733BSNT1G
厂家：	ONSEMI
描述：	LED Driver with Power Factor Correction, Primary-Side-Regulated
文件：	总16页 (文件大小：317K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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Power Factor Corrected

Quasi-Resonant Primary

Side Current-Mode

Controller for LED Lighting

Below 25 W

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NCL37733

The NCL37733 is a compact driver for power−factor corrected

flyback and non−isolated buck−boost and SEPIC converters. The

controller operates in a quasi−resonant mode to provide optimal

efficiency, and embeds a proprietary control method which allows the

LED current to be tightly regulated from the primary side, thus

eliminating the need for a secondary−side feedback circuitry and for

an optocoupler.

TSOP−6

CASE 318G−02

Housed in a TSOP−6 package, the device is highly integrated with a

minimum number of external components. A robust suite of safety

protection is built in to simplify the design. This device is specifically

intended for very compact space efficient designs.

MARKING DIAGRAM

2T4AYWG

Features

• Quasi−resonant Peak Current−mode Control Operation

• Constant Current Control with Primary Side Feedback

• Tight LED Constant Current Regulation of 2% typical

• Near−Unity Power Factor (>0.95 typically)

• Optimized for Line Wide−range Applications

• Line Feedforward for Enhanced Regulation Accuracy

• Low Start−up Current (10 mA typ.)

2T4 = Specific Device Code

=Assembly Location

= Year

= Work Week

= Pb−Free Package

(Note: Microdot may be in either location)

• Wide V Range

PIN CONNECTIONS

• 100 mA / 150 mA Totem Pole Driver with 12 V Gate Clamp

• Robust Protection Features

CS/ZCD

GND

DRV

♦ OVP on V

♦ Programmable Over Voltage / LED Open Circuit Protection

♦ Cycle by cycle peak current limit

♦ Winding Short Circuit Protection

♦ Secondary Diode Short Protection

♦ Output Short Circuit Protection

COMP

ORDERING INFORMATION

†

Device

NCL37733BSNT1G

Package

Shipping

♦ Thermal Shutdown

TSOP−6

(Pb−Free/

Halide Free)

3000 / Tape

& Reel

♦ V Undervoltage Lockout

♦ Brown−Out Detection

• Pb−Free, Halide−Free MSL1 Product

†For information on tape and reel specifications,

including part orientation and tape sizes, please

refer to our Tape and Reel Packaging Specification

Brochure, BRD8011/D.

Typical Application

• Integral LED Bulbs and Tubes below 25 W

• LED Drivers / Power Supplies below 25 W

Publication Order Number:

September, 2020 − Rev. 0

NCL37733/D

NCL37733

TYPICAL APPLICATION SCHEMATIC

Aux

NCL37733

CS/ZCD

DRV

GND

COMP

sense

Figure 1. Typical Application Schematic in a Flyback Converter

Aux

NCL37733

CS/ZCD

GND

DRV

COMP

sense

Figure 2. Typical Application Schematic in a Buck−Boost Converter

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NCL37733

Table 1. PIN FUNCTION DESCRIPTION

Pin #

Pin Name

Function

Pin Description

CS/ZCD

Current Sense and Zero This multi−function pin is designed to monitor the primary peak current for protection

Current Detection

and output current control and the auxiliary winding voltage for zero current detection

GND

Controller ground pin

COMP

Filtering Capacitor

This pin receives a filtering capacitor for power factor correction. Typical values

ranges from 0.47 − 4.70 mF

Input Voltage Sensing

This pin observes the input voltage rail and protects the LED driver in case of too low

mains conditions (brown−out). This pin also observes the input voltage rail for:

− Power Factor Correction

− Line Range Detection

IC Supply Pin

Driver Output

This pin is the positive supply of the IC. The circuit starts to operate when V

exceeds 18 V and turns off when V goes below 8.8 V (typical values). After

start−up, the operating range is 9.4 V up to 25.5 V (V

minimum level).

CC(OVP)

DRV

The driver’s output to an external MOSFET

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NCL37733

INTERNAL CIRCUIT ARCHITECTURE

Enable

STOP

REF

Aux_SCP

OFF

ZCD

Over Voltage

Protection

VCC

UVLO

Latch

Fault

Management

VCC Management

Internal

Thermal

Shutdown

VCC_max

VCC Over Voltage

Protection

WOD_SCP

BO_NOK

FF_mode

DRV

VCC

Zero Crossing Detection Logic

(ZCD Blanking, Time−Out, ...)

Clamp

Circuit

Aux. Winding Short Circuit Prot.

DRV

Aux_SCP

CS_ok

DRV

Line

feed−forward

REF

STOP

CS/ZCD

Power Factor and

Constant−Current

Control

Leading

Edge

Blanking

CS_reset

Ipkmax

Maximum

on time

STOP

on,max

COMP

Ipkmax

Max. Peak

Current

Limit

CS_ok

CS Short

Protection

BO_NOK

Brown−Out

UVLO

on,max

Winding and

Output Diode

Short Circuit

Protection

WOD_SCP

GND

Figure 3. Internal Circuit Architecture

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NCL37733

Table 2. MAXIMUM RATINGS TABLE

Symbol

Rating

Value

Units

Maximum Power Supply voltage, V pin, continuous voltage

−0.3 to 30

CC(MAX)

Maximum current for V pin

Internally limited

CC(MAX)

Maximum driver pin voltage, DRV pin, continuous voltage

Maximum current for DRV pin

−0.3, V

(Note 1)

DRV(MAX)

DRV

−300, +500

DRV(MAX)

Maximum voltage on low power pins (except DRV and V pins)

−0.3, 5.5 (Notes 2 and 5)

−2, +5

MAX

Current range for low power pins (except DRV and V pins)

MAX

Thermal Resistance Junction−to−Air

Maximum Junction Temperature

360

150

°C/W

°C

J−A

J(MAX)

Operating Temperature Range

−40 to +125

−60 to +150

3.5

°C

Storage Temperature Range

°C

ESD Capability, Human Body Model (HBM) (Note 3)

ESD Capability, Machine Model (MM) (Note 3)

250

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality

should not be assumed, damage may occur and reliability may be affected.

1. V

is the DRV clamp voltage V

when V is higher than V

. V

is V otherwise.

DRV

DRV(high)

DRV(high) DRV CC

2. This level is low enough to guarantee not to exceed the internal ESD diode and 5.5 V ZENER diode. More positive and negative voltages

can be applied if the pin current stays within the −2 mA / 5 mA range.

3. This device contains ESD protection and exceeds the following tests: Human Body Model 3500 V per JEDEC Standard JESD22−A114E,

Machine Model Method 250 V per JEDEC Standard JESD22−A115B.

4. This device contains latch−up protection and exceeds 100 mA per JEDEC Standard JESD78.

5. Recommended maximum V voltage for optimal operation is 4 V.

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NCL37733

Table 3. ELECTRICAL CHARACTERISTICS

(Unless otherwise noted: For typical values T = 25°C, V = 12 V, V = 0 V

CS/ZCD

For min/max values T = −40°C to +125°C, Max T = 150°C, V = 12 V)

Description

Test Condition

Symbol

Min

Typ

Max

Unit

Startup and Supply Circuits

Supply Voltage

Startup Threshold

Minimum Operating Voltage

increasing

decreasing

16.0

8.2

8.0

4.0

18.0

8.8

−

20.0

9.4

−

CC(on)

CC(off)

Hysteresis V

– V

CC(on)

CC(off)

CC(HYS)

CC(reset)

Internal logic reset

4.8

6.0

Threshold for V Over Voltage Protection

25.5

26.8

28.5

CC(OVP)

noise filter

−

CC(off)

VCC(off)

noise filter

CC(reset)

VCC(reset)

Startup current

=15.9 V

−

CC(start)

Startup current in fault mode

CC(sFault)

Supply Current

Device Disabled / Fault

Device Enabled / No output load on pin 5

Device Switching

> V

= 65 kHz

1.15

–

−

1.34

2.0

2.5

1.55

3.5

4.0

CC(off)

CC1

CC2

CC3

= 470 pF, F = 65 kHz

DRV

Current Sense

Maximum Internal current limit

0.94

220

0.99

275

1.04

340

ILIM

Leading Edge Blanking Duration for Current

Sensing

LEB

Propagation delay from current detection to gate

off−state

−

100

150

ILIM

Maximum on−time

1.35

−

1.65

−

on(MAX)

Threshold for immediate fault protection activation

1.50

175

CS(stop)

Leading Edge Blanking Duration for V

(Note 1)

CS(stop)

BCS

Current source for CS to GND short detection

420

520

620

150

CS(short)

Current sense threshold for CS to GND short

detection

rising

CS(low)

Gate Drive

Drive Resistance

DRV Sink

−

SNK

DRV Source

SRC

Drive current capability

DRV Sink (Note 2)

150

100

−

SNK

DRV Source (Note 2)

SRC

Rise Time (10 % to 90 %) (Note 2)

Fall Time (90 % to 10 %) (Note 2)

DRV Low Voltage

= 470 pF

–

−

–

−

DRV

= V

+0.2 V

CC(off)

DRV(low)

= 470 pF, R

=33 kW

DRV

DRV High Voltage

= V

CC(MAX)

DRV(high)

= 470 pF, R

=33 kW

DRV

Zero Voltage Detection Circuit

Upper ZCD threshold voltage

Lower ZCD threshold voltage

ZCD hysteresis

rising

−

150

−

ZCD

ZCD(rising)

ZCD

falling

ZCD(falling)

−

ZCD(HYS)

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NCL37733

Table 3. ELECTRICAL CHARACTERISTICS

(Unless otherwise noted: For typical values T = 25°C, V = 12 V, V = 0 V

CS/ZCD

For min/max values T = −40°C to +125°C, Max T = 150°C, V = 12 V)

Description

Test Condition

decreasing

Symbol

Min

Typ

Max

Unit

Propagation Delay from valley detection to DRV

high

−

200

300

ZCD

DEM

Blanking delay after on−time (normal operation)

Blanking delay after on−time (startup phase)

Timeout after last DEMAG transition

1.12

2.24

6.0

1.50

3.00

7.3

1.88

3.76

9.0

ZCD(blank1)

ZCD(blank2)

TIMO

Time for which the CS/ZCD pin is grounded when

the DRV turns low

DRV falling

200

325

450

Watch Dog Timer (restart timer in the absence of

demagnetization signal like for instance in startup

or short circuit conditions)

WDG

Pulling−down resistor

ZCD

= V

ZCD(pd)

200

ZCD(falling)

Constant Current and Power Factor Control

Reference Voltage at T = 25°C

195

192.5

190

187.5

−

200

200.0

200

200.0

205

207.5

210

212.5

−

REF

Reference Voltage at T = 25°C to 100°C

Reference Voltage at T = −20°C to 125°C

Reference Voltage T = −40°C to 125°C

control

to current setpoint division ratio

ratio

Error amplifier gain

REFX

REF

Error amplifier current capability

COMP Pin Start−up Current Source

Line Feed Forward

REFX

REF

COMP pin grounded

125

EA_STUP

to I

conversion ratio

9.8

19.5

10.9

22.0

11.8

24.5

CS(offset)

LFF

Line feed−forward current on CS pin

Offset current maximum value

Line Range Detection

DRV high, V = 2 V

LFF

> 5 V

offset(MAX)

Threshold for high−line range (HL) detection

Threshold for low−line range (LL) detection

Blanking time for line range detection

Fault Protection

rising

falling

1.9

1.8

2.0

1.9

2.1

2.0

HL(blank)

Thermal Shutdown (Note 2)

= 65 kHz

130

−

150

170

−

°C

SHDN

SHDN(HYS)

Thermal Shutdown Hysteresis

Threshold voltage for output short circuit or aux.

winding short circuit detection

0.94

0.99

1.04

ZCD(short)

Short circuit detection Timer

Auto−recovery timer duration

CS/ZCD OVP Threshold

< V

OVLD

110

ZCD

ZCD(short)

recovery

4.32

0.95

0.85

4.50

1.00

0.90

4.68

1.05

0.95

OVP2

BO(on)

BO(off)

Brown−Out ON level (IC start pulsing)

Brown−Out OFF level (IC shuts down)

BO comparators delay

rising

falling

BO(delay)

BO(blank)

Brown−Out blanking time

pin Pulling−down Current

= V

BO(bias)

250

450

BO(on)

1. The CS/ZCD pin is grounded for the t

2. Guaranteed by Design

duration

BCS

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NCL37733

APPLICATION INFORMATION

The NCL37733 is designed to control flyback−,

switching cycles, the controller stops operating for

the 4−s auto−recovery delay.

♦ Cycle−by−cycle peak current limit:

buck−boost− and SEPIC−based LED drivers. A proprietary

circuitry ensures accurate primary−side regulation of the

output current (without the need for a secondary−side

feedback) and near−unity power factor correction. The

circuit contains a suite of powerful protections to ensure a

robust LED driver design without the need for extra

components or overdesign.

when the current sense voltage exceeds the internal

threshold V , the MOSFET is immediately

ILIM

turned off (cycle by cycle current limitation).

♦ Winding or Output Diode Short−Circuit Protection

(WODSCP):

an additional comparator senses the CS signal and

• Quasi−Resonance Current−Mode Operation:

implementing quasi−resonance operation in peak

current−mode control, the NCL37733 optimizes the

efficiency by switching in the valley of the MOSFET

drain−source voltage in low−line conditions. When in

high line, the circuit skips one valley to lower the

switching frequency.

stops the controller if it exceeds 150% x V

for 4

ILIM

consecutive cycles. This feature can protect the

converter if a winding is shorted or if the output

diode is shorted or simply if the transformer

saturates.

♦ Auxiliary Short−circuit protection (AUX_SCP):

If the ZCD pin voltage remains low for a 90 ms time

interval, the controller detects that the output or the

ZCD pin is grounded and hence, stops pulsating

until a 4 s time has elapsed.

• Primary Side Constant Current Control with Power

Factor Correction:

proprietary circuitry allows the LED driver to achieve

both near−unity power factor correction and accurate

regulation of the output current without requiring any

secondary−side feedback (no optocoupler needed). A

power factor as high as 0.99 and an output current

deviation below 2% are typically obtained.

♦ Open LED protection:

if the LED string is open, the output voltage will rise

and lead the programmable over−voltage protection

(OVP2) or the V OVP to trip (V OVP trips

when the V pin voltage exceeds the V

CC(OVP)

• Main protection features:

threshold – 26.8 V typically). In such a case, the

controller shuts down and waits 4 seconds before

restarting switching operation.

♦ Programmable Over−Voltage Protection (OVP2):

The CS/ZCD pin provides a programmable OVP

protection. Adjust the external ZCD resistors divider

or add a Zener diode to adjust the protection

threshold: if the CS/ZCD pin voltage exceeds 4.5 V

(during the demagnetization time) for 4 consecutive

♦ Floating or Short Pin Detection:

the circuit can detect most of these situations which

helps pass safety tests.

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NCL37733

Constant Current Control

V and V of Figure 4). This circuitry generates the current

The NCL37733 embeds an analog/digital block to control

the power factor and regulate the output current by

setpoint (V

) and compares it to the current sense

CONTROL

signal (V ) to dictate the MOSFET turning off event when

monitoring the ZCD, V and CS pin voltages (signals ZCD,

exceeds V

CONTROL

REFX

ZCD

STOP

PWM Latch reset

Power Factor and

Constant−Current

Control

COMP

Figure 4. Power Factor and Constant−Current Control

Start−up Sequence

As illustrated in Figure 4, the V pin provides the

Generally an LED lamp is expected to emit light in < 1 s

and typically within 500 ms. The start−up phase consists of

sinusoidal reference necessary for shaping the input current.

The obtained current reference is further modulated so that

when averaged over a half−line period, it is equal to the

the time to charge the V capacitor, to begin switching and

the time to charge the output capacitor until sufficient

current flows into the LED string. To speed−up this phase,

the following characteristics define the start−up sequence:

output current reference (V

). This averaging process is

REFX

made by an internal Operational Trans−conductance

Amplifier (OTA) and the capacitor connected to the COMP

pin (C1 of Figure 4). Typical COMP capacitance is 1 mF and

should not be less than 470 nF to ensure stability. The COMP

ripple does not affect the power factor performance as the

circuit digitally eliminates it when generating the current

setpoint.

• The COMP pin is grounded when the circuit is off. The

average COMP voltage needs to exceed the V pin

peak value to have the LED current properly regulated

(whatever the current target is). To speed−up the COMP

capacitance charge and shorten the start−up phase, an

internal 80 mA current source adds to the OTA sourced

current (60 mA max typically) to charge up the COMP

capacitance. The 80 mA current source remains on until

the OTA starts to sink current as a result of the COMP

pin voltage sufficient rise. At that moment, the COMP

pin being near its steady−state value, only the OTA

drives the COMP pin.

If the V pin properly conveys the sinusoidal shape, power

factor will be close to unity and the Total Harmonic

Distortion (THD) will be low. In any case, the output current

will be well regulated following the equation below:

V_REF

2 N_PSR_sense

I_out

(eq. 1)

Where:

• If the load is shorted, the circuit will operate in hiccup

• N is the secondary to primary transformer turns

mode with V oscillating between V

and

CC(off)

• R

• V

= N / N

S P

CC(on)

until the Auxiliary Short Circuit Protection,

is the current sense resistor (see Figure 1).

sense

REF

AUX_SCP, forces the 4 s auto−recovery delay to reduce

the operation duty−ratio (AUX_SCP trips if the ZCD

pin voltage does not exceed 1 V within a 90 ms active

period of time thus indicating a short to ground of the

ZCD pin or an excessive load preventing the output

voltage from rising). Figure 5 illustrates a start−up

sequence with the output shorted to ground.

is the output current internal reference (200 mV).

Whenever a major fault is detected which forces the

auto−recovery mode, the COMP pin is grounded for the 4−s

interruption. This is also the case if one of these situations

is detected: brown−out, UVLO, TSD fault. This ensures a

clean start−up when the circuit resumes operation.

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NCL37733

Figure 5. Start−up Sequence in a Load Short−circuit Situation

Zero Crossing Detection Block

operation recovery after a fault), the ZCD blanking time is

(3 ms typically) and keeps this value until the

The CS/ZCD pin detects when the drain−source voltage

of the power MOSFET reaches a valley by crossing down

the 55 mV internal threshold and initiates a new DRV pulse

at that moment. At startup and in overload conditions, the

ZCD comparator may not be able to detect the

demagnetization signal. To allow a new DRV pulse to occur,

the NCL37733 features a watchdog timer which initiates a

DRV pulse if the CS/ZCD pin voltage does not trig the ZCD

comparator for the watchdog time. The watchdog duration

is typically 55 ms at low line. It increases to 62 ms when the

line range is detected (see next section).

ZCD(blank2)

ZCD signal is high enough to be detected by the ZCD

comparator (higher than V , 90 mV typically). At

ZCD(rising)

that moment, the ZCD blanking time recovers its nominal

level (t =1.5 ms, typically).

ZCD(blank1)

If the ZCD pin or the auxiliary winding happen to be

shorted, the watchdog function would normally make the

controller keep switching and hence lead to improper LED

current regulation. The “AUX_SCP” protection prevents

such a stressful operation: a timer starts counting which is

only reset when the ZCD voltage exceeds the V

ZCD(short)

As detailed in next section, the NCL37733 operates in QR

mode at low line and at valley 2 in high−line conditions. If

the auxiliary winding free oscillations are extremely

damped, the ZCD comparator may not be able to detect the

second valley as necessary at high line. To overcome this

high−line situation, the NCL37733 features a time−out

circuit to initiate a DRV pulse if once the demagnetization

is detected, the CS/ZCD pin voltage stays below the ZCD

comparator internal threshold for about 7.3 ms. Hence, the

time−out acts as a substitute clock for valley−2 detection.

threshold (1 V typically). If this timer reaches 90 ms (no

ZCD voltage pulse having exceeded V for this time

period), the controller detects a fault and stops operation for

4 seconds.

ZCD(short)

The CS/ZCD pin is grounded for 325 ns (time T of the

parametric table) when the drive turns low. This prevents a

possible CS residual voltage to be taken into account by the

ZCD comparator, which could otherwise occur in particular

if a filtering capacitor was added to the pin. Similarly, the

CS/ZCD pin is “reset” when the drive turns high. Practically,

the pin is grounded for the 175 ns t

time (Leading Edge

BCS

In other words:

Blanking Duration for V ) to in this case, avoid that a

CS(stop)

• The timeout timer initiates a DRV pulse at high line if

valley 1 is detected but valley 2 cannot be detected.

• The watchdog timer prevents the circuit from keeping

permanently off if no demagnetization signal can be

detected (e.g. at startup).

AUX

remaining voltage alters the current sense block

operation.

For an optimal operation, the maximum ZCD level

should be maintained below 5 V to stay safely below the

built in clamping voltage of the pin.

Whenever the controller enters operation (cold startup,

restart after a failure to startup at the first attempt or

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NCL37733

Line Range Detection

As sketched in Figure 6, this circuit detects the low−line

soon as the V pin voltage exceeds V (2.0 V typical).

These levels roughly correspond to 152 V rms and

160 V rms line voltages if the external resistors divider

range if the V pin remains below the V threshold (1.9 V

typical) for more than the 25 ms blanking time. The

high−line range is detected (“HL” of Figure 6 is high) as

applied to the V pin is designed to provide a 1 V peak value

at 80 V rms.

Input Voltage

Rail

reset

25 ms

blanking time

−

if HL is low

if HL is high

Figure 6. Line Range Detection Circuitry

In the low−line range, conduction losses are generally

dominant. Adding a dead−time would further increase these

losses by forcing increased switching current. In high−line

conditions, switching losses generally are the most critical.

It is thus efficient to skip one valley to lower the switching

frequency. Hence, under normal operation, the NCL37733

optimizes the efficiency over the line range by turning on the

MOSFET at the first valley in low−line conditions and at the

second valley in the high−line case. This is illustrated by

Figure 7 that sketches the MOSFET Drain−source voltage

in both cases.

Figure 7. Quasi−resonant Mode in Low Line (left), Turn on at Valley 2 when in High Line (right)

In addition, the gain of the current control block is divided

by two when the high−line range is detected. This allows for

an optimal resolution of the output current over the line

range.

current. Now, the MOSFET cannot turn off at the very

moment when the current−sense voltage exceeds V

There actually exists a propagation delay for which the

primary current keeps rising. As a result, the primary current

control

does not exactly peak to the expected ( V

value but to a higher level. The NCL37733 features the line

feedforward function to compensate for this effect.

/ R

)

control

SENSE

Line Feedforward

The NCL37733 computes the current setpoint (V

for power factor correction and proper regulation of the LED

)

control

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NCL37733

Input Voltage

Rail

CS/ZCD

LFF

SENSE

DRV

NCL37733

Auxiliary

winding

Figure 8. Line Feed−Forward Schematic

As illustrated by Figure 8, the input voltage is sensed by

the V pin and converted into a current (I ) which is

• Winding or Output Diode Short Circuit

Protection(WODSCP)

LFF

sourced by the CS/ZCD pin during the MOSFET on−time.

An external resistor (R ) being placed between the

If a transformer winding happens to be shorted, the

primary inductance will collapse leading the current to

ramp up in a very abrupt manner. The V

MOSFET current sense resistor (R

) and the CS pin,

SENSE

ILIM

this current produces a voltage offset proportional to the

input voltage which is added to the CS signal. This

effectively compensates for the over−currents caused by the

switching delays. For optimal output current accuracy over

comparator (current limitation threshold) will trip to

open the MOSFET and eventually stop the current rise.

However, because of the abnormally steep slope of the

current, internal propagation delays and the MOSFET

turn−off time will make possible the current rise up to

50% or more of the nominal maximum value set by

the line range, R must thus be optimized as a function of

the application switching delays.

. As illustrated in Figure 9, the circuit uses this

ILIM

Protections

current overshoot to detect a winding short circuit. The

leading edge blanking (LEB) time for short circuit

protection is significantly shorter than the LEB time for

cycle−by−cycle protection (LEB2 lasts for T

ns typically – while LEB1 lasts for T

typically). Practically, if four consecutive switching

periods lead the CS pin voltage to exceed V

auto−recovery mode (4 s operation interruption

between active bursts). Similarly, this function can also

protect the power supply if the output diode is shorted

or if the transformer simply saturates.

The circuit incorporates a large variety of protections to

make the LED driver very rugged. Among them, we can list:

• Output Short Circuit Situation

– 175

BCS

An overload fault is detected if the CS/ZCD pin voltage

– 275 ns

LEB

remains below V

compared to V

ZCD blanking time is elapsed. In such a situation, the

circuit stops generating pulses until the 4 s delay

auto−recovery time has elapsed.

for 90 ms. The signal is

during the off time after the

ZCD(short)

CS(stop)

=150% *V ), the controller enters

CS(stop) ILIM

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NCL37733

DRV

LEB1

PWMreset

Ipkmax

V_control/ 4

−

STOP

−

UVLO

BONOK

TSD

V_ILIMIT

OVP2

LEB2

WOD_SCP

4−pulse

counter

−

OFF

AUX_SCP

VCC(ovp)

V_CS(stop)

4−s auto−recovery timer

Figure 9. Winding Short Circuit Protection, Max. Peak Current Limit Circuits

• V Over Voltage Protection

• Brown−Out Protection

The circuit stops generating pulses if V exceeds

The NCL37733 prevents operation when the line

voltage is too low for proper operation. As sketched in

Figure 10, the circuit detects a brown−out situation

and enters auto−recovery mode. This feature

CC(OVP)

protects the circuit if the output LED string happens to

open or is disconnected.

(BONOK is high) if the V pin remains below the

threshold (0.9 V typical) for more than the

• Programmable Over Voltage Protection (OVP2)

BO(off)

25 ms blanking time. In this case, the controller stops

operating. Operation resumes as soon as the V pin

voltage exceeds V

higher than V

overrides the V normal sequence (no need for V

cycling down below V

immediately reduces to I

charges up to V

operating.

The ZCD signal is compared to an internal 4.5 V

threshold. If V

exceeds this threshold for more than

ZCD

(1.0 V typical) and V is

BO(on)

1 ms (after the ZCD blanking time), an OVP event is

detected. If this happens for 4 consecutive switching

cycles, an OVP fault is detected and the system enters

auto−recovery mode.

. To ease recovery, the circuit

CC(on)

). Instead, its consumption

CC(off)

so that V rapidly

CC(start)

• Cycle−by−Cycle Current Limit

. Once done, the circuit re−starts

CC(on)

When the current sense voltage exceeds the internal

threshold V , the MOSFET is turned off for the rest

ILIM

of the switching cycle.

Input Voltage

Rail

reset

25 ms

BONOK

blanking time

−

if BONOK is high

if BONOK is low

BO(on)

BO(off)

Figure 10. Brown−out Protection Circuit

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NCL37733

impedance every time it starts−up and after DRV pulses

• Die Over Temperature (TSD)

are terminated by the 36 ms maximum on−time. If the

measured impedance does not exceed 170 W typically,

the circuit stops operating. In practice, it is

recommended to place a minimum of 500 W in series

between the CS pin and the current sense resistor to

take into account possible parametric deviations.

The circuit stops operating if the junction temperature

(T ) exceeds 150°C typically. The controller remains

off until T goes below nearly 100°C.

• Pin connection faults

The circuit addresses most pin connection fault cases.

In particular, the circuit detects the CS pin short to

ground situations by sensing the CS/ZCD pin

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NCL37733

PACKAGE OUTLINE

TSOP−6

CASE 318G−02

ISSUE V

NOTES:

1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETERS.

3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM

LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.

4. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,

PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR

GATE BURRS SHALL NOT EXCEED 0.15 PER SIDE. DIMENSIONS D

AND E1 ARE DETERMINED AT DATUM H.

GAUGE

PLANE

5. PIN ONE INDICATOR MUST BE LOCATED IN THE INDICATED ZONE.

MILLIMETERS

SEATING

NOTE 5

DIM

MIN

0.90

0.01

0.25

0.10

2.90

2.50

1.30

0.85

0.20

NOM

1.00

MAX

1.10

0.10

0.50

0.26

3.10

3.00

1.70

1.05

0.60

PLANE

DETAIL Z

0.06

0.38

0.18

3.00

2.75

0.05

1.50

0.95

0.40

0.25 BSC

−

DETAIL Z

0°

10°

RECOMMENDED

SOLDERING FOOTPRINT*

0.60

0.95

3.20

0.95

PITCH

DIMENSIONS: MILLIMETERS

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

ON Semiconductor and

are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.

ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent

coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.

ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability

arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.

Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,

regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or

specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer

application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not

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NCL37733BSNT1G [ONSEMI]

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