NCP133_15 [ONSEMI]
500 mA, Very Low Dropout Bias Rail CMOS Voltage Regulator;
| 型号： | NCP133_15 |
| 厂家： | 
ONSEMI |
| 描述： | 500 mA, Very Low Dropout Bias Rail CMOS Voltage Regulator |
| 文件： | 总9页 (文件大小：178K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NCP133
500 mA, Very Low Dropout
Bias Rail CMOS Voltage
Regulator
The NCP133 is a 500 mA VLDO equipped with NMOS pass
transistor and a separate bias supply voltage (V ). The device
BIAS
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T
provides very stable, accurate output voltage with low noise suitable
for space constrained, noise sensitive applications. In order to
optimize performance for battery operated portable applications, the
MARKING
DIAGRAM
NCP133 features low I consumption. The XDFN6 1.2 mm x 1.2 mm
Q
package is optimized for use in space constrained applications.
X M
Features
XDFN6
CASE 711AT
• Input Voltage Range: 0.8 V to 5.5 V
• Bias Voltage Range: 2.4 V to 5.5 V
• Adjustable and Fixed Voltage Versions Available
X
M
= Specific Device Code
= Date Code
• Output Voltage Range: 0.8 V to 2.1 V (Fixed) and 0.8 V to 3.6 V
(Adjustable)
PIN CONNECTIONS
•
1.5% Accuracy over Temperature, 0.5% V
@ 25°C
OUT
• Ultra−Low Dropout: Typ. 140 mV at 500 mA
• Very Low Bias Input Current of Typ. 80 mA
OUT
1
2
3
6
5
4
IN
• Very Low Bias Input Current in Disable Mode: Typ. 0.5 mA
• Logic Level Enable Input for ON/OFF Control
• Output Active Discharge Option Available
GND
BIAS
GND
ADJ/NC
EN
• Stable with a 2.2 mF Ceramic Capacitor
• Available in XDFN6 − 1.2 mm x 1.2 mm x 0.4 mm Package
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
(Top VIew)
Compliant
Typical Applications
ORDERING INFORMATION
See detailed ordering and shipping information on page 8 of
this data sheet.
• Battery−powered Equipment
• Smartphones, Tablets
• Cameras, DVRs, STB and Camcorders
V
V
BIAS
BIAS
>2.7 V
>2.7 V
NCP133
NCP133 − ADJ
100 nF
100 nF
BIAS
IN
BIAS
IN
V
V
OUT
1 V up to 500 mA
OUT
OUT
ADJ
OUT
1 V up to 500 mA
V
1.5 V
V
IN
1.5 V
IN
R1
R2
2.2 mF
2.2 mF
1 mF
1 mF
EN
EN
GND
GND
V
V
EN
EN
Figure 1. Typical Application Schematics
© Semiconductor Components Industries, LLC, 2015
1
Publication Order Number:
March, 2015 − Rev. 3
NCP133/D
NCP133
CURRENT
LIMIT
OUT
IN
ENABLE
BLOCK
EN
BIAS
UVLO
150 W
VOLTAGE
REFERENCE
+
−
THERMAL
LIMIT
*Active
DISCHARGE
GND
*Active output discharge function is present only in NCP133AMXyyyTCG devices.
yyy denotes the particular output voltage option.
Figure 2. Simplified Schematic Block Diagram − Fixed Version
CURRENT
LIMIT
OUT
IN
ENABLE
BLOCK
150 W
EN
*Active
DISCHARGE
BIAS
UVLO
0.80 V
VOLTAGE
REFERENCE
+
−
THERMAL
LIMIT
ADJ
GND
*Active output discharge function is present only in NCP133AMXADJTCG devices.
Figure 3. Simplified Schematic Block Diagram − Adjustable Version
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2
NCP133
PIN FUNCTION DESCRIPTION
Pin No.
XDFN6
Pin Name
Description
1
OUT
Regulated Output Voltage pin
Not internally connected (Note 1)
2 (Fixed)
2 (Adj)
3
N/C
ADJ
Adjustable Regulator Feedback Input. Connect to output voltage resistor divider central node.
EN
Enable pin. Driving this pin high enables the regulator. Driving this pin low puts the regulator into
shutdown mode.
4
BIAS
Bias voltage supply for internal control circuits. This pin is monitored by internal Under-Voltage
Lockout Circuit.
5
6
GND
IN
Ground
Input Voltage Supply pin
Pad
Should be soldered to the ground plane for increased thermal performance.
1. True no connect. Printed circuit board traces are allowable
ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
Unit
V
Input Voltage (Note 2)
V
IN
−0.3 to 6
Output Voltage
V
OUT
−0.3 to (V +0.3) ≤ 6
V
IN
Chip Enable, Bias and Adj Input
Output Short Circuit Duration
Maximum Junction Temperature
Storage Temperature
V
V
V
−0.3 to 6
unlimited
150
V
EN, BIAS, ADJ
t
s
SC
T
J
°C
°C
V
T
−55 to 150
2000
STG
ESD Capability, Human Body Model (Note 3)
ESD Capability, Machine Model (Note 3)
ESD
HBM
ESD
200
V
MM
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
2. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
3. This device series incorporates ESD protection (except OUT pin) and is tested by the following methods:
ESD Human Body Model tested per EIA/JESD22−A114
ESD Machine Model tested per EIA/JESD22−A115
Latchup Current Maximum Rating tested per JEDEC standard: JESD78.
THERMAL CHARACTERISTICS
Rating
Symbol
Value
Unit
Thermal Characteristics, XDFN6 1.2 mm x 1.2 mm
Thermal Resistance, Junction−to−Air
RqJA
170
°C/W
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3
NCP133
ELECTRICAL CHARACTERISTICS −40°C ≤ T ≤ 85°C; V
= 2.7 V or (V
+ 1.6 V), whichever is greater, V = V
+
J
BIAS
OUT
IN
OUT(NOM)
0.3 V, I
= 1 mA, V = 1 V, unless otherwise noted. C = 1 mF, C = 2.2 mF. Typical values are at T = +25°C. Min/Max values are
OUT J
OUT
EN
IN
for −40°C ≤ T ≤ 85°C unless otherwise noted. (Note 5)
J
Parameter
Test Conditions
Symbol
Min
Typ
Max
Unit
Operating Input Voltage
Range
V
IN
V
+
5.5
V
OUT
V
DO
Operating Bias Voltage
Range
V
(V
+
5.5
V
V
V
BIAS
OUT
1.40) ≥ 2.4
Undervoltage Lock−out
V
Rising
UVLO
1.6
0.2
BIAS
Hysteresis
Reference Voltage
(Adj devices only)
T = +25°C
J
V
0.800
REF
Output Voltage Accuracy
(Note 4)
V
V
0.5
%
%
OUT
Output Voltage Accuracy
(Note 4)
−40°C ≤ T ≤ 85°C, V
+ 0.3 V ≤ V ≤
IN
OUT(NOM)
−1.5
+1.5
J
OUT(NOM)
+ 1.0 V, 2.7 V or (V
OUT
V
+
OUT(NOM)
1.6 V), whichever is greater < V
< 5.5 V,
BIAS
1 mA < I
< 500 mA
OUT
V
V
Line Regulation
V
+ 0.3 V ≤ V ≤ 5.0 V
Line
Line
0.01
0.01
%/V
%/V
IN
OUT(NOM)
IN
Reg
Line Regulation
2.7 V or (V
greater < V
+ 1.6 V), whichever is
OUT(NOM)
BIAS
Reg
< 5.5 V
BIAS
Load Regulation
I
I
I
I
= 1 mA to 500 mA
= 150 mA (Note 6)
= 500 mA (Note 6)
Load
1.5
37
mV
mV
OUT
OUT
OUT
OUT
Reg
V
IN
Dropout Voltage
V
V
V
75
250
1.5
DO
140
1.1
800
0.1
DO
DO
CL
V
BIAS
Dropout Voltage
= 500 mA, V = V (Notes 6, 7)
BIAS
V
IN
OUT(NOM)
Output Current Limit
V
= 90% V
I
550
1000
0.5
mA
mA
OUT
ADJ Pin Operating Current
(ADJ devices only)
I
ADJ
Bias Pin Operating Current
Bias Pin Disable Current
Vinput Pin Disable Current
EN Pin Threshold Voltage
V
V
V
= 2.7 V
I
80
0.5
0.5
110
1
mA
mA
mA
V
BIAS
BIAS
I
BIAS(DIS)
≤ 0.4 V
≤ 0.4 V
EN
EN
I
1
VIN(DIS)
EN Input Voltage “H”
EN Input Voltage “L”
V
EN(H)
0.9
V
0.4
1
EN(L)
EN Pull Down Current
Turn−On Time
V
EN
= 5.5 V
I
0.3
mA
ms
EN
ON
From assertion of V to V
=
t
150
EN
OUT
98% V
. V
= 1.0 V
OUT(NOM) OUT(NOM)
Power Supply Rejection
Ratio
V
to V
, f = 1 kHz, I
+0.5 V
= 150 mA,
PSRR(V )
IN
70
80
dB
dB
IN
VIN ≥ V
OUT
OUT
OUT
V
to V
OUT
, f = 1 kHz, I
= 150 mA,
PSRR(V
)
BIAS
VIN ≥ V
OUT
OUT
BIAS
+0.5 V
Output Noise Voltage
(Fixed Volt.)
V
= V
+0.5 V, V
= 1 V,
V
40
mV
IN
OUT
OUT(NOM)
N
N
RMS
f = 10 Hz to 100 kHz
Output Noise Voltage
(Adj devices)
V
IN
= V +0.5 V, f = 10 Hz to 100 kHz
V
50 x
mV
RMS
OUT
V
OUT
Thermal Shutdown
Threshold
Temperature increasing
Temperature decreasing
160
140
150
°C
Output Discharge
Pull−Down
V
EN
≤ 0.4 V, V
= 0.5 V, NCP133A options
R
DISCH
W
OUT
only
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Adjustable devices tested at 0.8 V; external resistor tolerance is not taken into account.
5. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at T = 25°C.
A
Low duty cycle pulse techniques are used during the testing to maintain the junction temperature as close to ambient as possible.
6. Dropout voltage is characterized when V
falls 3% below V
.
OUT
OUT(NOM)
7. For output voltages below 0.9 V, V
dropout voltage does not apply due to a minimum Bias operating voltage of 2.4 V.
BIAS
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4
NCP133
TYPICAL CHARACTERISTICS
At T = +25°C, V = V
+ 0.3 V, V
= 2.7 V, V = V
, V
= 1.0 V, I
= 500 mA,
J
C
IN
OUT(TYP)
BIAS
EN
BIAS
OUT(NOM)
OUT
= 1 mF, C
= 0.1 mF, and C = 2.2 mF (effective capacitance), unless otherwise noted.
OUT
IN
BIAS
200
180
160
140
120
100
80
200
180
I
= 100 mA
OUT
160
+125°C
+85°C
140
120
100
80
−40°C
+125°C
60
+85°C
60
+25°C
−40°C
40
+25°C
40
20
0
20
0
0
100
200
300
400
500
0.5 1.0
1.5
2.0
2.5
− V
3.0
3.5
4.0 4.5
I
, OUTPUT CURRENT (mA)
V
BIAS
(V)
OUT
OUT
Figure 4. VIN Dropout Voltage vs. IOUT and
Temperature TJ
Figure 5. VIN Dropout Voltage vs. (VBIAS
−
V
OUT) and Temperature TJ
300
250
200
150
100
500
450
I
= 300 mA
OUT
I
= 500 mA
OUT
400
350
300
250
200
150
100
+125°C
+125°C
+85°C
+85°C
+25°C
+25°C
−40°C
−40°C
50
0
50
0
0.5 1.0
1.5
2.0
2.5
− V
3.0
3.5
4.0
4.5
0.5 1.0
1.5
2.0
2.5
3.0
(V)
3.5
4.0 4.5
V
BIAS
(V)
V
− V
OUT
BIAS OUT
Figure 6. VIN Dropout Voltage vs. (VBIAS
−
Figure 7. VIN Dropout Voltage vs. (VBIAS −
V
OUT) and Temperature TJ
V
OUT) and Temperature TJ
140
1500
1400
1300
1200
1100
120
100
80
+125°C
+85°C
+125°C
−40°C
60
+25°C
+25°C
−40°C
40
+85°C
1000
900
20
0
0
50 100 150 200 250 300 350 400 450 500
, OUTPUT CURRENT (mA)
0
50
100
150
200
250
300
I
I
, OUTPUT CURRENT (mA)
OUT
OUT
Figure 9. BIAS Pin Current vs. IOUT and
Temperature TJ
Figure 8. VBIAS Dropout Voltage vs. IOUT and
Temperature TJ
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NCP133
TYPICAL CHARACTERISTICS
At T = +25°C, V = V
+ 0.3 V, V
= 2.7 V, V = V
, V
= 1.0 V, I
= 500 mA,
J
C
IN
OUT(TYP)
BIAS
EN
BIAS
OUT(NOM)
OUT
= 1 mF, C
= 0.1 mF, and C = 2.2 mF (effective capacitance), unless otherwise noted.
OUT
IN
BIAS
1000
900
800
700
600
500
400
300
200
200
180
+125°C
160
140
120
100
80
+85°C
+25°C
+125°C
−40°C
+85°C
60
+25°C
40
−40°C
100
0
20
0
2.0
2.5
3.0
3.5
4.0
(V)
4.5
5.0
5.5
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
− V (V)
V
BIAS
V
BIAS
OUT
Figure 10. BIAS Pin Current vs. VBIAS and
Temperature TJ
Figure 11. Current Limit vs. (VBIAS − VOUT)
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NCP133
APPLICATIONS INFORMATION
VBAT
NCP133
EN
Switch−mode DC/DC
= 1.5 V
1.0 V
V
OUT
BIAS
OUT
1.5 V
LX
FB
IN
IN
LOAD
GND
EN
Processor
GND
I/O
I/O
To other circuits
Figure 12. Typical Application: Low−Voltage DC/DC Post−Regulator with ON/OFF Functionality
Dropout Voltage
Because of two power supply inputs V and V
The NCP133 dual−rail very low dropout voltage regulator
is using NMOS pass transistor for output voltage regulation
and
IN
BIAS
one V
regulator output, there are two Dropout voltages
from V voltage. All the low current internal control
OUT
IN
specified.
The first, the V Dropout voltage is the voltage
circuitry is powered from the V
voltage.
BIAS
The use of an NMOS pass transistor offers several
advantages in applications. Unlike PMOS topology devices,
the output capacitor has reduced impact on loop stability.
Vin to Vout operating voltage difference can be very low
compared with standard PMOS regulators in very low Vin
applications.
IN
difference (V – V
) when V
starts to decrease by
IN
OUT
OUT
percent specified in the Electrical Characteristics table.
is high enough; specific value is published in the
V
BIAS
Electrical Characteristics table.
The second, V
dropout voltage is the voltage
BIAS
difference (V
joined together and V
– V
) when V and V
starts to decrease.
pins are
The NCP133 offers smooth monotonic start-up. The
controlled voltage rising limits the inrush current.
The Enable (EN) input is equipped with internal
hysteresis. NCP133 Voltage linear regulator Fixed and
Adjustable version is available.
BIAS
OUT
IN
BIAS
OUT
Input and Output Capacitors
The device is designed to be stable for ceramic output
capacitors with Effective capacitance in the range from
2.2 mF to 10 mF. The device is also stable with multiple
capacitors in parallel, having the total effective capacitance
in the specified range.
Output Voltage Adjust
The required output voltage of Adjustable devices can be
adjusted from 0.8 V to 3.6 V using two external resistors.
Typical application schematics is shown in Figure 13.
In applications where no low input supplies impedance
available (PCB inductance in V and/or V
inputs as
IN
BIAS
VBIAS
example), the recommended C = 1 mF and C
= 0.1 mF
IN
BIAS
C
NCP133 ADJ
or greater. Ceramic capacitors are recommended. For the
best performance all the capacitors should be connected to
the NCP133 respective pins directly in the device PCB
copper layer, not through vias having not negligible
impedance.
BIAS
OUT
ADJ
BIAS
VOUT
R1
R2
VIN
IN
μF
2.2
EN
C
IN
GND
When using small ceramic capacitor, their capacitance is
not constant but varies with applied DC biasing voltage,
temperature and tolerance. The effective capacitance can be
much lower than their nominal capacitance value, most
importantly in negative temperatures and higher LDO
output voltages. That is why the recommended Output
capacitor capacitance value is specified as Effective value in
the specific application conditions.
VEN
ǒ
Ǔ
VOUT + 0.8 1 ) R1ńR2
Figure 13. Typical Application Schematics
It is recommended to keep the total serial resistance of
resistors (R1 + R2) no greater than 100 kW.
Recommended resistor values for programming the
frequently used voltages can be found in the Table 1.
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7
NCP133
Enable Operation
Thermal Protection
The enable pin will turn the regulator on or off. The
threshold limits are covered in the electrical characteristics
table in this data sheet. If the enable function is not to be used
Internal thermal shutdown (TSD) circuitry is provided to
protect the integrated circuit in the event that the maximum
junction temperature is exceeded. When TSD activated , the
regulator output turns off. When cooling down under the low
temperature threshold, device output is activated again. This
TSD feature is provided to prevent failures from accidental
overheating.
Activation of the thermal protection circuit indicates
excessive power dissipation or inadequate heatsinking. For
reliable operation, junction temperature should be limited to
+125°C maximum.
then the pin should be connected to V or V
.
IN
BIAS
Current Limitation
The internal Current Limitation circuitry allows the
device to supply the full nominal current and surges but
protects the device against Current Overload or Short.
Table 1. RESISTOR VALUES FOR PROGRAMMING THE OUTPUT VOLTAGE
V
OUT
(V)
R (kW)
1
R (kW)
2
0.8
Short
10.0
19.6
24.3
24.9
33.2
43.2
41.2
42.2
61.9
Open
80.6
78.7
78.7
66.5
66.5
49.9
33.2
20.0
20.0
0.9
1.0
1.05
1.1
1.2
1.5
1.8
2.5
3.3
NOTE:
V = 0.8 x (1 + R /R )
OUT 1 2
Resistors in the table are standard 1% types
ORDERING INFORMATION
Nominal
Marking
Rotation
Output
Voltage
Device
Marking
Option
Package
Shipping†
NCP133AMX090TCG
NCP133AMX100TCG
NCP133AMX105TCG
NCP133AMX110TCG
NCP133AMX115TCG
NCP133AMX120TCG
NCP133AMX125TCG
NCP133AMX130TCG
NCP133AMX150TCG
NCP133AMX180TCG
NCP133AMXADJTCG
NCP133BMXADJTCG
0.90 V
1.00 V
1.05 V
1.10 V
1.15 V
1.20 V
1.25 V
1.30 V
1.50 V
1.80 V
ADJ
D
3
90°
0°
4
0°
5
0°
T
6
90°
0°
Output Active
Discharge
XDFN6
(Pb−Free)
3000 / Tape & Reel
E
F
J
90°
90°
90°
90°
90°
90°
Q
K
P
ADJ
Non−Active Discharge
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Spe-
cifications Brochure, BRD8011/D.
To order other package and voltage variants, please contact your ON Semiconductor sales representative
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8
NCP133
PACKAGE DIMENSIONS
XDFN6 1.20x1.20, 0.40P
CASE 711AT
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.25mm FROM TERMINAL TIPS.
4. COPLANARITY APPLIES TO THE PAD AS
WELL AS THE TERMINALS.
D
A
B
L
DETAIL A
OPTIONAL
PIN ONE
REFERENCE
E
CONSTRUCTION
MILLIMETERS
DIM
A
MIN
0.30
0.00
0.13
MAX
0.45
0.05
0.23
2X
0.05
C
A1
b
EXPOSED Cu
MOLD CMPD
2X
0.05
C
1.20 BSC
D
TOP VIEW
0.84
1.20 BSC
1.04
D2
E
A
0.20
0.40 BSC
0.40
E2
e
DETAIL B
0.05
0.05
C
C
DETAIL B
L
0.15
0.05 REF
0.25
OPTIONAL
A1
L1
CONSTRUCTION
SEATING
PLANE
NOTE 4
C
SIDE VIEW
D2
RECOMMENDED
MOUNTING FOOTPRINT*
DETAIL A
6X
0.35
1.08
6X
L1
E2
PACKAGE
OUTLINE
1
3
6X
L
1.40
0.40
1
6
4
0.40
PITCH
6X b
6X
0.24
e
M
0.10
C A B
DIMENSIONS: MILLIMETERS
BOTTOM VIEW
NOTE 3
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
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NCP133/D
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