NCP135 [ONSEMI]
500 mA, Very Low Dropout Bias Rail CMOS Voltage Regulator;
| 型号： | NCP135 |
| 厂家： | 
ONSEMI |
| 描述： | 500 mA, Very Low Dropout Bias Rail CMOS Voltage Regulator |
| 文件： | 总9页 (文件大小：769K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NCP135
500 mA, Very Low Dropout
Bias Rail CMOS Voltage
Regulator
The NCP135 is a 500 mA VLDO equipped with NMOS pass
transistor and a separate bias supply voltage (V ). The device
BIAS
www.onsemi.com
provides very stable, accurate output voltage with low noise suitable
for space constrained, noise sensitive applications. In order to
optimize performance for battery operated portable applications, the
T
MARKING
NCP135 features low I consumption. The NCP135 is offered in
DIAGRAM
Q
WDFN6 2 mm x 2 mm package.
1
XX M
WDFN6
CASE 511BR
Features
• Input Voltage Range: 0.4 V to 5.5 V
• Bias Voltage Range: 2.5 V to 5.5 V
• Fixed Output Voltage of 0.4 V
XX = Specific Device Code
M
= Date Code
•
1% Accuracy over Temperature, 0.5% V
@ 25°C
OUT
• Ultra−Low Dropout: Typ. 53 mV at 500 mA
• Very Low Bias Input Current of Typ. 35 mA
• Logic Level Enable Input for ON/OFF Control
• Output Active Discharge Option Available
• Stable with a 10 mF Ceramic Capacitor
• Available in WDFN6 2 mm x 2 mm, 0.65 mm pitch Package
• This is a Pb−Free Device
PIN CONNECTIONS
IN
OUT
1
6
Thermal
Pad
GND
BIAS
SNS
EN
2
5
4
3
Typical Applications
• Battery−powered Equipment
• Smartphones, Tablets
(Top View)
• Cameras, DVRs, STB and Camcorders
ORDERING INFORMATION
See detailed ordering, marking and shipping information on
page 8 of this data sheet.
V
IN
NCP135
GND
4.7 mF
IN
V
OUT
SNS
OUT
0.4 V up to 500 mA
BIAS
EN
V
BIAS
10 mF
0.1 mF
V
EN
Figure 1. Typical Application Schematic
© Semiconductor Components Industries, LLC, 2017
1
Publication Order Number:
December, 2017 − Rev. 0
NCP135/D
NCP135
CURRENT
LIMIT
OUT
IN
ENABLE
BLOCK
150 W
EN
*Active
DISCHARGE
BIAS
UVLO
VOLTAGE
REFERENCE
+
THERMAL
LIMIT
−
SNS
GND
*Active output discharge function is present only in NCP135A option devices.
Figure 2. Simplified Schematic Block Diagram
www.onsemi.com
2
NCP135
PIN FUNCTION DESCRIPTION
Pin No.
Pin Name
VIN
Description
1
2
3
Input Voltage Supply pin
Ground pin
GND
VBIAS
Bias voltage supply for internal control circuits. This pin is monitored by internal Under-Voltage
Lockout Circuit.
4
EN
Enable pin. Driving this pin high enables the regulator. Driving this pin low puts the regulator into
shutdown mode.
5
6
SNS
VOUT
Pad
Output voltage Sensing Input. Connect to Output voltage node on the PCB.
Regulated Output Voltage pin
Pad
Should be soldered to the ground plane for increased thermal performance.
ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
Unit
V
Input Voltage (Note 1)
V
IN
−0.3 to 6
Output Voltage
V
OUT
−0.3 to (V +0.3) ≤ 6
V
IN
Chip Enable, Bias and SNS Input
Output Short Circuit Duration
Maximum Junction Temperature
Storage Temperature
V
V
V
−0.3 to 6
unlimited
125
V
EN, BIAS, SNS
t
s
SC
T
J
°C
°C
V
T
−55 to 150
2000
STG
ESD Capability, Human Body Model (Note 2)
ESD Capability, Machine Model (Note 2)
ESD
HBM
ESD
200
V
MM
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection (except OUT pin) and is tested by the following methods:
ESD Human Body Model tested per EIA/JESD22−A114
ESD Machine Model tested per EIA/JESD22−A115
Latchup Current Maximum Rating tested per JEDEC standard: JESD78.
THERMAL CHARACTERISTICS
Rating
Symbol
Value
Unit
Thermal Characteristics, WDFN6 2 mm x 2 mm
RqJA
97
°C/W
Thermal Resistance, Junction−to−Air (Note 3)
3. This data was derived by thermal simulations based on the JEDEC JESD51 series standards methodology. Only a single device mounted
at the center of a high K (2s2p) 3 in x 3 in multilayer board with 1−ounce internal planes and 1−ounce copper on top and bottom. Top copper
layer has a dedicated 25 sq mm copper area.
www.onsemi.com
3
NCP135
ELECTRICAL CHARACTERISTICS −40°C ≤ T ≤ 125°C; V
= 2.7 V or (V
+ 1.6 V), whichever is greater, V = V
OUT(NOM)
+
J
BIAS
OUT
IN
0.3 V, I
= 1 mA, V = 1 V, C = 4.7 mF, C
= 10 mF, C
= 1 mF, unless otherwise noted. Typical values are at T = +25°C.
OUT
EN
IN
OUT
BIAS J
Min/Max values are for −40°C ≤ T ≤ 125°C unless otherwise noted. (Note 4)
J
Parameter
Test Conditions
Symbol
Min
Typ
Max
Unit
Operating Input Voltage
Range
V
IN
V
+
5.5
V
OUT
DO
V
Operating Bias Voltage
Range
V
(V
+
5.5
V
V
BIAS
OUT
1.50) ≥ 2.5
Undervoltage Lock−out
V
Rising
UVLO
1.6
0.2
BIAS
Hysteresis
Nominal Output Voltage
Output Voltage Accuracy
T = +25°C
V
0.400
0.5
V
%
%
J
OUT(NOM)
V
OUT
V
OUT
Output Voltage Accuracy −40°C ≤ T ≤ 125°C, V
+ 0.3 V ≤ V
IN
−1.0
+1.0
J
OUT(NOM)
≤ V
+ 1.0 V, 2.7 V or (V
+
OUT(NOM)
1.6 V), whichever is greater < V
OUT(NOM)
< 5.5 V,
BIAS
1 mA < I
< 500 mA
OUT
V
V
Line Regulation
V
+ 0.3 V ≤ V ≤ 5.0 V
Line
Line
0.01
0.01
%/V
%/V
IN
OUT(NOM)
IN
Reg
Line Regulation
2.7 V or (V
greater < V
+ 1.6 V), whichever is
OUT(NOM)
BIAS
Reg
< 5.5 V
BIAS
Load Regulation
Dropout Voltage
I
I
= 1 mA to 500 mA
= 500 mA (Note 5)
Load
0.5
53
mV
mV
mA
mA
OUT
Reg
V
IN
V
DO
100
1200
0.5
OUT
Output Current Limit
V
= 90% V
I
CL
600
820
0.01
OUT
OUT(NOM)
SNS Pin Operating
Current
I
SNS
Bias Pin Quiescent
Current
V
BIAS
= 2.7 V, I
= 0 mA
I
35
55
mA
OUT
BIASQ
Bias Pin Disable Current
V
V
≤ 0.4 V
≤ 0.4 V
I
0.2
1
1
mA
mA
EN
BIAS(DIS)
Vinput Pin Disable
Current
I
0.01
EN
VIN(DIS)
EN Pin Threshold Voltage EN Input Voltage “H”
EN Input Voltage “L”
V
0.9
V
EN(H)
V
0.4
1
EN(L)
EN Pull Down Current
V
EN
= 5.5 V
I
0.3
mA
ms
EN
Turn−On Time
From assertion of V to V
=
t
150
EN
OUT
ON
98% V
OUT(NOM)
Power Supply Rejection
Ratio
V
V
to V
, f = 1 kHz, I
= 10 mA,
PSRR(V )
IN
73
90
dB
dB
IN
IN
OUT
OUT
OUT
≥ V
+0.5 V
V
V
to V
, f = 1 kHz, I
= 10 mA,
PSRR(V
)
BIAS
IN
OUT
OUT
BIAS
≥ V
+0.5 V
OUT
Output Noise Voltage
V
= V
+0.5 V, f = 10 Hz to 100 kHz
V
28.7
160
140
150
mV
RMS
IN
OUT
N
Thermal Shutdown
Threshold
Temperature increasing
Temperature decreasing
°C
Output Discharge
Pull−Down
V
≤ 0.4 V, V
= 0.4 V, NCP135A options
R
DISCH
W
EN
OUT
only
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at T = 25°C.
A
Low duty cycle pulse techniques are used during the testing to maintain the junction temperature as close to ambient as possible.
5. Dropout voltage is characterized when V
falls 3% below V
.
OUT
OUT(NOM)
www.onsemi.com
4
NCP135
TYPICAL CHARACTERISTICS
At T = +25°C, V = V
+ 0.3 V, V
= 2.7 V, V = 1.0 V, V
= 0.4 V, I
= 500 mA,
J
IN
OUT(NOM)
BIAS
EN
OUT(NOM)
OUT
C
= 1 mF, C
= 0.1 mF, and C = 10 mF (effective capacitance value), unless otherwise noted.
OUT
IN
BIAS
25
100
90
80
70
60
50
40
30
20
I
= 100 mA
OUT
20
+125°C
+125°C
+85°C
+85°C
15
10
+25°C
−40°C
+25°C
−40°C
5
0
10
0
0
100
200
300
400
500
1.5
2.0
2.5
3.0
3.5
4.0 4.5
(V)
5.0 5.5
I , OUTPUT CURRENT (mA)
OUT
V
− V
BIAS OUT
Figure 3. VIN Dropout Voltage vs. IOUT and
Temperature TJ
Figure 4. VIN Dropout Voltage vs. (VBIAS
OUT) and Temperature TJ
−
V
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
I
= 300 mA
I
= 500 mA
OUT
OUT
+125°C
+85°C
+125°C
+85°C
+25°C
+25°C
−40°C
−40°C
1.5
2.0
2.5
3.0
3.5
4.0
(V)
4.5
5.0
5.5
1.5
2.0
2.5
3.0
3.5
4.0 4.5
5.0 5.5
V
BIAS
− V
V
− V
(V)
OUT
BIAS
OUT
Figure 5. VIN Dropout Voltage vs. (VBIAS
OUT) and Temperature TJ
−
Figure 6. VIN Dropout Voltage vs. (VBIAS
OUT) and Temperature TJ
−
V
V
V
OUT
V
OUT
t
R
= t = 1 ms
F
t = t = 1 ms
R F
I
I
OUT
OUT
50 ms/div
50 ms/div
Figure 7. Load Transient Response,
Figure 8. Load Transient Response,
IOUT = 50 mA to 500 mA, COUT = 10 mF
IOUT = 50 mA to 500 mA, COUT = 22 mF
www.onsemi.com
5
NCP135
TYPICAL CHARACTERISTICS
At T = +25°C, V = V
+ 0.3 V, V
= 2.7 V, V = 1.0 V, V
= 0.4 V, I
= 500 mA,
J
IN
OUT(NOM)
BIAS
EN
OUT(NOM)
OUT
C
= 1 mF, C
= 0.1 mF, and C
= 10 mF (effective capacitance value), unless otherwise noted.
IN
BIAS
OUT
V
OUT
V
OUT
t
R
= t = 1 ms
F
t = t = 1 ms
R F
I
I
OUT
OUT
500 ms/div
500 ms/div
Figure 9. Load Transient Response,
OUT = 1 mA to 500 mA, COUT = 10 mF
Figure 10. Load Transient Response,
OUT = 1 mA to 500 mA, COUT = 22 mF
I
I
V
OUT
V
OUT
t
R
= t = 1 ms
F
t = t = 1 ms
R F
I
I
OUT
OUT
500 ms/div
500 ms/div
Figure 11. Load Transient Response,
OUT = 1 mA to 20 mA, COUT = 10 mF
Figure 12. Load Transient Response,
OUT = 1 mA to 20 mA, COUT = 22 mF
I
I
V
V
ENABLE
ENABLE
V
OUT
V
OUT
I
OUT
100 ms/div
100 ms/div
Figure 13. Enable Transient Response,
OUT = 0 mA, COUT = 10 mF
Figure 14. Enable Transient Response, Output
I
Resistive Load 500 mA, COUT = 22 mF
www.onsemi.com
6
NCP135
TYPICAL CHARACTERISTICS
At T = +25°C, V = V
+ 0.3 V, V
= 2.7 V, V = 1.0 V, V
= 0.4 V, I
= 500 mA,
J
IN
OUT(NOM)
BIAS
EN
OUT(NOM)
OUT
C
= 1 mF, C
= 0.1 mF, and C
= 10 mF (effective capacitance value), unless otherwise noted.
IN
BIAS
OUT
V
OUT
V
OUT
t
R
= t = 5 ms
F
t
R
= t = 5 ms
F
V
IN
V
IN
50 ms/div
50 ms/div
Figure 15. VIN Line Transient Response,
IN = 0.7 V to 1.7 V, IOUT = 100 mA, CIN = 0,
OUT = 10 mF
Figure 16. VIN Line Transient Response,
IN = 0.7 V to 1.7 V, IOUT = 100 mA, CIN = 0,
OUT = 22 mF
V
V
C
C
−120
−110
−100
−90
−80
−70
−60
−50
−40
−30
−20
−10
0
−120
−110
−100
−90
−80
−70
−60
−50
−40
−30
−20
−10
0
10 mA, C
= 22 mF
V
= 0.9 V, V
= 2.7 V, C
= MLCC 1206
OUT
IN
BIAS
OUT
10 mA, C
= 10 mF
OUT
10 mA, C
= 10 mF
OUT
10 mA, C
= 22 mF
OUT
100 mA, C
= 10 mF
OUT
100 mA, C
100
= 10 mF
OUT
100 mA, C
= 22 mF
OUT
100 mA, C
= 22 mF
OUT
V
= 0.9 V, V
100
= 2.7 V, C
= MLCC 1206
IN
BIAS
OUT
10
10
10
10
1k
10k
100k
1M
10M
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 17. VIN Power Supply Rejection Ratio
vs. Frequency
Figure 18. VBIAS Power Supply Rejection Ratio
vs. Frequency
10000
1000
100
10
500 mA 22 mF
100 mA 22 mF
10 mA 22 mF
1 mA 22 mF
RMS Output Noise Voltage (mV)
I
OUT
C
10 Hz − 100 kHz 100 Hz − 100 kHz
OUT
1 mA 10 mF
27.54
27.28
35.49
44.87
54.04
28.67
28.19
36.23
45.44
54.54
1 mA
1 mA
10 mF
22 mF
22 mF
22 mF
22 mF
10 mA
100 mA
500 mA
V
IN
= 0.9 V, V
100
= 2.7 V, C
= MLCC 1206
OUT
BIAS
1
10
1k
10k
100k
1M
10M
FREQUENCY (Hz)
Figure 19. Output Voltage Noise Spectral
Density
www.onsemi.com
7
NCP135
APPLICATIONS INFORMATION
The NCP135 dual−rail very low dropout voltage regulator
is using NMOS pass transistor for output voltage regulation
from V voltage. All the low current internal control
copper layer, not through vias having not negligible
impedance.
When using small ceramic capacitor, their capacitance is
not constant but varies with applied DC biasing voltage,
temperature and tolerance. The effective capacitance can be
much lower than their nominal capacitance value, most
importantly in negative temperatures and higher LDO
output voltages. That is why the recommended Output
capacitor capacitance value is specified as Effective value in
the specific application conditions.
IN
circuitry is powered from the V
voltage.
BIAS
The use of an NMOS pass transistor offers several
advantages in applications. Unlike PMOS topology devices,
the output capacitor has reduced impact on loop stability.
V
IN
to V
operating voltage difference can be very low
OUT
compared with standard PMOS regulators in very low Vin
applications.
When enabled from Enable (EN) input, the NCP135
offers smooth monotonic start-up. The controlled voltage
rising limits the inrush current.
The Enable (EN) input is equipped with internal
hysteresis.
Enable Operation
The enable pin will turn the regulator on or off. The
threshold limits are covered in the electrical characteristics
table in this data sheet. If the enable function is not to be used
then the pin should be connected to V or V
.
IN
BIAS
Dropout Voltage
Current Limitation
The V Dropout voltage is the voltage difference (V
–
IN
IN
The internal Current Limitation circuitry allows the
device to supply the full nominal current and surges but
protects the device against Current Overload or Short.
V
) when V
starts to decrease by percent specified in
OUT
OUT
the Electrical Characteristics table with the V voltage
decreasing. V
IN
is high enough; specific value is
BIAS
published in the Electrical Characteristics table.
Thermal Protection
Internal thermal shutdown (TSD) circuitry is provided to
protect the integrated circuit in the event that the maximum
junction temperature is exceeded. When TSD activated, the
regulator output turns off. When cooling down under the low
temperature threshold, device output is activated again. This
TSD feature is provided to prevent failures from accidental
overheating.
Activation of the thermal protection circuit indicates
excessive power dissipation or inadequate heatsinking. For
reliable operation, junction temperature should be limited to
+125°C maximum.
Input and Output Capacitors
The device is designed to be stable for ceramic output
capacitors with Effective capacitance in the range from
10 mF to 22 mF. The device is also stable with multiple
capacitors in parallel, having the total effective capacitance
in the specified range.
In applications where no low input supplies impedance
available (PCB inductance in V and/or V
inputs as
IN
BIAS
example), the recommended C = 1 mF and C
= 0.1 mF
IN
BIAS
or greater. Ceramic capacitors are recommended. For the
best performance all the capacitors should be connected to
the NCP135 respective pins directly in the device PCB
ORDERING INFORMATION
Device
NCP135AMT040TBG
NCP135BMT040TBG
Marking
KA
Option
Package
Shipping†
Output Active Discharge
Non−Active Discharge
WDFN6
(Pb−Free)
3000 / Tape & Reel
KC
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Spe-
cifications Brochure, BRD8011/D.
To order other package and voltage variants, please contact your ON Semiconductor sales representative
www.onsemi.com
8
NCP135
PACKAGE DIMENSIONS
WDFN6 2x2, 0.65P
CASE 511BR
ISSUE B
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL AND
IS MEASURED BETWEEN 0.15 AND 0.25 mm FROM
THE TERMINAL TIP.
A3
EXPOSED Cu
MOLD CMPD
D
A
B
A1
ALTERNATE B−1
ALTERNATE B−2
4. COPLANARITY APPLIES TO THE EXPOSED PAD AS
WELL AS THE TERMINALS.
5. FOR DEVICES CONTAINING WETTABLE FLANK
OPTION, DETAIL A ALTERNATE CONSTRUCTION
A-2 AND DETAIL B ALTERNATE CONSTRUCTION
B-2 ARE NOT APPLICABLE.
DETAIL B
PIN ONE
ALTERNATE
REFERENCE
E
CONSTRUCTIONS
0.10
C
L
L
MILLIMETERS
DIM
A
MIN
0.70
0.00
MAX
0.80
0.05
0.10
C
L1
TOP VIEW
A1
A3
b
ALTERNATE A−1
ALTERNATE A−2
0.20 REF
0.25
1.50
0.35
DETAIL A
A3
DETAIL B
D
2.00 BSC
0.05
C
C
ALTERNATE
D2
E
1.70
CONSTRUCTIONS
2.00 BSC
A
E2
e
0.90
1.10
0.65 BSC
L
0.20
---
0.40
0.15
0.05
6X
A1
L1
SEATING
PLANE
NOTE 4
C
SIDE VIEW
D2
RECOMMENDED
MOUNTING FOOTPRINT
DETAIL A
L
1
3
6X
0.45
1.72
E2
6
4
1.12
2.30
6X b
M
M
0.10
0.05
C
C
A
B
e
NOTE 3
BOTTOM VIEW
PACKAGE
OUTLINE
1
0.65
PITCH
6X
0.40
DIMENSIONS: MILLIMETERS
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
Literature Distribution Center for ON Semiconductor
19521 E. 32nd Pkwy, Aurora, Colorado 80011 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
For additional information, please contact your local
Sales Representative
◊
NCP135/D
相关型号：
NCP1351APG
Controller, Variable Off-Time Current Mode, with Short Circuit Protection, 8 LEAD PDIP, 50-TUBE
ONSEMI
NCP1351CPG
Controller, Variable Off-Time Current Mode, with Short Circuit Protection, 8 LEAD PDIP, 50-TUBE
ONSEMI
©2020 ICPDF网 联系我们和版权申明