NCP136 [ONSEMI]
LDO Regulator - Very Low Dropout, CMOS, Bias Rail 700 mA;
| 型号： | NCP136 |
| 厂家： | 
ONSEMI |
| 描述： | LDO Regulator - Very Low Dropout, CMOS, Bias Rail 700 mA |
| 文件： | 总15页 (文件大小：429K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LDO Regulator - Very Low
Dropout, CMOS, Bias Rail
700 mA
NCP136
The NCP136 is a 700 mA VLDO equipped with NMOS pass
transistor and a separate bias supply voltage (V
). The device
BIAS
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provides very stable, accurate output voltage with low noise suitable
for space constrained, noise sensitive applications. In order to
optimize performance for battery operated portable applications, the
NCP136 features low I consumption. The WLCSP6 1.4 mm x
Q
0.8 mm Chip Scale package is optimized for use in space constrained
applications.
WLCSP6, 1.4x0.8x0.33
CASE 567XK
WLCSP6, 1.4x0.8x0.37
CASE 567YU
Features
• Input Voltage Range: V
to 5.5 V
OUT
• Bias Voltage Range: 2.5 V to 5.5 V
MARKING DIAGRAM
• Fixed or Adjustable Voltage Version Available
• Output Voltage Range: 0.4 V to 1.8 V (Fixed)
XXMG
•
1% Accuracy over Temperature, 0.5% V
@ 25°C
OUT
• Ultra−Low Dropout: Typ. 40 mV at 700 mA
• Very Low Bias Input Current of Typ. 80 mA
• Very Low Bias Input Current in Disable Mode: Typ. 0.5 mA
• Logic Level Enable Input for ON/OFF Control
• Output Active Discharge Option Available
• Stable with a 10 mF Ceramic Capacitor
XX = Specific Device Code
M
G
= Month Code
= Pb−Free Package
PIN CONNECTIONS
• Available in WLCSP6 − 1.4 mm x 0.8 mm, 0.4 mm pitch Package
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
1
2
A
B
C
OUT
IN
Typical Applications
• Battery−powered Equipment
• Smartphones, Tablets
• Cameras, DVRs, STB and Camcorders
SNS/ADJ
EN
VBIAS
GND
BIAS
C
BIAS
1 mF
VOUT
BIAS
OUT
SNS
V
IN
Top View
NCP136FIX
IN
COUT
10 mF
EN
C
4.7 mF
IN
GND
ORDERING INFORMATION
See detailed ordering, marking and shipping information on
page 12 of this data sheet.
ON
OFF
Figure 1. Typical Application Schematic − Fixed Voltage Version
© Semiconductor Components Industries, LLC, 2019
1
Publication Order Number:
July, 2020 − Rev. 4
NCP136/D
NCP136
VBIAS
CBIAS
1 mF
VOUT
BIAS
IN
OUT
V
IN
NCP136
0.4 V
R1
R2
CFF
ADJ
COUT
10 mF
EN
C
IN
GND
4.7 mF
ON
OFF
Figure 2. Typical Application Schematic − Adjustable Voltage Version
CURRENT
LIMIT
OUT
IN
ENABLE
BLOCK
150 W
EN
*Active
DISCHARGE
BIAS
UVLO
VOLTAGE
+
REFERENCE
THERMAL
LIMIT
−
SNS/ADJ
GND
*Active output discharge function is present only in NCP136A and NCP136C option devices.
Figure 3. Simplified Schematic Block Diagram
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2
NCP136
PIN FUNCTION DESCRIPTION
Pin No.
WLCSP6
Pin Name
Description
A1
OUT
Regulated Output Voltage pin
Input Voltage Supply pin
A2
IN
B1
SNS/ADJ
EN
Feedback / adjustable input pin (connect this pin directly to the OUT pin or to the resistor divider)
B2
Enable pin. Driving this pin high enables the regulator. Driving this pin low puts the regulator into
shutdown mode.
C1
C2
GND
BIAS
Ground pin
Bias voltage supply for internal control circuits. This pin is monitored by internal Under-Voltage
Lockout Circuit.
ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
Unit
V
Input Voltage (Note 1)
V
IN
−0.3 to 6
Output Voltage
V
OUT
−0.3 to (V +0.3) ≤ 6
V
IN
Chip Enable, Bias and SNS Input
Output Short Circuit Duration
Maximum Junction Temperature
Storage Temperature
V
V
V
−0.3 to 6
unlimited
150
V
EN, BIAS, SNS/ADJ
t
s
SC
T
J
°C
°C
V
T
−55 to 150
2000
STG
ESD Capability, Human Body Model (Note 2)
ESD Capability, Machine Model (Note 2)
ESD
HBM
ESD
200
V
MM
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection (except OUT pin) and is tested by the following methods:
ESD Human Body Model tested per EIA/JESD22−A114
ESD Machine Model tested per EIA/JESD22−A115
Latchup Current Maximum Rating tested per JEDEC standard: JESD78.
THERMAL CHARACTERISTICS
Rating
Symbol
Value
Unit
Thermal Characteristics, WLCSP6 1.4 mm x 0.8 mm
Thermal Resistance, Junction−to−Air (Note 3)
RqJA
69
°C/W
3. This junction−to−ambient thermal resistance under natural convection was derived by thermal simulations based on the JEDEC JESD51
series standards methodology. Only a single device mounted at the center of a high_K (2s2p) 80 mm x 80 mm multilayer board with 1−ounce
internal planes and 2−ounce copper on top and bottom. Top copper layer has a dedicated 1.6 sqmm copper area.
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3
NCP136
ELECTRICAL CHARACTERISTICS −40°C ≤ T ≤ 85°C; V
= 2.7 V or (V
+ 1.6 V), whichever is greater,
= 1 mF, unless otherwise noted.
J
BIAS
OUT
V
= V
+ 0.3 V, I
= 1 mA, V = 1 V, C = 4.7 mF, C
= 10 mF, C
IN
OUT(NOM)
OUT
EN
IN
OUT
BIAS
Typical values are at T = +25°C. Min/Max values are for −40°C ≤ T ≤ 85°C unless otherwise noted. (Note 4)
J
J
Parameter
Test Conditions
Symbol
Min
Typ Max Unit
Operating Input Voltage
Range
V
V
+
5.5
V
V
V
IN
OUT
V
DO
Operating Bias Voltage
Range
V
BIAS
(V
+
5.5
OUT
1.50) ≥ 2.5
Undervoltage Lock−out
V
Rising
UVLO
1.6
0.2
BIAS
Hysteresis
Output Voltage Accuracy
Output Voltage Accuracy
V
V
0.5
%
%
OUT
−40°C ≤ T ≤ 85°C, V
+ 0.1 V ≤ V ≤ V
OUT(NOM)
−1.0
+1.0
J
OUT(NOM)
IN
OUT
+ 1.0 V, 2.7 V or (V
+ 1.6 V), whichever is
OUT(NOM)
greater < V
< 5.5 V, 1 mA < I
< 700 mA
BIAS
OUT
V
V
Line Regulation
V
+ 0.1 V ≤ V ≤ 5.0 V
Line
Line
0.01
0.01
%/V
%/V
IN
OUT(NOM)
IN
Reg
Line Regulation
2.7 V or (V
+ 1.6 V), whichever is greater <
BIAS
OUT(NOM)
< 5.5 V
Reg
V
BIAS
Load Regulation
I
I
I
= 1 mA to 700 mA
= 700 mA (Note 5)
Load
1.5
40
mV
mV
V
OUT
OUT
OUT
Reg
V
V
Dropout Voltage
V
V
60
IN
DO
Dropout Voltage
= 700 mA, V = V
(Notes 5, 6)
1.1
1.5
BIAS
IN
BIAS
DO
CL
Output Current Limit
V
= 90% V
I
800
1450 2000
mA
mA
OUT
OUT(NOM)
SNS/ADJ Pin Operating
Current
I
0.1
0.5
SNS
Bias Pin Quiescent
Current
V
BIAS
= 2.7 V, I
= 0 mA
I
70
110
mA
OUT
BIASQ
Bias Pin Disable Current
Input Pin Disable Current
EN Pin Threshold Voltage
V
V
≤ 0.4 V
≤ 0.4 V
I
0.5
0.5
1
1
mA
mA
V
EN
BIAS(DIS)
I
EN
VIN(DIS)
EN Input Voltage “H”
EN Input Voltage “L”
V
EN(H)
0.9
V
EN(L)
0.4
1
EN Pull Down Current
V
V
= 5.5 V
I
0.3
75
mA
EN
EN
Power Supply Rejection
Ratio
to V
, f = 1 kHz, I
+0.5 V, V
= 10 mA,
= 1.2 V,
PSRR(V )
IN
dB
IN
OUT
OUT
OUT(NOM)
VIN ≥ V
OUT
V
BIAS
= 3.0 V
V
to V
OUT
= 3.0 V
, f = 1 kHz, I
= 10 mA,
= 1.2 V,
PSRR(V )
BIAS
80
40
dB
BIAS
OUT
OUT
VIN ≥ V
+0.5 V, V
OUT(NOM)
V
BIAS
Output Noise Voltage
V
V
= V
+0.5 V, f = 10 Hz to 100 kHz,
= 1.2 V
V
N
mV
RMS
IN
OUT
OUT(NOM)
Thermal Shutdown
Threshold
°C
Temperature increasing
Temperature decreasing
160
140
150
Output Discharge
Pull−Down
V
≤ 0.4 V, V
= 0.5 V,
R
DISCH
W
EN
OUT
NCP136A and NCP136C option
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at T = 25°C.
A
Low duty cycle pulse techniques are used during the testing to maintain the junction temperature as close to ambient as possible.
5. Dropout voltage is characterized when V
6. For fixed output voltages below 1.5 V, V
falls 3% below V
.
OUT
BIAS
OUT(NOM)
dropout does not apply due to a minimum Bias operating voltage of 2.5 V.
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NCP136
ELECTRICAL CHARACTERISTICS −40°C ≤ TJ ≤ 85°C; I
= 1 mA, V = 1 V, C = 4.7 μF, C
= 10 μF, C = 1 μF.
BIAS
OUT
EN
IN
OUT
Typical values are at T = +25°C. Min/Max values are for −40°C ≤ T ≤ 85°C unless otherwise noted. (Note 7)
J
J
Parameter
Test conditions
= 3 V, V = 0.6 V
Symbol
Min
Typ
Max
Unit
NCP136xFCRC040T2G V
BIAS
IN
Delay time
From assertion of V to
output voltage increase
‘A’ option
t
t
t
t
t
73
ms
EN
DELAY
Rise time
V
rise from 10% to 90% V
‘A’ option
‘A’ option
t
RISE
15
98
OUT
OUT(NOM)
Turn−On Time
From assertion of V to
t
ON
EN
= 98% V
OUT(NOM)
V
OUT
NCP136xFCT080T2G & NCP136xFCRC080T2G V
= 3 V, V = 1.0 V
IN
BIAS
Delay time
From assertion of V to
‘A’ and ‘B’ option
55
ms
ms
ms
ms
ms
EN
DELAY
output voltage increase
Rise time
V
OUT
rise from 10% to 90% V
‘A’ and ‘B’ option
‘A’ and ‘B’ option
t
RISE
17
80
OUT(NOM)
Turn−On Time
From assertion of V to
t
ON
EN
= 98% V
OUT(NOM)
V
OUT
NCP136xFCT088T2G V
= 3 V, V = 1.1 V
IN
BIAS
Delay time
From assertion of V to
‘A’ option
71
EN
DELAY
output voltage increase
Rise time
V
OUT
rise from 10% to 90% V
‘A’ option
‘A’ option
t
RISE
16
97
OUT(NOM)
Turn−On Time
From assertion of V to
t
ON
EN
= 98% V
OUT(NOM)
V
OUT
NCP136xFCT105T2G V
= 3 V, V = 1.25 V
IN
BIAS
Delay time
From assertion of V to
‘A’ option
71
EN
DELAY
output voltage increase
Rise time
V
OUT
rise from 10% to 90% V
‘A’ option
‘A’ option
t
RISE
18
OUT(NOM)
Turn−On Time
From assertion of V to
t
102
EN
= 98% V
OUT(NOM)
ON
V
OUT
NCP136xFCT110T2G V
= 3 V, V = 1.3 V
IN
BIAS
Delay time
From assertion of V to
‘A’ option
71
EN
DELAY
output voltage increase
Rise time
V
OUT
rise from 10% to 90% V
‘A’ option
‘A’ option
t
RISE
19
OUT(NOM)
Turn−On Time
From assertion of V to
t
105
EN
= 98% V
OUT(NOM)
ON
V
OUT
NCP136xFCT120T2G V
= 3 V, V = 1.4 V
IN
BIAS
Delay time
From assertion of V to
‘A’ option
‘C’ option
‘A’ option
‘C’ option
‘A’ option
‘C’ option
t
70
80
EN
ON
output voltage increase
Rise time
V
OUT
rise from 10% to 90% V
t
RISE
21
OUT(NOM)
80
Turn−On Time
From assertion of V to
t
108
210
EN
= 98% V
OUT(NOM)
ON
V
OUT
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
7. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at T = 25°C.
A
Low duty cycle pulse techniques are used during the testing to maintain the junction temperature as close to ambient as possible.
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NCP136
TYPICAL CHARACTERISTICS
At T = +25°C, V = V
+ 0.3 V, V
= 2.8 V, V = V
, V
OUT(NOM)
= 1.2 V, I
= 700 mA,
J
IN
OUT(NOM)
BIAS
EN
BIAS
OUT
C
= 4.7 mF, C
= 1 mF, and C = 10 mF (effective capacitance), unless otherwise noted.
OUT
IN
BIAS
70
60
50
40
30
20
10
0
500
450
400
350
300
250
200
150
100
50
T = 85°C
J
T = −40°C
J
T = 25°C
J
T = 25°C
J
T = −40°C
J
T = 85°C
J
0
0
100 200 300 400 500 600 700
OUTPUT CURRENT (mA)
0.5
1.5
2.5
− V
3.5
4.5
I
V
BIAS
(V)
OUT
OUT,
Figure 4. VIN Dropout Voltage vs. IOUT and TJ
Figure 5. VIN Dropout Voltage
vs. VBIAS − VOUT and TJ
1500
90
80
70
60
50
40
30
20
10
0
T = −40°C
J
1400
1300
1200
1100
1000
900
T = 25°C
J
T = 85°C
J
T = −40°C
J
T = 25°C
J
T = 85°C
J
800
0
100 200 300 400 500 600 700
0.1
1
10
100
1000
I
OUTPUT CURRENT (mA)
I
OUT,
OUTPUT CURRENT (mA)
OUT,
Figure 6. VBIAS Dropout Voltage vs. IOUT and TJ
Figure 7. BIAS Pin Current vs. IOUT and TJ
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
V
V
= 1.7 V + 100 mV
PP
IN
= 3 V
BIAS
C
= 10 mF
OUT
30
20
10
0
T = −40°C
J
I
= 10 mA
OUT
T = 25°C
J
I
= 700 mA
OUT
T = 85°C
J
2
2.5
3
3.5
4
4.5
5
10
100
1k
10k
100k
1M
10M
V
BIAS,
BIAS VOLTAGE (V)
f, FREQUENCY [Hz]
Figure 8. BIAS Pin Current vs. VBIAS and TJ
Figure 9. VIN PSRR vs. Frequency
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NCP136
TYPICAL CHARACTERISTICS (continued)
At T = +25°C, V = V
+ 0.3 V, V
= 2.8 V, V = V
, V
OUT(NOM)
= 1.2 V, I
= 700 mA,
J
IN
OUT(NOM)
BIAS
EN
BIAS
OUT
C
= 4.7 mF, C
= 1 mF, and C = 10 mF (effective capacitance), unless otherwise noted.
OUT
IN
BIAS
10
100
90
80
70
60
50
40
30
20
10
0
V
V
= 1.7 V
V
V
= 1.7 V
IN
BIAS
IN
BIAS
= 3 V + 100 mV
= 2.8 V
PP
C
= 10 mF
C
= 10 mF
OUT
OUT
1
0.1
I
= 10 mA
I
= 1 mA
0.01
OUT
OUT
I
= 700 mA
I
= 700 mA
OUT
OUT
0.001
10
100
1k
10k
100k
1M
10M
10
100
1k
10k
100k
1M
10M
FREQUENCY [Hz]
f, FREQUENCY [Hz]
Figure 10. VBIAS PSRR vs. Frequency
Figure 11. Output Voltage Spectral
Noise Density vs. Frequency
V
OUT
V
OUT
700 mA
700 mA
I
1 mA
OUT
I
1 mA
OUT
200 ms/div
500 ms/div
Figure 12. Load Transient Response,
OUT = 1 mA to 700 mA in 1 ms, COUT = 10 mF
Figure 13. Load Transient Response,
IOUT = 1 mA to 700 mA in 1 ms, COUT = 47 mF
I
V
OUT
V
OUT
350 mA
350 mA
I
I
OUT
1 mA
OUT
1 mA
100 ms/div
100 ms/div
Figure 14. Load Transient Response,
OUT = 1 mA to 350 mA in 1 ms, COUT = 4.7 mF
Figure 15. Load Transient Response,
OUT = 1 mA to 350 mA in 1 ms, COUT = 10 mF
I
I
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NCP136
TYPICAL CHARACTERISTICS (continued)
At T = +25°C, V = V
+ 0.3 V, V
= 2.8 V, V = V
, V
OUT(NOM)
= 1.2 V, I
= 700 mA,
J
IN
OUT(NOM)
BIAS
EN
BIAS
OUT
C
= 4.7 mF, C
= 1 mF, and C
= 10 mF (effective capacitance), unless otherwise noted.
IN
BIAS
OUT
V
EN
V
OUT
V
OUT
I
OUT
V
V
V
= 1.4 V
IN
350 mA
= 3 V
BIAS
= 1.2 V
OUT(NOM)
I
OUT
1 mA
20 ms/div
400 ms/div
Figure 16. Load Transient Response,
Figure 17. Enable Transient Response, COUT = 10 mF,
IOUT = 1 mA to 350 mA in 1 ms, COUT = 47 mF
IOUT = 700 mA − A Option (Normal)
V
EN
V
EN
V
OUT
I
OUT
V
V
V
= 1.4 V
IN
= 3 V
BIAS
= 1.2 V
OUT(NOM)
V
OUT
20 ms/div
50 ms/div
Figure 18. Enable Transient Response, COUT = 10 mF,
OUT = 0 mA − A Option (Normal)
Figure 19. Enable Transient Response,
OUT = 10 mF, IOUT = 700 mA − C Option (Slow)
I
C
3.8 V
V
EN
V
BIAS
2.8 V
V
OUT
V
OUT
50 ms/div
10 ms/div
Figure 20. Enable Transient Response,
Figure 21. BIAS Line Transient Response,
COUT = 10 mF, IOUT = 0 mA − C Option (Slow)
VBIAS = 2.8 V to 3.8 V in 5 ms
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NCP136
TYPICAL CHARACTERISTICS (continued)
At T = +25°C, V = V
+ 0.3 V, V
= 2.8 V, V = V
, V
OUT(NOM)
= 1.2 V, I
= 700 mA,
J
IN
OUT(NOM)
BIAS
EN
BIAS
OUT
C
= 4.7 mF, C
= 1 mF, and C
= 10 mF (effective capacitance), unless otherwise noted.
IN
BIAS
OUT
2.5 V
1.5 V
V
IN
V
OUT
10 ms/div
Figure 22. IN Line Transient Response,
V
IN = 1.5 V to 2.5 V in 5 ms
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NCP136
APPLICATIONS INFORMATION
VBAT
NCP136
EN
Switch−mode DC/DC
= 1.5 V
1.2 V
OUT
SNS
V
OUT
BIAS
1.5 V
LX
FB
LOAD
IN
IN
GND
EN
Processor
GND
I/O
I/O
To other circuits
Figure 23. Typical Application: Low−Voltage DC/DC Post−Regulator with ON/OFF Functionality
Input and Output Capacitors
The NCP136 dual−rail very low dropout voltage regulator
is using NMOS pass transistor for output voltage regulation
The NCP136 device is designed to be stable for ceramic
output capacitors with Effective capacitance in the range
from 4.7 mF to 47 mF. The device is also stable with multiple
capacitors in parallel, having the total effective capacitance
in the specified range.
from V voltage. All the low current internal control
IN
circuitry is powered from the V
voltage.
BIAS
The use of an NMOS pass transistor offers several
advantages in applications. Unlike PMOS topology devices,
the output capacitor has reduced impact on loop stability.
Vin to Vout operating voltage difference can be very low
compared with standard PMOS regulators in very low Vin
applications.
The NCP136 offers smooth monotonic start-up. The
controlled voltage rising limits the inrush current.
The Enable (EN) input is equipped with internal
hysteresis. NCP136 Voltage linear regulator Fixed version
is available.
In applications where no low input supplies impedance
available (PCB inductance in V and/or V
inputs as
IN
BIAS
example), the recommended C = 1 mF and C
= 0.1 mF
IN
BIAS
or greater. Ceramic capacitors are recommended. For the best
performance all the capacitors should be connected to the
NCP136 respective pins directly in the device PCB copper
layer, not through vias having not negligible impedance.
When using small ceramic capacitor, their capacitance is
not constant but varies with applied DC biasing voltage,
temperature and tolerance. The effective capacitance can be
much lower than their nominal capacitance value, most
importantly in negative temperatures and higher LDO
output voltages. That is why the recommended Output
capacitor capacitance value is specified as Effective value in
the specific application conditions.
Dropout Voltage
Because of two power supply inputs V and V
and
IN
BIAS
one V
regulator output, there are two Dropout voltages
OUT
specified.
The first, the V Dropout voltage is the voltage
IN
difference (V – V
) when V
starts to decrease by
IN
OUT
OUT
percent specified in the Electrical Characteristics table.
is high enough; specific value is published in the
V
BIAS
Electrical Characteristics table.
The second, V dropout voltage is the voltage
BIAS
difference (V
– V
) when V and V
pins are
BIAS
OUT
IN
BIAS
joined together and V
starts to decrease.
OUT
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NCP136
VBIAS
CBIAS
1 mF
VOUT
BIAS
IN
OUT
VIN
NCP136
0.4 V
R1
R2
CFF
ADJ
COUT
10 mF
EN
CIN
4.7 mF
GND
ON
OFF
Figure 24. Typical Application Schematic − Adjustable
Output Voltage Adjustment
c. R = R = 51 kW
1
2
The required output voltage can be adjusted from 0.4 V to
1.8 V using two external resistors. Typical application
schematics is shown in Figure 24. Output voltage is
calculated according to equation 1. Generally, any voltage
option can used as adjustable, in the equation below
V
= 0.4 ⋅ (1 + 51 kW/51 kW ) +
OUT−ADJ
100 nA ⋅ 51 kW = 0.8051 V
Error − 0.63%
It is recommended to keep the total resistance of resistors
(R1 + R2) no greater than a few hundred kW. If total
resistance is too big the dynamic performance could get
worse due to PCB parasitic capacitance. Big resistors value
in combination with parasitic capacitance create low−pass
filter and virtually slow−down LDO control loop.
V
V
is requested voltage and V
as reference voltage. When resistor’s value is in kW
is nominal
OUT−ADJ
OUT_NOM
OUT
range last term (I
⋅ R ) can be omitted because its effect
ADJ
1
on output voltage accuracy is negligible. In other cases it
should be consider especially when tight output voltage
accuracy is requested.
Output Voltage Example:
(Note 1)
(Note 1)
V
(V)
R (kW)
1
R (kW)
2
C
(nF)
FF
R1
R2
OUT
@ ǒ1 ) Ǔ
VOUT*ADJ + VOUT_NOM
) IADJ @ R1
(eq. 1)
0.80
1.05
1.10
5.1
5.1
5.6
3.9
8.2
2.4
4.7
5.6
5.6
Voltage Calculation Example − V
= 0.8 V:
OUT
a. R = R = 5.1 kW, no (I × R )
1
V
2
FB
1
1. To increase power efficiency, current flows through resistor
divider can be reduced by multiply all resistor values by 10.
= 0.4 ⋅ (1 + 5.1 kW/5.1 kW ) = 0.8 V
OUT−ADJ
Error − 0%
b. R = R = 5.1 kW
Feed Forward Capacitor CFF
1
2
Feedforward capacitor is recommended to improve
PSRR, load transient and noise performance.
Recommended value for NCP136 device is about 5.6 nF.
The capacitor can also improve LDO stability.
V
= 0.4 ⋅ (1 + 5.1 kW/5.1 kW ) +
OUT−ADJ
100 nA ⋅ 5.1 kW = 0.80051 V
Error − 0.06%
www.onsemi.com
11
NCP136
Enable Operation
current source with typ. value of 0.3 mA which assures that
The enable pin will turn the regulator on or off. The
threshold limits are covered in the electrical characteristics
table in this data sheet. To get the full functionality of Soft
the device is turned off when the EN pin is not connected.
Current Limitation
The internal Current Limitation circuitry allows the
device to supply the full nominal current and surges but
protects the device against Current Overload or Short.
Start, it is recommended to turn on the V and V
supply
IN
BIAS
voltages first and activate the Enable pin no sooner than V
IN
and V
are on their nominal levels. If the enable function
BIAS
is not to be used then the pin should be connected to V or
IN
Thermal Protection
V
BIAS
.
Internal thermal shutdown (TSD) circuitry is provided to
protect the integrated circuit in the event that the maximum
junction temperature is exceeded. When TSD activated , the
regulator output turns off. When cooling down under the low
temperature threshold, device output is activated again. This
TSD feature is provided to prevent failures from accidental
overheating.
Activation of the thermal protection circuit indicates
excessive power dissipation or inadequate heatsinking. For
reliable operation, junction temperature should be limited to
+105°C maximum.
If the EN pin voltage is < 0.4 V the device is guaranteed
to be disabled. The pass transistor is turned off so that there
is virtually no current flow between the IN and OUT. The
active discharge transistor is active (devices with Output
Active Discharge feature only) so that the output voltage
V
is pulled down to GND through a 150 W resistor. In
OUT
the disable state the device consumes as low as typ. 0.5 mA
from the V and 0.5 mA from V . If the EN pin voltage
IN
BIAS
> 0.9 V the device is guaranteed to be enabled. The NCP136
regulates the output voltage and the active discharge
transistor is turned off. The EN pin has internal pull−down
ORDERING INFORMATION
Nominal Output
Device
Marking
Option
Package
Shipping†
Voltage
NCP136AFCT080T2G
0.80 V
7A
Output Active Discharge,
Normal Turn−On Slew Rate
NCP136BFCT080T2G
NCP136AFCT088T2G
NCP136AFCT105T2G
NCP136AFCT110T2G
NCP136AFCT120T2G
NCP136CFCT120T2G
NCP136AFCRC040T2G
0.80 V
0.88 V
1.05 V
1.10 V
1.20 V
1.20 V
0.40 V
7H
7J
Non*Active Discharge,
Normal Turn−On Slew Rate
Output Active Discharge,
Normal Turn−On Slew Rate
WLCSP6
Case 567XK
(Pb−Free)
7K
7L
Output Active Discharge,
Normal Turn−On Slew Rate
5000 / Tape & Reel
Output Active Discharge,
Normal Turn−On Slew Rate
7E
7C
7M
Output Active Discharge,
Normal Turn−On Slew Rate
Output Active Discharge,
Slow Turn−On Slew Rate
Output Active Discharge,
Normal Turn−On Slew Rate
Back Side Coating
WLCSP6
Case 567YU
(Pb−Free)
5000 / Tape & Reel
NCP136AFCRC080T2G
0.80 V
7A
Output Active Discharge,
Normal Turn−On Slew Rate
Back Side Coating
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
To order other package and voltage variants, please contact your ON Semiconductor sales representative.
www.onsemi.com
12
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
WLCSP6 1.4x0.8x0.33
CASE 567XK
ISSUE O
DATE 15 JAN 2019
GENERIC
MARKING DIAGRAM*
XXM
XX = Specific Device Code
M
= Month Code
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON03100H
WLCSP6 1.4x0.8x0.33
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2018
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
WLCSP6 1.4x0.8x0.37
CASE 567YU
ISSUE O
DATE 14 NOV 2019
GENERIC
MARKING DIAGRAM*
XXM
XX = Specific Device Code
M
= Month Code
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON14943H
WLCSP6 1.4x0.8x0.37
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2018
www.onsemi.com
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
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literature is subject to all applicable copyright laws and is not for resale in any manner.
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◊
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