NCP137BFCTADJT2G [ONSEMI]

700 mA, Very Low Dropout Bias Rail CMOS Voltage Regulator;
NCP137BFCTADJT2G
型号: NCP137BFCTADJT2G
厂家: ONSEMI    ONSEMI
描述:

700 mA, Very Low Dropout Bias Rail CMOS Voltage Regulator

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中文:  中文翻译
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NCP137  
700 mA, Very Low Dropout  
Bias Rail CMOS Voltage  
Regulator  
The NCP137 is a 700 mA VLDO equipped with NMOS pass  
transistor and a separate bias supply voltage (V ). The device  
BIAS  
www.onsemi.com  
provides very stable, accurate output voltage with low noise suitable  
for space constrained, noise sensitive applications. In order to  
optimize performance for battery operated portable applications, the  
MARKING  
DIAGRAM  
NCP137 features low I consumption. The WLCSP6 1.2 mm x  
Q
0.8 mm Chip Scale package is optimized for use in space constrained  
applications.  
WLCSP6, 1.2x0.8  
CASE 567MV  
XXMG  
Features  
XX = Specific Device Code  
Input Voltage Range: V  
to 5.5 V  
OUT  
M
= Month Code  
Bias Voltage Range: 2.5 V to 5.5 V  
G
= PbFree Package  
Adjustable and Fixed Voltage Version Available  
Output Voltage Range: 0.4 V to 1.8 V (Fixed) and  
PIN CONNECTIONS  
Output Voltage Range: 0.5 V to 3.0 V (Adjustable)  
1
2
1% Accuracy over Temperature, 0.5% V  
@ 25°C  
OUT  
UltraLow Dropout: Typ. 40 mV at 700 mA  
Very Low Bias Input Current of Typ. 35 mA  
A
B
C
VOUT  
VIN  
Very Low Bias Input Current in Disable Mode: Typ. 0.5 mA  
Logic Level Enable Input for ON/OFF Control  
Output Active Discharge Option Available  
Stable with a 4.7 mF Ceramic Capacitor  
Available in WLCSP6 1.2 mm x 0.8 mm, 0.4 mm pitch Package  
These Devices are PbFree, Halogen Free/BFR Free and are RoHS  
Compliant  
SNS/FB  
GND  
EN  
VBIAS  
Typical Applications  
Batterypowered Equipment  
Smartphones, Tablets  
Cameras, DVRs, STB and Camcorders  
Top View  
ORDERING INFORMATION  
See detailed ordering, marking and shipping information on  
page 7 of this data sheet.  
V
V
BIAS  
BIAS  
2.5 V  
2.5 V  
V
V
OUT  
0.9 V up to 700 mA  
NCP137 ADJ  
NCP137  
GND  
1 mF  
1 mF  
OUT  
0.9 V up to 700 mA  
BIAS  
BIAS  
IN  
OUT  
FB  
OUT  
SNS  
V
V
IN  
1.02 V  
IN  
R1  
R2  
IN  
4.7 mF  
10 mF  
1.02 V  
EN  
EN  
4.7 mF  
4.7 mF  
GND  
V
V
EN  
EN  
Figure 1. Typical Application Schematics  
© Semiconductor Components Industries, LLC, 2016  
1
Publication Order Number:  
September, 2018 Rev. 5  
NCP137/D  
NCP137  
CURRENT  
LIMIT  
OUT  
IN  
ENABLE  
BLOCK  
150 W  
EN  
*Active  
DISCHARGE  
BIAS  
UVLO  
0.50 V  
VOLTAGE  
+
THERMAL  
LIMIT  
REFERENCE  
FB  
GND  
*Active output discharge function is present only in NCP137A option devices.  
Figure 2. Simplified Schematic Block Diagram Adjustable Version  
CURRENT  
LIMIT  
OUT  
IN  
ENABLE  
BLOCK  
150 W  
EN  
*Active  
DISCHARGE  
BIAS  
UVLO  
VOLTAGE  
+
REFERENCE  
THERMAL  
LIMIT  
SNS  
GND  
*Active output discharge function is present only in NCP137A option devices.  
Figure 3. Simplified Schematic Block Diagram Fixed Version  
www.onsemi.com  
2
NCP137  
PIN FUNCTION DESCRIPTION  
Pin No.  
WLCSP6  
Pin Name  
VOUT  
VIN  
Description  
A1  
Regulated Output Voltage pin  
Input Voltage Supply pin  
A2  
B1  
FB  
Adjustable Regulator Feedback Input. Connect to output voltage resistor divider central node.  
(ADJ devices)  
B1  
SNS  
EN  
Output voltage Sensing Input. Connect to Output on the PCB to output the voltage  
corresponding to the part version.  
(Fix Volt devices)  
B2  
Enable pin. Driving this pin high enables the regulator. Driving this pin low puts the regulator into  
shutdown mode.  
C1  
C2  
GND  
Ground pin  
VBIAS  
Bias voltage supply for internal control circuits. This pin is monitored by internal Under-Voltage  
Lockout Circuit.  
ABSOLUTE MAXIMUM RATINGS  
Rating  
Symbol  
Value  
Unit  
V
Input Voltage (Note 1)  
V
IN  
0.3 to 6  
Output Voltage  
V
OUT  
0.3 to (V +0.3) 6  
V
IN  
Chip Enable, Bias, FB and SNS Input  
Output Short Circuit Duration  
Maximum Junction Temperature  
Storage Temperature  
V
V
V
V
0.3 to 6  
unlimited  
150  
V
EN, BIAS, FB, SNS  
t
s
SC  
T
°C  
°C  
V
J
T
55 to 150  
2000  
STG  
ESD Capability, Human Body Model (Note 2)  
ESD Capability, Machine Model (Note 2)  
ESD  
HBM  
ESD  
200  
V
MM  
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality  
should not be assumed, damage may occur and reliability may be affected.  
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.  
2. This device series incorporates ESD protection (except OUT pin) and is tested by the following methods:  
ESD Human Body Model tested per EIA/JESD22A114  
ESD Machine Model tested per EIA/JESD22A115  
Latchup Current Maximum Rating tested per JEDEC standard: JESD78.  
THERMAL CHARACTERISTICS  
Rating  
Symbol  
Value  
Unit  
Thermal Characteristics, WLCSP6 1.2 mm x 0.8 mm  
RqJA  
69  
°C/W  
Thermal Resistance, JunctiontoAir (Note 3)  
3. This junctiontoambient thermal resistance under natural convection was derived by thermal simulations based on the JEDEC JESD51  
series standards methodology. Only a single device mounted at the center of a high_K (2s2p) 80 mm x 80 mm multilayer board with 1ounce  
internal planes and 2ounce copper on top and bottom. Top copper layer has a dedicated 1.6 sqmm copper area.  
www.onsemi.com  
3
 
NCP137  
ELECTRICAL CHARACTERISTICS 40°C T 85°C; V  
= 2.7 V or (V  
+ 1.6 V), whichever is greater, V = V  
OUT(NOM)  
+
J
BIAS  
OUT  
IN  
0.3 V, I  
= 1 mA, V = 1 V, C = 4.7 mF, C  
= 10 mF, C  
= 1 mF, unless otherwise noted. Typical values are at T = +25°C.  
OUT  
EN  
IN  
OUT  
BIAS J  
Min/Max values are for 40°C T 85°C unless otherwise noted. (Notes 4, 5)  
J
Parameter  
Test Conditions  
Symbol  
Min  
Typ  
Max  
Unit  
Operating Input Voltage  
Range  
V
IN  
V
+
5.5  
V
OUT  
DO  
V
Operating Bias Voltage  
Range  
V
(V  
+
5.5  
V
V
V
BIAS  
OUT  
1.50) 2.5  
Undervoltage Lockout  
V
Rising  
UVLO  
1.6  
0.2  
BIAS  
Hysteresis  
Reference Voltage  
(Adj devices)  
T = +25°C  
J
V
0.500  
REF  
Output Voltage Accuracy  
V
V
0.5  
%
%
OUT  
Output Voltage Accuracy 40°C T 85°C, V  
+ 0.3 V V ≤  
IN  
1.0  
+1.0  
J
OUT(NOM)  
OUT  
V
+ 1.0 V, 2.7 V or (V  
+
OUT(NOM)  
OUT(NOM)  
1.6 V), whichever is greater < V  
< 5.5 V,  
BIAS  
1 mA < I  
< 700 mA  
OUT  
V
V
Line Regulation  
V
+ 0.3 V V 5.0 V  
Line  
Line  
0.01  
0.01  
%/V  
%/V  
IN  
OUT(NOM)  
IN  
Reg  
Line Regulation  
2.7 V or (V  
greater < V  
+ 1.6 V), whichever is  
OUT(NOM)  
BIAS  
Reg  
< 5.5 V  
BIAS  
Load Regulation  
I
I
I
= 1 mA to 700 mA  
Load  
1.5  
40  
mV  
mV  
V
OUT  
OUT  
OUT  
Reg  
V
IN  
Dropout Voltage  
= 700 mA (Notes 6, 7)  
V
DO  
60  
1.5  
V
BIAS  
Dropout Voltage  
= 700 mA, V = V  
(Notes 6, 8, 9)  
V
1.1  
IN  
BIAS  
DO  
CL  
Output Current Limit  
V
= 90% V  
I
800  
1200  
0.1  
1500  
0.5  
mA  
mA  
OUT  
OUT(NOM)  
FB/SNS Pin Operating  
Current  
I
, I  
FB SNS  
Bias Pin Quiescent  
Current  
V
BIAS  
= 2.7 V, I  
= 0 mA  
I
35  
50  
mA  
OUT  
BIASQ  
Bias Pin Disable Current  
V
V
0.4 V  
0.4 V  
I
0.5  
0.5  
1
1
mA  
mA  
EN  
BIAS(DIS)  
Vinput Pin Disable  
Current  
I
VIN(DIS)  
EN  
EN Pin Threshold Voltage EN Input Voltage “H”  
EN Input Voltage “L”  
V
0.9  
V
EN(H)  
V
0.4  
1
EN(L)  
EN Pull Down Current  
V
EN  
= 5.5 V  
I
0.3  
mA  
ms  
EN  
TurnOn Time  
From assertion of V to V  
=
t
150  
EN  
OUT  
ON  
98% V  
. V  
= 1.0 V,  
OUT(NOM) OUT(NOM)  
C
= 4.7 mF  
OUT  
Power Supply Rejection  
Ratio (Adj devices)  
V
to V  
, f = 1 kHz, I  
= 10 mA,  
= 1.0 V,  
PSRR(V )  
IN  
75  
85  
dB  
dB  
IN  
OUT  
OUT  
OUT  
VIN V  
+0.5 V, V  
OUT(NOM)  
C
= 4.7 mF  
OUT  
V
to V  
OUT  
= 3.0 V, C  
, f = 1 kHz, I  
= 10 mA,  
= 1.0 V,  
PSRR(V  
)
BIAS  
OUT  
OUT  
BIAS  
VIN V  
+0.5 V, V  
OUT(NOM)  
= 4.7 mF  
V
BIAS  
OUT  
Output Noise Voltage  
(Adj devices)  
V
V
= V  
OUT(NOM)  
+0.5 V, f = 10 Hz to 100 kHz,  
V
N
35 x  
OUT REF  
mV  
RMS  
IN  
OUT  
= 1.0 V, C  
= 4.7 mF  
V
/V  
OUT  
Thermal Shutdown  
Threshold  
Temperature increasing  
Temperature decreasing  
160  
140  
°C  
4. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at T  
=
A
25°C. Low duty cycle pulse techniques are used during the testing to maintain the junction temperature as close to ambient as possible.  
5. Adjustable devices tested at V = V unless otherwise noted; external resistor tolerance is not taken into account.  
OUT  
REF  
OUT  
6. Dropout voltage is characterized when V  
falls 3% below V  
.
OUT(NOM)  
7. For adjustable devices, V dropout voltage tested at V  
= 2 x V  
.
IN  
OUT(NOM)  
OUT(NOM)  
REF  
8. For adjustable devices, V  
dropout voltage tested at V  
= 3 x V  
due to a minimum Bias operating voltage of 2.5 V.  
BIAS  
REF  
9. For fixed output voltages below 1.5 V, V  
dropout does not apply due to a minimum Bias operating voltage of 2.5 V.  
BIAS  
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4
NCP137  
ELECTRICAL CHARACTERISTICS 40°C T 85°C; V  
= 2.7 V or (V  
+ 1.6 V), whichever is greater, V = V  
OUT(NOM)  
+
J
BIAS  
OUT  
IN  
0.3 V, I  
= 1 mA, V = 1 V, C = 4.7 mF, C  
= 10 mF, C  
= 1 mF, unless otherwise noted. Typical values are at T = +25°C.  
OUT  
EN  
IN  
OUT  
BIAS J  
Min/Max values are for 40°C T 85°C unless otherwise noted. (Notes 4, 5)  
J
Parameter  
Test Conditions  
= 0.5 V, NCP137A options  
Symbol  
Min  
Typ  
Max  
Unit  
Output Discharge  
PullDown  
V
0.4 V, V  
R
DISCH  
150  
W
EN  
OUT  
only  
Power Supply Rejection  
Ratio (Fixed Voltage  
devices)  
PSRR(V )  
IN  
75  
85  
40  
dB  
dB  
V
V
to V  
, f = 1 kHz, I  
= 10 mA,  
IN  
IN  
OUT  
OUT  
OUT  
OUT(NOM)  
V  
+0.5 V, V  
= 1.05 V,  
C
= 10 mF  
OUT  
V
V
V
to V  
, f = 1 kHz, I  
= 10 mA,  
= 1.05 V,  
PSRR(V  
)
BIAS  
IN  
BIAS  
OUT  
OUT  
BIAS  
V  
+0.5 V, V  
OUT  
OUT(NOM)  
= 3.0 V, C  
= 10 mF  
OUT  
Output Noise Voltage  
(Fixed Voltage devices)  
V
V
= V  
+0.5 V, f = 10 Hz to 100 kHz,  
V
N
mVRMS  
IN  
OUT  
= 1.05 V, C  
= 10 mF  
OUT(NOM)  
OUT  
4. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at T  
=
A
25°C. Low duty cycle pulse techniques are used during the testing to maintain the junction temperature as close to ambient as possible.  
5. Adjustable devices tested at V = V unless otherwise noted; external resistor tolerance is not taken into account.  
OUT  
REF  
OUT  
6. Dropout voltage is characterized when V  
falls 3% below V  
.
OUT(NOM)  
7. For adjustable devices, V dropout voltage tested at V  
= 2 x V  
.
IN  
OUT(NOM)  
OUT(NOM)  
REF  
8. For adjustable devices, V  
dropout voltage tested at V  
= 3 x V  
due to a minimum Bias operating voltage of 2.5 V.  
BIAS  
REF  
9. For fixed output voltages below 1.5 V, V  
dropout does not apply due to a minimum Bias operating voltage of 2.5 V.  
BIAS  
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product  
performance may not be indicated by the Electrical Characteristics if operated under different conditions.  
www.onsemi.com  
5
 
NCP137  
APPLICATIONS INFORMATION  
VBAT  
NCP137  
EN  
Switchmode DC/DC  
= 1.5 V  
1.0 V  
OUT  
SNS  
V
OUT  
BIAS  
1.5 V  
LX  
FB  
LOAD  
IN  
IN  
GND  
EN  
Processor  
GND  
I/O  
I/O  
To other circuits  
Figure 4. Typical Application: LowVoltage DC/DC PostRegulator with ON/OFF Functionality  
Dropout Voltage  
The NCP137 dualrail very low dropout voltage regulator  
Because of two power supply inputs V and V  
and  
is using NMOS pass transistor for output voltage regulation  
IN  
BIAS  
one V  
regulator output, there are two Dropout voltages  
from V voltage. All the low current internal control  
OUT  
IN  
specified.  
The first, the V Dropout voltage is the voltage  
circuitry is powered from the V  
voltage.  
BIAS  
The use of an NMOS pass transistor offers several  
advantages in applications. Unlike PMOS topology devices,  
the output capacitor has reduced impact on loop stability.  
Vin to Vout operating voltage difference can be very low  
compared with standard PMOS regulators in very low Vin  
applications.  
The NCP137 offers smooth monotonic start-up. The  
controlled voltage rising limits the inrush current.  
The Enable (EN) input is equipped with internal  
hysteresis. NCP137 Voltage linear regulator Fixed and  
Adjustable version is available.  
IN  
difference (V – V  
) when V  
OUT  
starts to decrease by  
IN  
OUT  
percent specified in the Electrical Characteristics table.  
is high enough; specific value is published in the  
V
BIAS  
Electrical Characteristics table.  
The second, V  
dropout voltage is the voltage  
BIAS  
difference (V  
– V  
) when V and V  
pins are  
BIAS  
OUT  
IN  
BIAS  
joined together and V  
starts to decrease.  
OUT  
Input and Output Capacitors  
The Adjustable device is designed to be stable for ceramic  
output capacitors with Effective capacitance in the range  
from 4.7 mF to 22 mF. The device is also stable with multiple  
capacitors in parallel, having the total effective capacitance  
in the specified range. For ADJ applications with nominal  
output voltage less than 0.6 V and for all the fixed voltage  
devices applications the output capacitor effective  
capacitance 10 mF to 22 mF is recommended.  
Output Voltage Adjust  
The required output voltage of Adjustable devices can be  
adjusted from 0.5 V to 3.0 V using two external resistors.  
Typical application schematics is shown in Figure 5.  
VBIAS  
C
NCP137 ­ ADJ  
In applications where no low input supplies impedance  
BIAS  
available (PCB inductance in V and/or V  
inputs as  
IN  
BIAS  
OUT  
FB  
BIAS  
VOUT  
example), the recommended C = 1 mF and C  
= 0.1 mF  
IN  
BIAS  
R1  
R2  
VIN  
IN  
mF  
4.7  
or greater. Ceramic capacitors are recommended. For the best  
performance all the capacitors should be connected to the  
NCP137 respective pins directly in the device PCB copper  
layer, not through vias having not negligible impedance.  
When using small ceramic capacitor, their capacitance is  
not constant but varies with applied DC biasing voltage,  
temperature and tolerance. The effective capacitance can be  
much lower than their nominal capacitance value, most  
importantly in negative temperatures and higher LDO  
output voltages. That is why the recommended Output  
capacitor capacitance value is specified as Effective value in  
the specific application conditions.  
EN  
C
IN  
GND  
VEN  
ǒ
Ǔ
VOUT + 0.5 V   1 ) R1ńR2  
Figure 5. Typical Application Schematics  
It is recommended to keep the total serial resistance of  
resistors (R1 + R2) no greater than 100 kW.  
www.onsemi.com  
6
 
NCP137  
Enable Operation  
Thermal Protection  
The enable pin will turn the regulator on or off. The  
threshold limits are covered in the electrical characteristics  
table in this data sheet. If the enable function is not to be used  
Internal thermal shutdown (TSD) circuitry is provided to  
protect the integrated circuit in the event that the maximum  
junction temperature is exceeded. When TSD activated , the  
regulator output turns off. When cooling down under the low  
temperature threshold, device output is activated again. This  
TSD feature is provided to prevent failures from accidental  
overheating.  
Activation of the thermal protection circuit indicates  
excessive power dissipation or inadequate heatsinking. For  
reliable operation, junction temperature should be limited to  
+105°C maximum.  
then the pin should be connected to V or V  
.
IN  
BIAS  
Current Limitation  
The internal Current Limitation circuitry allows the  
device to supply the full nominal current and surges but  
protects the device against Current Overload or Short.  
ORDERING INFORMATION  
Nominal  
Output  
Voltage  
Device  
Marking  
Option  
Package  
Shipping†  
NCP137AFCTADJT2G  
ADJ  
A7  
Output Active Discharge  
Output Active Discharge,  
Back Side Coating  
NCP137AFCTCADJT2G  
ADJ  
A7  
NCP137BFCTADJT2G  
NCP137AFCT045T2G  
NCP137AFCT105T2G  
NCP137AFCT110T2G  
ADJ  
D7  
AT  
AA  
AH  
NonActive Discharge  
Output Active Discharge  
Output Active Discharge  
Output Active Discharge  
0.45 V  
1.05 V  
1.10 V  
WLCSP6  
(PbFree)  
5000 / Tape & Reel  
Output Active Discharge,  
Back Side Coating  
NCP137AFCTC110T2G  
NCP137AFCT120T2G  
1.10 V  
1.20 V  
AH  
AD  
Output Active Discharge  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Spe-  
cifications Brochure, BRD8011/D.  
To order other package and voltage variants, please contact your ON Semiconductor sales representative  
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7
MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
WLCSP6, 1.20x0.80  
CASE 567MV  
ISSUE B  
SCALE 4:1  
DATE 05 JUN 2018  
E
A
NOTES:  
B
D
1. DIMENSIONING AND TOLERANCING PER  
ASME Y14.5M, 1994.  
2. CONTROLLING DIMENSION: MILLIMETERS.  
3. COPLANARITY APPLIES TO SPHERICAL  
CROWNS OF SOLDER BALLS.  
PIN A1  
REFERENCE  
MILLIMETERS  
2X  
0.05  
0.05  
C
DIM  
A
A1  
A2  
b
D
E
e
MIN  
−−−  
0.04  
0.23 REF  
0.24  
1.20 BSC  
0.80 BSC  
0.40 BSC  
MAX  
0.33  
0.08  
2X  
C
0.30  
TOP VIEW  
SIDE VIEW  
A2  
A
0.05  
0.05  
C
GENERIC  
MARKING DIAGRAM*  
C
SEATING  
PLANE  
C
e
NOTE 3  
A1  
XXM  
XX = Specific Device Code  
6X  
b
e
M
= Month Code  
0.05  
0.03  
C
C
A B  
C
*This information is generic. Please refer to  
device data sheet for actual part marking.  
Pb−Free indicator, “G” or microdot “ G”,  
may or may not be present.  
B
A
1
2
BOTTOM VIEW  
RECOMMENDED  
SOLDERING FOOTPRINT*  
PACKAGE  
OUTLINE  
A1  
6X  
0.40  
PITCH  
0.20  
0.40  
PITCH  
DIMENSIONS: MILLIMETERS  
*For additional information on our Pb−Free strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98AON06670G  
WLCSP6, 1.20x0.80  
PAGE 1 OF 1  
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© Semiconductor Components Industries, LLC, 2018  
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