NCP346SN2T1 [ONSEMI]
1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO5, PLASTIC, SOT-23, 5 PIN;
| 型号： | NCP346SN2T1 |
| 厂家： | 
ONSEMI |
| 描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO5, PLASTIC, SOT-23, 5 PIN 信息通信管理 光电二极管 |
| 文件： | 总15页 (文件大小：357K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NCP346
Overvoltage Protection IC
The NCP346 Overvoltage Protection circuit (OVP) protects
sensitive electronic circuitry from overvoltage transients and power
supply faults when used in conjunction with an external P−channel
FET. The device is designed to sense an overvoltage condition and
quickly disconnect the input voltage supply from the load before any
damage can occur. The OVP consists of a precise voltage reference, a
comparator with hysteresis, control logic, and a MOSFET gate driver.
The OVP is designed on a robust BiCMOS process and is intended to
withstand voltage transients up to 30 V.
The device is optimized for applications that have an external
AC/DC adapter or car accessory charger to power the product and/or
recharge the internal batteries. The nominal overvoltage thresholds are
4.45 and 5.5 V and can be adjusted upward with a resistor divider
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THIN SOT−23−5
SN SUFFIX
CASE 483
5
1
PIN CONNECTIONS &
MARKING DIAGRAM
OUT
GND
V
CC
1
2
3
5
between the V , IN, and GND pins. It is suitable for single cell
CC
Li−Ion applications as well as 3/4 cell NiCD/NiMH applications.
Features
4
CNTRL
IN
• Overvoltage Turn−Off Time of Less Than 1.0 msec
• Accurate Voltage Threshold of 4.45 V and 5.5 V (Nominal)
• CNTRL Input Compatible with 1.8 V Logic Levels
• These are Pb−Free Devices
(Top View)
xxx = SQZ for NCP346SN1
= SRD for NCP346SN2
A
Y
W
G
= Asembly Location
= Year
= Work Week
Typical Applications
= Pb−Free Package
• Cellular Phones
• Digital Cameras
• Portable Computers and PDAs
• Portable CD and other Consumer Electronics
(Note: Microdot may be in either location)
ORDERING INFORMATION
†
Device
Package
Shipping
NCP346SN1T1G
SOT−23−5 3000 / Tape & Reel
(Pb−Free) (7 inch Reel)
NCP346SN2T1G
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Schottky
Diode
P−CH
AC/DC Adapter or
Accessory Charger
(optional)
IN
V
CC
+
+
−
C1
LOAD
FET
Driver
(optional)
Logic
OUT
V
ref
NCP346
GND
CNTRL
Microprocessor port
Note: This device contains 89 active transistors
Figure 1. Simplified Application Diagram
© Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
September, 2006 − Rev. 6
NCP346/D
NCP346
V
CC
(5)
IN
(4)
V
CC
V5
Pre−regulator
R1
R2
OUT
(1)
V
CC
+
LOGIC
BLOCK
ON/OFF OUT
DRIVER
COMP
−
Bandgap
Reference
CNTRL
(3)
GND
(2)
Figure 2. Detailed Block Diagram
PIN FUNCTION DESCRIPTIONS
Pin #
Symbol
Pin Description
1
OUT
This signal drives the gate of a P−channel MOSFET. It is controlled by the voltage level on IN or the logic state of
the CNTRL input. When an overvoltage event is detected, the OUT pin is driven to within 1.0 V of V in less
CC
than 1.0 msec provided that gate and stray capacitance is less than 12 nF.
2
3
GND
Circuit Ground
CNTRL
This logic signal is used to control the state of OUT and turn−on/off the P−channel MOSFET. A logic High results
in the OUT signal being driven to within 1.0 V of V which disconnects the FET. The input is tied Low via an
CC
internal 50 kW pull−down resistor. It is recommended that the input be connected to GND if it is not used.
4
5
IN
This pin senses an external voltage point. If the voltage on this input rises above the overvoltage threshold (V ),
th
the OUT pin will be driven to within 1.0 V of V , thus disconnecting the FET. The nominal threshold level can be
CC
increased with the addition of an external resistor divider between IN, V , and GND.
CC
V
CC
Positive Voltage supply. OUT is guaranteed to be in low state (MOSFET ON) as long as V remains above
CC
2.5 V, and below the overvoltage threshold.
TRUTH TABLE
IN
CNTRL
OUT
<V
th
<V
th
>V
th
>V
th
L
H
L
GND
V
CC
V
CC
V
CC
H
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2
NCP346
MAXIMUM RATINGS (T = 25°C unless otherwise noted.)
A
Rating
OUT Voltage to GND
Pin
Symbol
Min
Max
Unit
V
1
V
O
−0.3
30
Input and CNTRL Pin Voltage to GND
4
3
V
−0.3
−0.3
30
13
V
input
V
CNTRL
Input Pin Voltage to V
4, 5
5
V(V
IN)
−0.3
−0.3
−
15
30
V
V
CC
CC,
V
CC
Maximum Range
V
CC(max)
Maximum Power Dissipation at T = 85°C
−
P
D
0.216
300
150
85
W
A
Thermal Resistance, Junction−to−Air
Junction Temperature
−
R
−
°C/W
°C
°C
V
q
JA
−
T
J
−
Operating Ambient Temperature
−
T
A
−40
0
V
Operating Voltage
3
−
5.0
CNTRL
Storage Temperature Range
−
T
stg
−65
150
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
ATTRIBUTES
Characteristic
Value
ESD Protection
Human Body Model (HBM) per JEDEC Standard JESD22−A114
Machine Model (MM) per JEDEC Standard JESD22−A114
v 2.5 kV
v 250 V
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
Transistor Count
Level 1
89
Latchup Current Maximum Rating per JEDEC Standard EIA/JESD78
1. For additional Moisture Sensitivity information, refer to Application Note AND8003/D.
v 150 mA
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3
NCP346
ELECTRICAL CHARACTERISTICS (NCP346SN1T1)
(For typical values T = 25°C, for min/max values T = −40°C to +85°C unless otherwise noted.)
A
A
Characteristic
Operating Voltage Range
Pin
5
Symbol
Min
2.5
−
Typ
−
Max
25
Unit
V
V
CC
V
CC(opt)
Total Supply Current (IN Connected to V ; ON Mode, V = 4.0 V,
4,5
I
650
1200
mA
CC
CC
cc on
CNTRL Pin Floating, Steady State)
Total Supply Current (IN Connected to V ; OFF Mode Driven by
4,5
4,5
I
−
−
700
750
1200
1200
mA
mA
CC
cc off
CNTRL
CNTRL Pin, V = 4.0 V, V
= 1.5 V, Steady State)
CC
CNTRL
Total Supply Current (IN Connected to V ; OFF Mode Driven by
I
IN
CC
cc off
Overvoltage, V = 5.0 V, CNTRL Pin Floating, Steady State)
CC
Input Threshold (IN Connected to V ; V Increasing)
4
4
4
4
3
3
3
3
1
V
V
(LH)
(HL)
4.3
4.3
−
4.45
4.4
50
55
−
4.6
4.6
−
V
V
CC
CC
th
Input Threshold (IN Connected to V ; V Decreasing)
CC
CC
th
Input Hysteresis (IN Connected to V
)
V
mV
kW
V
CC
hyst
Input Impedance of IN Pin
CNTRL Voltage High
CNTRL Voltage Low
R
30
1.5
−
85
−
in
V
IH
V
IL
−
0.5
200
20
−
V
CNTRL Current High (V = 5.0 V)
I
−
90
9.0
−
mA
mA
V
ih
IH
CNTRL Current Low (V = 0.5 V)
I
−
il
IL
Output Voltage High (IN Connected to V , V = 5.0 V)
V
oh
CC
CC
V
− 1.0
− 0.25
− 0.1
I
I
I
= 10 mA
= 0.25 mA
= 0 mA
CC
source
source
source
V
CC
V
CC
Output Voltage Low (IN Connected to V , V = 4.0 V, CNTRL Pin
1
V
ol
−
−
0.1
V
CC
CC
Floating)
= 0 mA
I
sink
Output Sink Current (IN Connected to V , V = 4.0 V, CNTRL Pin
1
1
1
1
I
sink
4.0
−
10
1.8
0.6
0.5
16
3.5
1.0
1.0
mA
CC
CC
Floating, V
= 1.0 V)
OUT
Turn ON Delay – Input (IN Connected to V ; V Steps Down from
t
IN
msec
msec
msec
CC
CC
on
off
5.0 V to 4.0 V, C
= 12 nF, Measured to V < 1.0 V)
out
load
Turn OFF Delay – Input (IN Connected to V ; V Steps Up from
t
IN
−
CC
CC
4.0 V to 5.0 V, C
= 12 nF, Measured to V > V − 1.0 V)
OUT CC
load
Turn OFF Delay – CNTRL (IN Connected to V ; V = 4.0 V, V
t
off
−
CC
CC
CNTRL
CNTRL
Steps from 0.5 V to 2.0 V, C
1.0 V)
= 12 nF, Measured to V
> V
−
load
OUT
CC
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4
NCP346
ELECTRICAL CHARACTERISTICS (NCP346SN2T1)
(For typical values T = 25°C, for min/max values T = −40°C to +85°C unless otherwise noted.)
A
A
Characteristic
Operating Voltage Range
Pin
5
Symbol
Min
2.5
−
Typ
−
Max
25
Unit
V
V
CC
V
CC(opt)
Total Supply Current (IN Connected to V ; ON Mode, V = 5.0 V,
4, 5
I
650
1200
mA
CC
CC
cc on
CNTRL Pin Floating, Steady State)
Total Supply Current (IN Connected to V ; OFF Mode Driven by
4, 5
4, 5
I
−
−
700
750
1200
1200
mA
mA
CC
cc off
CNTRL
CNTRL Pin, V = 5.0 V, V
= 1.5 V, Steady State)
CC
CNTRL
Total Supply Current (IN Connected to V ; OFF Mode Driven by
I
IN
CC
cc off
Overvoltage, V = 6.0 V, CNTRL Pin Floating, Steady State)
CC
Input Threshold (IN Connected to V ; V Increasing)
4
4
4
4
3
3
3
3
1
V
V
(LH)
(HL)
5.3
5.3
−
5.5
5.45
50
60
−
5.7
5.7
−
V
V
CC
CC
th
Input Threshold (IN Connected to V ; V Decreasing)
CC
CC
th
Input Hysteresis (IN Connected to V
)
V
mV
kW
V
CC
hyst
Input Impedance of IN Pin
CNTRL Voltage High
CNTRL Voltage Low
R
30
1.5
−
100
−
in
V
IH
V
IL
−
0.5
200
20
−
V
CNTRL Current High (V = 5.0 V)
I
−
95
9.0
−
mA
mA
V
ih
IH
CNTRL Current Low (V = 0.5 V)
I
−
il
IL
Output Voltage High (IN Connected to V , V = 6.0 V)
V
oh
CC
CC
V
− 1.0
− 0.25
− 0.1
I
I
I
= 10 mA
= 0.25 mA
= 0 mA
CC
source
source
source
V
CC
V
CC
Output Voltage Low (IN Connected to V , V = 5.0 V, CNTRL Pin
1
V
ol
−
−
0.1
V
CC
CC
Floating)
= 0 mA
I
sink
Output Sink Current (IN Connected to V , V = 5.0 V, CNTRL Pin
1
1
1
1
I
sink
4.0
−
10
1.8
0.5
0.6
16
4.5
1.0
1.0
mA
CC
CC
Floating, V
= 1.0 V)
OUT
Turn ON Delay – Input (IN Connected to V ; V Steps Down from
t
IN
msec
msec
msec
CC
CC
on
off
6.0 V to 5.0 V, C
= 12 nF, Measured to V < 1.0 V)
out
load
Turn OFF Delay – Input (IN Connected to V ; V Steps Up from
t
IN
−
CC
CC
5.0 V to 6.0 V, C
= 12 nF, Measured to V > V − 1.0 V)
OUT CC
load
Turn OFF Delay – CNTRL (V
Steps Up from 0.5 V to 2.0 V, V
t
off
−
CNTRL
CC
ICNTRL
= 5.0 V, C
= 12 nF, Measured to V > V − 1.0 V)
OUT CC
load
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5
NCP346
APPLICATION INFORMATION
NTHS4101PT1 MBRM130LT1
Schottky
Diode
P−CH
AC/DC Adapter or
Accessory Charger
(optional)
IN
V
CC
+
Zener
Diode
(optional)
Zener
+
−
C1
LOAD
FET
Driver
(opt.)
Logic
Diode
OUT
(optional)
V
ref
NCP346
GND
CNTRL
Microprocessor
port
Figure 3.
Introduction
dV/dT rise that occurs during the brief time it takes to
turn−off the MOSFET. For battery powered applications, a
low−forward voltage Schottky diode such as the
MBRM120LT3 can be placed in series with the MOSFET to
block the body diode of the MOSFET and prevent shorting
the battery out if the input is accidentally shorted to ground.
This provides additional voltage margin at the load since
there is a small forward drop across this diode that reduces
the voltage at the load.
When the protection circuit turns off the MOSFET, there
can be a sudden rise in the input voltage of the device. This
transient can be quite large depending on the impedance of
the supply and the current being drawn from the supply at the
time of an overvoltage event. This inductive spike can be
clamped with a Zener diode from IN to ground. This diode
breakdown voltage should be well above the worst case
supply voltage provided from the AC/DC adapter or
Cigarette Lighter Adapter (CLA), since the Zener is only
intended to clamp the transient. The NCP346 is designed so
In many electronic products, an external AC/DC wall
adapter is used to convert the AC line voltage into a
regulated DC voltage or a current limited source. Line
surges or faults in the adapter may result in overvoltage
events that can damage sensitive electronic components
within the product. This is becoming more critical as the
operating voltages of many integrated circuits have been
lowered due to advances in sub−micron silicon lithography.
In addition, portable products with removable battery packs
pose special problems since the pack can be removed at any
time. If the user removes a pack in the middle of charging,
a large transient voltage spike can occur which can damage
the product. Finally, damage can result if the user plugs in
the wrong adapter into the charging jack. The challenge of
the product designer is to improve the robustness of the
design and avoid situations where the product can be
damaged due to unexpected, but unfortunately, likely events
that will occur as the product is used.
that the IN and V pin can safely protect up to 25 V and
CC
Circuit Overview
withstand transients to 30 V. Since these spikes can be very
narrow in duration, it is important to use a high bandwidth
probe and oscilloscope when prototyping the product to
verify the operation of the circuit under all the transient
conditions. A similar problem can result due to contact
bounce as the DC source is plugged into the product.
For portable products it is normal to have a capacitor to
ground in parallel with the battery. If the product has a
battery pack that is easily removable during charging, this
scenario should be analyzed. Under that situation, the
charging current will go into the capacitor and the voltage
may rise rapidly depending on the capacitor value, the
charging current and the power supply response time.
To address these problems, the protection system above
has been developed consisting of the NCP346 Overvoltage
Protection IC and a P−channel MOSFET switch such as the
MGSF3441. The NCP346 monitors the input voltage and
will not turn on the MOSFET unless the input voltage is
within a safe operating window that has an upper limit of the
overvoltage detection threshold. A Zener diode can be
placed in parallel to the load to provide for secondary
protection during the brief time that it takes for the NCP346
to detect the overvoltage fault and disconnect the MOSFET.
The decision to use this secondary diode is a function of the
charging currents expected, load capacitance across the
battery, and the desired protection voltage by analyzing the
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6
NCP346
Normal Operation
which equates to:
Figure 1 illustrates a typical configuration. The external
adapter provides power to the protection system so the
circuitry is only active when the adapter is connected. The
OVP monitors the voltage from the charger and if the
V
+ V (1 ) R R ) R ńR )
1ń 2 in
CC
x
1
(eq. 2)
(eq. 3)
So, as R approaches infinity:
in
V
+ V (1 ) R ńR
x 1 2)
CC
voltage exceeds the overvoltage threshold, V , the OUT
th
signal drives the gate of the MOSFET to within 1.0 V of
This shows that R shifts the V detection point in
in
th
V , thus turning off the FET and disconnecting the source
CC
accordance to the ratio of R / R . However, if R << R ,
1
in
1
in
from the load. The nominal time it takes to drive the gate to
this state is 400 nsec (1.0 msec maximum for gate
capacitance of < 12 nF). The CNTRL input can be used to
interrupt charging and allow the microcontroller to measure
the cell voltage under a normal condition to get a more
accurate measure of the battery voltage. Once the
overvoltage is removed, the NCP346 will turn on the
MOSFET. The turn on circuitry is designed to turn on the
MOSFET more gradually to limit the in−rush current. This
characteristic is a function of the threshold of the MOSFET
and will vary depending on the device characteristics such
as the gate capacitance.
this shift can be minimized. The following steps show this
procedure.
Designing around the Maximum Voltage Rating
Requirements, V(VCC, IN)
The NCP346’s maximum breakdown voltage between
pins V and IN is 15 V. Therefore, care must be taken that
CC
the design does not exceed this voltage. Normally, the
designer shorts V to IN, V(V , IN) is shorted to 0 V, so
CC
CC
there is no issue. However, one must take care when
adjusting the overvoltage threshold.
In Figure 4, the R1 resistor of the voltage divider divides
the V(V , IN) voltage to a given voltage threshold equal to:
CC
There are two events that will cause the OVP to drive the
gate of the FET to a HIGH state.
• Voltage on IN Rises Above the Overvoltage Detection
Threshold
(V , IN) + V
CC
* (R1ń(R1 ) (R2ńńR )))
in
CC
(eq. 4)
V(V , IN) worst case equals 15 V, and V worst case
CC
CC
equals 30 V, therefore, one must ensure that:
• CNTRL Input is Driven to a Logic HIGH
R1ń(R1 ) (R2ńńR )) t 0.5
in
(eq. 5)
Adjusting the Overvoltage Detection Point with
External Resistors
Where 0.5 = V(V , IN)max/V
CC
CCmax
Therefore, the NCP346 should only be adjusted to
maximum overvoltage thresholds which are less than 15 V.
If greater thresholds are desired than can be accommodated
by the NCP346, ON Semiconductor offers the NCP345
which can withstand those voltages.
The separate IN and V pins allow the user to adjust the
CC
overvoltage threshold, V , upwards by adding a resistor
th
divider with the tap at the IN pin. However, R does play a
in
significant role in the calculation since it is several
10’s of kW. The following equation shows the effects of R .
in
V
+ V (1 ) R ń(R ńńR ))
CC
x
1
2
in
(eq. 1)
V
CC
R
R
1
2
I
N
R
in
GND
Figure 4. Voltage divider input to adjust overvoltage
detection point
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7
NCP346
Design Steps for Adjusting the Overvoltage Threshold
The specification takes into account the hysteresis of the
comparator, so the minimum input threshold voltage (V )
th
1. Use Typical R , and V Values from the Electrical
in
th
is the falling voltage detection point and the maximum is the
rising voltage detection point. One should design the input
supply such that its maximum supply voltage in normal
operation is less than the minimum desired overvoltage
threshold.
Specifications
2. Minimize R Effect by Selecting R << R since:
in
1
in
(eq. 6)
V
OV
+ V (1 ) R ńR ) R ńR ).
th 1 2 1 in
3. Let X = R / R = 100.
in
1
8. Use worst case resistor tolerances to determine the
4. Identify Required Nominal Overvoltage Threshold.
maximum V(V ,IN)
CC
5. Calculate nominal R and R from Nominal Values:
1
2
V(V , IN) min + V
* (R1minń(R1min ) R2max))
CC
CCmax
(eq. 7)
(eq. 8)
R
+ R ńX
in
1
(eq. 12)
* (R1typń(R1typ ) R2typ))
(eq. 13)
R
1
R
+
2
(V ńV * R ńR * 1)
OV th in
V(V , IN)typ + V
1
CC
CCmax
6. Pick Standard Resistor Values as Close as Possible to
these Values
V(V , IN) max + V
CC CCmax
* (R1maxń(R1max ) R2min))
(eq. 14)
7. Use min/max Data and Resistor Tolerances to
Determine Overvoltage Detection Tolerance:
This is shown empirically in Tables 2 through 4.
The following tables show an example of obtaining a 6 V
detection voltage from the NCP346SN2T2, which has a
V
+ V (1 ) R
thmin
ńR
) R
ńR )
1min inmax
OVmin
1min 2max
(eq. 9)
typical V of 5.5 V.
th
V
+ V (1 ) R
thtyp
ńR
1typ 2typ
) R
ńR )
1typ intyp
OVtyp
(eq. 10)
V
+ V
(1 ) R R
1min 2max
) R )
ńR
OVmax
thmax
1max inmin
(eq. 11)
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8
NCP346
Table 1. Design Steps 1−5
Parameter
Typical
Design Steps
IN Pin Input Impedance (I )
54000
5.5
(1)
(1)
N
Input Threshold (V )
th
Ratio of R to R (X)
100
6
(2, 3)
(4)
in
1
Desired Overvoltage Threshold (V
)
OV
R
R
540
6674
(5)
1
2
(5)
Table 2. Design Steps 6−7 with 1% Resistors
1% Resistors
Parameter
Min
543.51
6583.5
5.3
Typical
549
Max
554.49
6716.5
5.7
Design Steps
R
R
(6)
(6)
(6)
(6)
(7)
(8)
1
2
6650
5.5
V
th
R
30000
5.76
54000
6.01
100000
6.29
in
V
OV
V(V , IN) @ V
2.25
2.29
2.33
CC
CCmax
Table 3. Design Steps 6−7 with 5% Resistors
5% Resistors
Parameter
Min
532
Typ
560
Max
588
Design Steps
R
R
(6)
(6)
(6)
(6)
(7)
(8)
1
2
6460
5.3
6800
5.5
7140
5.7
V
th
R
30000
5.72
2.08
54000
6.01
2.28
100000
6.33
in
V
OV
V(V , IN) @ V
2.50
CC
CCmax
Table 4. Design Steps 6−7 with 10% Resistors
10% Resistors
Parameter
Min
504
Typ
560
Max
616
Design Steps
R
R
(6)
(6)
(6)
(6)
(7)
(8)
1
2
6120
5.3
6800
5.5
7480
5.7
V
th
R
30000
5.68
1.89
54000
6.01
2.28
100000
6.39
in
V
OV
V(V , IN) @ V
2.74
CC
CCmax
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9
NCP346
4.6
4.55
4.5
5.7
IN Shorted to V
IN Shorted to V
CC
CC
5.65
5.6
5.55
5.5
Vth (V Increasing)
Vth (V Increasing)
CC
CC
4.45
4.4
Vth (V Decreasing)
Vth (V Decreasing)
CC
CC
5.45
5.4
4.35
4.3
5.35
5.3
−40 −25 −10
5
20
35
50
65
80
95
−40 −25 −10
5
20
35
50
65
80 95
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
Figure 5. Typical Vth Variation vs. Temperature
(NCP346SN1)
Figure 6. Typical Vth Variation vs. Temperature
(NCP346SN2)
900
800
700
600
500
900
800
700
600
500
Overvoltage Tripped (V = 6 V)
CC
Overvoltage Tripped (V = 5 V)
CC
Disabled by CNTRL Pin (V = 5 V)
CC
Disabled by CNTRL Pin (V = 4 V)
CC
Normal Operation (V = 5 V)
CC
Normal Operation (V = 4 V)
CC
−40 −25 −10
5
20
35
50
65
80 95
−40 −25 −10
5
20
35
50
65
80 95
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
Figure 7. Typical Supply Current (ICC + IIN) vs.
Temperature (NCP346SN1)
Figure 8. Typical Supply Current (ICC + IIN) vs.
Temperature (NCP346SN2)
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
0
2.5
5
7.5 10 12.5 15 17.5 20 22.5 25 27.5 30
(V)
0
2.5
5
7.5 10 12.5 15 17.5 20 22.5 25 27.530
(V)
V
CC
V
CC
Figure 9. Total Supply Current vs. VCC
(NCP346SN1)
Figure 10. Total Supply Current vs. VCC
(NCP346SN2)
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10
NCP346
15
14
13
12
11
10
9
15
14
13
12
11
10
9
8
8
7
7
6
6
5
5
−40 −25 −10
5
20
35
50
65
80
95
−40 −25 −10
5
20
35
50
65
80
95
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
Figure 11. Typical OUT Sink Current vs.
Temperature (NCP346SN1)
Figure 12. Typical OUT Sink Current vs.
Temperature (NCP346SN2)
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11
NCP346
MOSFET = NTHS4101PT1
C1= N/C
Load = 50 W
(See Figure 3)
V
CNTRL
V
Load
Figure 13. Typical Turn−off Time CNTRL (NCP346SN1)
MOSFET = NTHS4101PT1
C1 = N/C
Load = 50 W
(See Figure 3)
V
CNTRL
V
Load
Figure 14. Typical Turn−off Time CNTRL (NCP346SN2)
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12
NCP346
MOSFET = NTHS4101PT1
C1 = N/C
V
CNTRL
Load = 50 W
(See Figure 3)
V
Load
Figure 15. Typical Turn−on Time CNTRL (NCP346SN1)
V
CNTRL
MOSFET = NTHS4101PT1
C1 =N/C
Load = 50 W
(See Figure 3)
V
Load
Figure 16. Typical Turn−on Time CNTRL (NCP346SN2)
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13
NCP346
THIN SOT−23−5 POWER DISSIPATION
The power dissipation of the Thin SOT−23−5 is a function
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
of the pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power
dissipation. Power dissipation for a surface mount device is
the equation for an ambient temperature T of 25°C, one can
A
calculate the power dissipation of the device which in this
case is 400 milliwatts.
determined by T , the maximum rated junction
J(max)
temperature of the die, R , the thermal resistance from the
device junction to ambient, and the operating temperature,
qJA
150°C – 25°C
PD
+
+ 417 milliwatts
300°CńW
T . Using the values provided on the data sheet for the
A
The 300°C/W for the Thin SOT−23−5 package assumes
the use of the recommended footprint on a glass epoxy
printed circuit board to achieve a power dissipation of
417mw.
Thin SOT−23−5 package, P can be calculated as follows:
D
TJ(max)–TA
PD +
RqJA
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14
NCP346
PACKAGE DIMENSIONS
THIN SOT−23−5
SN SUFFIX
CASE 483−02
ISSUE E
NOTES:
1
DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
D
2
3
CONTROLLING DIMENSION: MILLIMETER.
MAXIMUM LEAD THICKNESS INCLUDES
LEAD FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS
OF BASE MATERIAL.
A AND B DIMENSIONS DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
5
4
3
B
C
S
1
2
4
L
MILLIMETERS
INCHES
MIN MAX
0.1142 0.1220
G
DIM
A
B
C
D
G
H
J
K
L
MIN
2.90
1.30
0.90
0.25
0.85
0.013
0.10
0.20
1.25
0
MAX
3.10
A
1.70 0.0512 0.0669
1.10 0.0354 0.0433
0.50 0.0098 0.0197
1.05 0.0335 0.0413
0.100 0.0005 0.0040
0.26 0.0040 0.0102
0.60 0.0079 0.0236
1.55 0.0493 0.0610
J
0.05 (0.002)
H
M
K
M
S
10
0
10
_
_
_
_
2.50
3.00 0.0985 0.1181
SOLDERING FOOTPRINT*
1.9
0.074
0.95
0.037
2.4
0.094
1.0
0.039
0.7
0.028
mm
inches
ǒ
Ǔ
SCALE 10:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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NCP346/D
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