NCP380LSNAJAGEVB [ONSEMI]
Fixed/Adjustable Currentâ Limiting PowerâDistribution Switches;
| 型号： | NCP380LSNAJAGEVB |
| 厂家： | 
ONSEMI |
| 描述： | Fixed/Adjustable Currentâ Limiting PowerâDistribution Switches |
| 文件： | 总23页 (文件大小：627K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NCP380, NCV380
Fixed/Adjustable Current‐
Limiting Power‐Distribution
Switches
The NCP380 is a high side power-distribution switch designed for
applications where heavy capacitive loads and short-circuits are likely
to be encountered. The device includes an integrated 55 mW (DFN
package), P-channel MOSFET. The device limits the output current to
a desired level by switching into a constant-current regulation mode
when the output load exceeds the current-limit threshold or a short is
present. The current-limit threshold is either user adjustable between
100 mA and 2.1 A via an external resistor or internally fixed. The
power-switch rise and fall times are controlled to minimize current
ringing during switching.
An internal reverse-voltage detection comparator disables the
power-switch if the output voltage is higher than the input voltage to
protect devices on the input side of the switch.
The FLAG logic output asserts low during over current,
reverse-voltage or over temperature conditions. The switch is
controlled by a logic enable input active high or low.
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UDFN6
CASE 517AB
TSOP−5
CASE 483
TSOP−6
CASE 318G
MARKING DIAGRAMS
1
2
3
6
5
4
XX M
UDFN6
Features
5
1
2.5 V – 5.5 V Operating Range
70 mW High-side MOSFET
Current Limit:
XXXAYWG
G
User adjustable from 100 mA to 2.1 A
Fixed 500 mA, 1 A, 1.5 A, 2 A and 2.1 A
TSOP−5
Under Voltage Lock-out (UVLO)
Built-in Soft-start
Thermal Protection
XXXAYWG
G
1
Soft Turn-off
TSOP−6
Reverse Voltage Protection
Junction Temperature Range: −40C to 125C
Enable Active High or Low (EN or EN)
XXX = Specific Device Code
A
M
Y
W
G
=Assembly Location
= Date Code
= Year
= Work Week
= Pb−Free Package
Compliance to IEC61000−4−2 (Level 4)
8.0 kV (Contact)
15 kV (Air)
UL Listed − File No. E343275
(Note: Microdot may be in either location)
NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 20 of this data sheet.
These are Pb-Free Devices
Typical Applications
Laptops
USB Ports/Hubs
TVs
Semiconductor Components Industries, LLC, 2013
1
Publication Order Number:
April, 2013 − Rev. 12
NCP380/D
NCP380, NCV380
USB
DATA
D+
D−
VBUS
GND
USB
Port
USB INPUT
5 V
IN
OUT
1 mF
120 mF
R
fault
NCP380
100 kW
FLAG
EN
FLAG
EN
ILIM*
R
lim
GND
*For Adjustable Version Only.
Figure 1. Typical Application Circuit
OUT
ILIM*
1
6 IN
OUT
GND
1
2
3
5
4
IN
IN
1
2
3
6
5
4
OUT
PAD1
2
3
5 GND
4 EN
GND
EN
ILIM*
FLAG
FLAG
EN
FLAG
TSOP−5
UDFN6
TSOP−6
(Top view)
*For adjustable version only, otherwise not connected.
Figure 2. Pin Connections
Table 1. PIN FUNCTION DESCRIPTION
Pin Name
EN
Type
Description
Enable input, logic low/high (i.e. EN or EN) turns on power switch
Ground connection;
INPUT
GND
IN
POWER
POWER
Power-switch input voltage; connect a 1 mF or greater ceramic capacitor from IN to GND as close as pos-
sible to the IC.
FLAG
OUT
OUTPUT
OUTPUT
Active-low open-drain output, asserted during overcurrent, overtemperature or reverse-voltage conditions.
Connect a 10 kW or greater resistor pull-up, otherwise leave unconnected.
Power-switch output; connect a 1 mF ceramic capacitor from OUT to GND as close as possible to the IC
is recommended. A 1 mF or greater ceramic capacitor from OUT to GND must be connected if the USB
requirement (i.e.120 mF capacitor minimum) is not met.
ILIM*
INPUT
External resistor used to set current-limit threshold; recommended 5 kW < R
< 250 kW.
ILIM
PAD1**
THERMAL
Exposed Thermal Pad: Must be soldered to PCB Ground plane
*(For adjustable version only, otherwise not connected.
**For DFN version only.
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2
NCP380, NCV380
Table 2. MAXIMUM RATINGS
Rating
Symbol
Value
−7.0 to +7.0
−0.3 to +7.0
1
Unit
V
From IN to OUT Pins: Input/Output (Note 1)
IN, OUT, EN, ILIM, FLAG, Pins: Input/Output (Note 1)
FLAG Sink Current
V
V
IN , OUT
V
V
V
V
V
V
EN, ILIM, FLAG, IN, OUT
I
mA
mA
kV
SINK
I
Source Current
I
1
LIM
LIM
ESD Withstand Voltage (IEC 61000−4−2)
(Output Only, when Bypassed with 1.0 mF Capacitor Minimum)
ESD IEC
15 Air, 8 Contact
Human Body Model (HBM) ESD Rating (Note 2)
Machine Model (MM) ESD Rating (Notes 2 and 3)
ESD HBM
ESD MM
LU
2,000
200
V
V
Latch-up Protection (Note 4)
Pins IN, OUT, EN, ILIM, FLAG
mA
100
Maximum Junction Temperature Range (Note 6)
Storage Temperature Range
T
−40 to +TSD
−40 to +150
Level 1
C
C
J
T
STG
Moisture Sensitivity (Note 5)
MSL
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. According to JEDEC standard JESD22−A108.
2. This device series contains ESD protection and passes the following tests:
Human Body Model (HBM) 2.0 kV per JEDEC standard: JESD22−A114 for all pins.
Machine Model (MM) 200 V per JEDEC standard: JESD22−A115 for all pins.
3. Except EN pin, 150 V.
4. Latch up Current Maximum Rating: 100 mA per JEDEC standard: JESD78 class II.
5. Moisture Sensitivity Level (MSL): 1 per IPC/JEDEC standard: J−STD−020.
6. A thermal shutdown protection avoids irreversible damage on the device due to power dissipation.
Table 3. OPERATING CONDITIONS
Symbol
Parameter
Operational Power Supply
Enable Voltage
Conditions
Min
2.5
0
Typ
−
Max
5.5
5.5
+85
+125
250
1.0
−
Unit
V
IN
V
V
EN
−
T
A
Ambient Temperature Range
Junction Temperature Range
Resistor from ILIM to GND Pin
FLAG Sink Current
−40
−40
5.0
−
25
25
−
C
C
T
J
R
kW
ILIM
I
−
mA
mF
SINK
C
Decoupling Input Capacitor
Decoupling Output Capacitor
Thermal Resistance Junction-to-Air
1.0
120
−
−
IN
C
USB Port per Hub
−
−
mF
OUT
R
UDFN−6 Package (Notes 7 and 8)
TSOP−5 Package (Notes 7 and 8)
TSOP−6 Package (Notes 7 and 8)
UDFN−6 Package
120
305
280
−
−
C/W
C/W
C/W
A
q
JA
−
−
−
−
I
Maximum DC Current
−
2.1
1.0
−
OUT
TSOP−5, TSOP−6 Package
−
−
A
P
D
Power Dissipation Rating (Note 9)
T
v 25C
UDFN−6 Package
TSOP−5 Package
TSOP−6 Package
UDFN−6 Package
TSOP−5 Package
TSOP−6 Package
−
830
325
350
325
130
145
mW
mW
mW
mW
mW
mW
A
−
−
−
−
T = 85C
−
−
A
−
−
−
−
7. A thermal shutdown protection avoids irreversible damage on the device due to power dissipation.
8. The R
is dependent of the PCB heat dissipation. Board used to drive this data was a 2” 2” NCP380EVB board. It is a 2 layers board
q
JA
with 2-once copper traces on top and bottom of the board. Exposed pad is connected to ground plane for UDFN−6 version only.
9. The maximum power dissipation (P ) is given by the following formula:
T
JMAX * TA
D
PD
+
RqJA
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3
NCP380, NCV380
Table 4. ELECTRICAL CHARACTERISTICS
(Min & Max Limits apply for T between −40C to +85C and T up to +125C for V between 2.5 V to 5.5 V (Unless otherwise noted).
A
J
IN
Typical values are referenced to T = +25C and V = 5 V.)
A
IN
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
mW
mW
ms
POWER SWITCH
R
Static Drain-source On-state
V
= 5 V
–40C < T < 125C
−
−
55
−
75
110
95
DS(on)
IN
J
Resistance
DFN Package
2.5 V < V < 5.5 V
–40C < T < 125C
J
IN
TSOP Package
V
IN
= 5 V
–40C < T < 125C
−
70
−
J
2.5 V < V < 5.5 V
–40C < T < 125C
−
135
1.5
1.0
0.5
0.5
IN
J
T
R
Output Rise Time
Output Fall Time
V
IN
= 5 V
C = 1 mF,
LOAD
LOAD
0.3
0.2
0.1
0.1
1.0
0.65
−
R
= 100 W (Note 10)
V
IN
= 2.5 V
T
F
V
IN
= 5 V
V
IN
= 2.5 V
−
ENABLE INPUT EN OR EN
V
High-level Input Voltage
Low-level Input Voltage
Input Current
1.2
−
−
−
−
V
IH
V
0.4
0.5
4.0
3.0
V
IL
I
V
= 0 V, V = 5 V
−0.5
2.0
1.0
−
mA
ms
ms
EN
EN
EN
T
ON
Turn On Time
C
= 1 mF, R = 100 W (Note 11)
LOAD
3.0
−
LOAD
T
OFF
Turn Off Time
CURRENT LIMIT
Current-limit Threshold
I
V
IN
= 5 V
1.02
1.20
1.38
A
A
R
= 20 kW (Note 11)
OCP
ILIM
(Maximum DC Output Current
Delivered to Load)
R
= 40 kW
0.595
0.700
0.805
ILIM
I
OUT
(Notes 11 and 13)
Fixed 0.5 A (Note 12)
Fixed 1.0 A (Note 12)
Fixed 1.5 A (Note 12)
Fixed 2.0 A (Note 12)
Fixed 2.1 A (Note 12)
0.5
1.0
1.5
2.0
2.1
−
0.58
1.15
1.75
2.25
2.25
2.0
0.65
1.3
1.9
2.5
2.5
−
T
Response Time to Short Circuit
Regulation Time
V
IN
= 5 V
ms
ms
ms
DET
REG
OCP
T
T
1.8
14
3.0
4.0
26
Overcurrent Protection Time
20
REVERSE-VOLTAGE PROTECTION
V
Reverse-voltage Comparator
Trip Point (V – V
−
100
6.0
−
mV
ms
REV
)
IN
OUT
T
REV
Time from Reverse-voltage
Condition to MOSFET Switch Off
& FLAG Low
V
IN
= 5 V
4.0
9.0
T
RREV
Re-arming Time
7.0
10
15
ms
UNDERVOLTAGE LOCKOUT
V
V
IN Pin Low-level Input Voltage
IN Pin Hysteresis
V
Rising
2.0
25
2.3
−
2.4
60
15
V
UVLO
HYST
IN
T = 25C
mV
ms
J
T
Re-arming Time
7.0
10
RUVLO
SUPPLY CURRENT
I
Low-level Output Supply Current
V
IN
= 5 V, No Load on OUT, Device OFF
−
1.0
2.1
mA
mA
INOFF
V
= 0 V or V = 5 V
EN
EN
I
High-level Output Supply
Current
V
IN
= 5 V, Device Enable
INON
2 A and 2.1 A Versions
1 A and 1.5 A Current Versions
0.5 A Current Version
−
−
−
−
−
−
90
80
70
I
Reverse Leakage Current
V
OUT
= 5 V, V = 0 V
T = 25C
J
−
−
1.0
mA
REV
IN
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4
NCP380, NCV380
Table 4. ELECTRICAL CHARACTERISTICS (continued)
(Min & Max Limits apply for T between −40C to +85C and T up to +125C for V between 2.5 V to 5.5 V (Unless otherwise noted).
A
J
IN
Typical values are referenced to T = +25C and V = 5 V.)
A
IN
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
FLAG PIN
V
FLAG Output Low Voltage
Off-state Leakage
FLAG Deglitch
I
= 1 mA
400
1.0
9.0
mV
mA
OL
FLAG
I
V
= 5 V
LEAK
FLAG
T
FLG
FLAG De-assertion Time due to Overcurrent or
Reverse Voltage Condition
4.0
6.0
6.0
8.0
ms
T
FOCP
FLAG Deglitch
FLAG Assertion due to Overcurrent
12
ms
THERMAL SHUTDOWN
T
Thermal Shutdown Threshold
Thermal Regulation Threshold
140
125
115
C
C
C
SD
T
SDOCP
T
RSD
Thermal Shutdown Rearming
Threshold
10.Parameters are guaranteed for C
and R
tolerance 1%.
connected to the OUT pin with respect to the ground, See Figure 3.
LOAD
LOAD
11. Adjustable current version, R
12.Fixed current version.
ILIM
13.Not production test, guaranteed by characterization.
VIN
IN
OUT
1 mF
C
R
LOAD
LOAD
NCP380
GND
Figure 3. Test Configuration
50%
V
V
EN
T
R
T
F
EN
T
OFF
90%
10%
V
OUT
10%
T
ON
90%
V
OUT
10%
Figure 4. Voltage Waveform
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5
NCP380, NCV380
BLOCK DIAGRAM
Blocking Control
IN
OUT
Current
Limiter
Gate Driver
ILIM*
Vref
TSD
UVLO
Osc
GND
EN
Flag
/FLAG
EN Block
Control Logic and Timer
*For adjustable version only, otherwise not connected.
Figure 5. Block Diagram
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6
NCP380, NCV380
T
on
+ T
R
Figure 6. Ton Delay and Trise Time
T
off
+ T
fall
Figure 7. Toff Delay and Tfall
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7
NCP380, NCV380
Figure 8. Turn On a Short
T
reg
TSD
Warning
TOCP
Figure 9. 2 W Short on Output. Complete Regulation Sequence
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8
NCP380, NCV380
T
FOCP
TSD Warning
V
IN
V
OUT
I
IN
/FLAG
Figure 10. OCP Regulation and TSD Warning Event
TOCP
T
reg
Figure 11. Timer Regulation Sequence During 2 W Overload
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9
NCP380, NCV380
Figure 12. Direct Short on OUT Pin
Figure 13. From Timer Regulation to Load Removal Sequence
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10
NCP380, NCV380
T
FOCP
V
OUT
I
OUT
/FLAG
Figure 14. From No Load to Direct Short Circuit
V
REV
V
OUT
V
IN
T
FREV
/FLAG
Figure 15. Reverse Voltage Detection
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11
NCP380, NCV380
T RREV
Figure 16. Reverse Voltage Removal
2.4
2.38
2.36
2.34
2.32
2.3
2.28
2.26
2.24
UVLO vs. Temperature
UVLO − hysteresis vs.
Temperature
2.22
2.2
−50
0
50
100
150
Temperature (C)
Figure 17. Undervoltage Threshold (Falling) and Hysteresis
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NCP380, NCV380
Low−Level Output Supply Current vs Vin
−40C
25C
85C
125C
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
2.4
2.9
3.4
3.9
4.4
4.9
5.4
Vin(V)
Figure 18. Standby Current vs Vin
High−Level Output Supply Current vs Vin
−40C
25C
85C
125C
100
90
80
70
60
50
40
30
20
10
0
2.4
2.9
3.4
3.9
4.4
4.9
5.4
Vin(V)
Figure 19. Quiescent Current vs Vin
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NCP380, NCV380
TSOP Package
100
95
R
vs. Temperature
DS(on)
90
85
80
75
70
65
60
55
50
45
40
−50 −40 −30 −20 −10
0
10 20
30 40
50 60 70
80 90 100 110 120 130 140
Temperature (C)
Figure 20. RDS(on) vs Temperature, TSOP Package
mDFN Package
100
95
90
85
80
75
70
65
60
55
50
45
40
R
vs. Temperature
DS(on)
−50 −40 −30 −20 −10
0
10 20 30 40 50 60 70 80 90 100 110 120 130 140
Temperature (C)
Figure 21. RDS(on) vs Temperature, mDFN Package
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NCP380, NCV380
FUNCTIONAL DESCRIPTION
V
OUT
Overview
Thermal
Regulation
Threshold
Timer
Regulation
Mode
The NCP380 is a high side P channel MOSFET power
distribution switch designed to protect the input supply
voltage in case of heavy capacitive loads, short circuit or
over current. In addition, the high side MOSFET is turned
off during under voltage, thermal shutdown or reverse
voltage condition. Adjustable version allows the user to
program the current limit threshold using an external
resistor. Thanks to the soft start circuitry, NCP380 is able to
limit large current and voltage surges.
I
OUT
I
OCP
T
OCP
T
REG
Overcurrent Protection
Figure 24. Short circuit
NCP380 switches into a constant current regulation mode
Then, the device enters in timer regulation mode, described
in 2 phases:
when the output current is above the I
threshold.
OCP
Depending on the load, the output voltage is decreased
accordingly.
In case of hot plug with heavy capacitive load, the
output voltage is brought down to the capacitor voltage.
Off-phase: Power MOSFET is off during T
to allow
OCP
the die temperature to drop.
On-phase: regulation current mode during T
The
REG.
The NCP380 will limit the current to the I
threshold
current is regulated to the I
level.
OCP
OCP
value until the charge of the capacitor is completed.
The timer regulation mode allows the device to handle
high thermal dissipation (in case of short circuit for
example) within temperature operating condition.
NCP380 stays in on-phase/off-phase loop until the over
current condition is removed or enable pin is toggled.
V
OUT
Drop due to
Capacitor Charge
I
OUT
Remark: Other regulation modes can be available for
different
applications.
Please
contact
our
I
OCP
ON Semiconductor representative for availability.
FLAG Indicator
Figure 22. Heavy capacitive load
The FLAG pin is an open-drain MOSFET asserted low
during over current, reverse-voltage or over temperature
conditions. When an over current or a reverse voltage fault
is detected on the power path, FLAG pin is asserted low at
the end of the associate deglitch time (see electrical
characteristics). Thanks to this feature, the FLAG pin is not
tied low during the charge of a heavy capacitive load or a
In case of overload, the current is limited to the I
OCP
value and the voltage value is reduced according to the
load by the following relation:
V
OUT + RLOAD IOCP
(eq. 1)
V
OUT
voltage transient on output. Deglitch time is T
for over
FOCP
current fault and T
remains low until the fault is removed. Then, the FLAG pin
for reverse voltage. The FLAG pin
REV
I
R
LOAD
OCP
goes high at the end of T
.
FGL
I
OUT
Undervoltage Lock-out
Thanks to a built-in under voltage lockout (UVLO)
circuitry, the output remains disconnected from input until
I
OCP
V
V
voltage is below V
. When V voltage is above
Figure 23. Overload
IN
UVLO IN
, the system try to reconnect the output after a
UVLO
In case of short circuit or huge load, the current is
limited to the I value within T time until the
rearming time. T
witch provides noise immunity to transient.
. This circuit has a V
hysteresis
RUVLO
HYST
OCP
DET
short condition is removed. If the output remains
shorted or tied to a very low voltage, the junction
Thermal Sense
Thermal shutdown turns off the power MOSFET if the die
temperature exceeds T . A Hysteresis prevents the part
temperature of the chip exceeds T
value and the
SDOCP
SD
device enters in thermal shutdown (MOSFET is
turned-off).
from turning on until the die temperature cools at T
RSD.
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15
NCP380, NCV380
Reverse Voltage Protection
Blocking Control
When the output voltage exceeds the input voltage by
voltage during T , the reverse voltage circuitry
The blocking control circuitry switches the bulk of the
power MOS. When the part is off, the body diode limits the
V
REV
REV
disconnects the output in order to protect the power supply.
The same time T is needed to turn on again the power
leakage current I
from OUT to IN. In this mode, anode
REV
of the body diode is connected to IN pin and cathode is
connected to OUT pin. In operating condition, anode of the
body diode is connected to OUT pin and cathode is
connected to IN pin preventing the discharge of the power
supply.
REV
MOS plus a rearming time T
.
RREV
Enable Input
Enable pin must be driven by a logic signal (CMOS or
TTL compatible) or connected to the GND or VIN. A logic
low on EN or high on EN turns-on the device. A logic high
on EN or low on EN turns off device and reduces the current
consumption down to I
.
INOFF
APPLICATION INFORMATION
Power Dissipation
Adjustable Current-Limit Programming
(for adjustable version only)
The junction temperature of the device depends on
different contributing factors such as board layout, ambient
temperature, device environment, etc... Yet, the main
contributor in terms of junction temperature is the power
dissipation of the power MOSFET. Assuming this, the
power dissipation and the junction temperature in normal
mode can be calculated with the following equations:
The NCP380xMUAJAA and NCP380xSNAJAA,
respectively mDFN and TSOP6 packages, are proposed to
have current limit flexibility for end Customer. Indeed, Ilim
pin is available to connect pull down resistor to ground,
which participate to the current threshold adjustment. It’s
strongly recommended to use 0.1 or 1% resistor tolerance to
keep the over current accuracy.
For this resistance selection, Customer should define first
of all, the USB current to sustain, without the device enters
in the protection sequence. Main rule is to select this pull
down resistor in order to make sure min current limit is
above the USB current to provide continuously to the
upstream accessory.
ǒ
Ǔ2
R
D + RDS(on) IOUT
(eq. 2)
Where:
P
D
= Power dissipation (W)
R
I
= Power MOSFET on resistance (W)
= Output current (A)
DS(on)
OUT
TJ + PD RqJA ) TA
(eq. 3)
Following, the main table selection contains the USB
current port for the accessory, the standard resistor selection
and typical/max over current threshold.
Where:
T
= Junction temperature (C)
J
R
T
A
= Package thermal resistance (C/W)
= Ambient temperature (C)
qJA
Power dissipation in regulation mode can be calculated by
taking into account the drop V −V
link to the load by
IN
OUT
the following relation:
ǒ
Ǔ
(eq. 4)
P
D + VIN * RLOAD IOCP IOCP
Where:
P
V
= Power dissipation (W)
= Input Voltage (V)
D
IN
R
I
= Load Resistance (W)
= Output regulated current (A)
LOAD
OCP
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16
NCP380, NCV380
Table 5. RESISTOR SELECTION FOR ADJUSTABLE CURRENT LIMIT VERSION
Min Current
Limit Value
(A)
Selected Resistor Value
(kW)
Maximum
Current Value
(A)
Theoric Resistor Value
Typical OCP Target Value
(A)
(kW)
1% or 0.1%
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
2.1
44.2
37.5
32.2
27.7
24.0
21.0
18.5
16.6
14.6
13.0
11.4
10.4
9.2
44.2
37.4
31.6
27.4
23.7
21
0.59
0.71
0.825
0.94
1.06
1.18
1.3
0.67
0.81
0.95
1.08
1.22
1.35
1.49
1.62
1.76
1.9
18.2
16.5
14.3
13
1.41
1.53
1.65
1.78
1.88
2.01
2.12
2.23
2.36
2.48
11.3
10.2
9.09
8.25
7.32
6.49
5.49
2.05
2.17
2.31
2.438
2.56
2.7
8.3
7.4
6.5
5.6
2.85
The “Min current limit Value” column, represents the DC
current to provide to the accessory without over current
activation.
Second column is the theoretical resistor value obtained
with following formula to achieve typical current target:
Rlim + −5.2959 ILIM5 ) 45.256 ILIM4 * 155.25 ILIM3 ) 274.39 ILIM2 * 267.6 ILIM ) 134.21
(eq. 5)
Rlim Versus OCP Average
48
46
44
R
vs. OCP Average
LIM
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
0
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
2.4
2.6
2.8
Current Limit (A)
Figure 25. RLIM Curve vs. Current Limit
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17
NCP380, NCV380
When the resistor is choosing to fit with the Customer
application, the limits of the over current threshold can be
calculated with the following formula:
IOCP min + 1.6915129 * 0.0330328 Rlim ) 0.0011207(Rlim * 22.375)2 * 0.0000451 (Rlim * 22.375)3 )
) 0.0000009 (Rlim * 22.375)4
(eq. 6)
(eq. 7)
(eq. 8)
IOCP max + 2.2885175 * 0.0446914 Rlim ) 0.0015163(Rlim * 22.375)2 * 0.000061 (Rlim * 22.375)3 )
) 0.0000012 (Rlim * 22.375)4
IOCPtyp + 1.9900152 * 0.0388621 Rlim ) 0.0013185(Rlim * 22.375)2 * 0.0000531 (Rlim * 22.375)3 )
) 0.0000011 (Rlim * 22.375)4
The minimum, typical and maximum current curves are
described in the following graph:
3.0
2.8
IOCP min vs. R
LIM
2.6
2.4
IOCP vs. R
LIM
IOCP max vs. R
LIM
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
5
7
9
11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47
R
(kW)
LIM
Figure 26. Current Threshold vs. Rlim Resistor
PCB Recommendations
That is recommended to respect 6 kW−47 kW resistor
range for two reasons.
The NCP380 integrates a PMOS FET rated up to 2 A, and
the PCB design rules must be respected to properly evacuate
the heat out of the silicon. The UDFN6 PAD1 must be
connected to ground plane to increase the heat transfer if
necessary. This pad must be connected to ground plane. By
For the low resistor values, the current limit is pushed up
to high current level. Due to internal power dissipation
capability, a maximum of 2.4 A typical can be set for the
mDFN package if thermal consideration are respected. For
the TSOP6 version 1.2 A is the maximum recommended
value because the part could enter in thermal shutdown
mode before constant current regulation mode.
increasing PCB area, the R
decreased, allowing higher power dissipation.
of the package can be
qJA
In the other side, if we want to keep 15% of accuracy, high
resistor values can be used up to 50 kW. With higher value,
the current threshold is lower than 500 mA, so in this case
degraded accuracy can be observed.
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18
NCP380, NCV380
Figure 27. USB Host Typical Application
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19
NCP380, NCV380
Table 6. ORDERING INFORMATION
Active
Over
Enable
Level
Current
Limit
UL
Listed
CB
Scheme
†
Device
Marking
Evaluation Board
Package
Shipping
NCP380LSNAJAAT1G
AAC
Adj.
NCP380LSNAJAGEVB
Y
Y
TSOP−6
(Pb−Free)
NCP380LSN05AAT1G
NCP380LSN10AAT1G
NCP380LMUAJAATBG
NCV380LMUAJAATBG*
NCP380LMU05AATBG
NCP380LMU10AATBG
NCP380LMU15AATBG
NCV380LMU15AATBG*
NCP380LMU20AATBG
NCP380HSNAJAAT1G
AC5
AC6
AAC
AN
0.5 A
1.0 A
Adj.
NCP380LSN05AGEVB
NCP380LSN10AGEVB
NCP380LMUAJAGEVB
NCP380LMUAJAGEVB
NCP380LMU05AGEVB
NCP380LMU10AGEVB
NCP380LMU15AGEVB
NCP380LMU15AGEVB
NCP380LMU20AGEVB
NCP380HSNAJAGEVB
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
TSOP−5
(Pb−Free)
Adj.
Low
AE
0.5 A
1.0 A
1.5 A
1.5 A
2.0 A
Adj.
UDFN6
(Pb−Free)
AF
AG
AQ
AL
3,000
Tape / Reel
AAD
TSOP−6
(Pb−Free)
NCP380HSN05AAT1G
NCP380HSN10AAT1G
NCP380HMUAJAATBG
NCV380HMUAJAATBG*
NCP380HMU05AATBG
NCP380HMU10AATBG
NCP380HMU15AATBG
NCP380HMU20AATBG
NCP380HMU21AATBG
AC7
ADA
AC
AP
0.5 A
1.0 A
Adj.
NCP380HSN05AGEVB
NCP380HSN10AGEVB
NCP380HMUAJAGEVB
NCP380HMUAJAGEVB
NCP380HMU05AGEVB
NCP380HMU10AGEVB
NCP380HMU15AGEVB
NCP380HMU20AGEVB
NCP380HMU21AGEVB
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
TSOP−5
(Pb−Free)
Adj.
High
AH
AJ
0.5 A
1.0 A
1.5 A
2.0 A
2.1 A
UDFN6
(Pb−Free)
AK
AM
AU
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements.
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20
NCP380, NCV380
PACKAGE DIMENSIONS
UDFN6 2x2, 0.65P
CASE 517AB
ISSUE C
NOTES:
D
A
B
E
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED
BETWEEN 0.15 AND 0.25MM FROM THE TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE
TERMINALS.
NOTE 5
PIN ONE
REFERENCE
5. TIE BARS MAY BE VISIBLE IN THIS VIEW AND ARE CONNECTED
TO THE THERMAL PAD.
MILLIMETERS
DIM
A
MIN
0.45
0.00
MAX
0.55
0.05
0.10
C
A1
A3
b
0.127 REF
END VIEW
0.10
C
0.25
1.50
0.35
TOP VIEW
D
2.00 BSC
D2
E
1.70
A3
A3
2.00 BSC
EXPOSED Cu
MOLD CMPD
DETAIL B
E2
e
0.80
1.00
0.10
0.08
C
0.65 BSC
L
0.25
---
0.35
0.15
A
L1
A1
C
6X
A1
SEATING
PLANE
DETAIL B
NOTE 4
C
SIDE VIEW
D2
ALTERNATE
CONSTRUCTIONS
DETAIL A
L
L
L
1
3
L1
RECOMMENDED
SOLDERING FOOTPRINT*
DETAIL A
E2
ALTERNATE TERMINAL
CONSTRUCTIONS
PACKAGE
1.70
6X
0.47
OUTLINE
6
4
6X
b
e
M
0.10
0.05
C A B
C
M
BOTTOM VIEW
2.30
0.95
0.65
1
6X
PITCH
0.40
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
21
NCP380, NCV380
PACKAGE DIMENSIONS
TSOP−5
CASE 483−02
ISSUE H
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES
LEAD FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS
OF BASE MATERIAL.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
5. OPTIONAL CONSTRUCTION: AN
ADDITIONAL TRIMMED LEAD IS ALLOWED
IN THIS LOCATION. TRIMMED LEAD NOT TO
EXTEND MORE THAN 0.2 FROM BODY.
NOTE 5
5X
D
0.20 C A B
2X
2X
0.10
T
T
M
5
4
3
0.20
B
S
1
2
K
L
DETAIL Z
G
A
MILLIMETERS
DIM
A
B
MIN
3.00 BSC
1.50 BSC
MAX
DETAIL Z
J
C
0.90
1.10
C
D
G
H
J
K
L
M
S
0.25
0.95 BSC
0.50
SEATING
PLANE
0.05
H
0.01
0.10
0.20
1.25
0
0.10
0.26
0.60
1.55
T
10
3.00
_
_
2.50
SOLDERING FOOTPRINT*
1.9
0.074
0.95
0.037
2.4
0.094
1.0
0.039
0.7
0.028
mm
inches
ǒ
Ǔ
SCALE 10:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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22
NCP380, NCV380
PACKAGE DIMENSIONS
TSOP−6
CASE 318G−02
ISSUE V
NOTES:
D
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
H
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM
LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR
GATE BURRS SHALL NOT EXCEED 0.15 PER SIDE. DIMENSIONS D
AND E1 ARE DETERMINED AT DATUM H.
6
1
5
2
4
L2
GAUGE
PLANE
E1
E
5. PIN ONE INDICATOR MUST BE LOCATED IN THE INDICATED ZONE.
3
L
MILLIMETERS
SEATING
M
C
NOTE 5
DIM
A
A1
b
c
D
E
E1
e
MIN
0.90
0.01
0.25
0.10
2.90
2.50
1.30
0.85
0.20
NOM
1.00
MAX
1.10
0.10
0.50
0.26
3.10
3.00
1.70
1.05
0.60
PLANE
b
DETAIL Z
e
0.06
0.38
0.18
3.00
c
2.75
A
0.05
1.50
0.95
L
0.40
A1
L2
M
0.25 BSC
−
DETAIL Z
0
10
RECOMMENDED
SOLDERING FOOTPRINT*
6X
0.60
6X
0.95
3.20
0.95
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
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For additional information, please contact your local
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NCP380/D
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