NCP45760IMN24RTWG [ONSEMI]
Load Switch, Integrated, ecoSWITCH™ 20 mΩ, 24V, 8 A, Fault Protection;
| 型号： | NCP45760IMN24RTWG |
| 厂家： | 
ONSEMI |
| 描述： | Load Switch, Integrated, ecoSWITCH™ 20 mΩ, 24V, 8 A, Fault Protection 驱动 光电二极管 接口集成电路 |
| 文件： | 总12页 (文件大小：258K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ecoSwitcht
Advanced Load Management
Controlled Load Switch with Reverse
Current Protection and Low RON
NCP45760
www.onsemi.com
The NCP45760 load management device provides a component and
area−reducing solution for efficient power domain switching with
inrush current limit via soft start. This device is designed to integrate
control and driver functionality with back−to−back high performance
low on−resistance power MOSFETs in a single package. This cost
effective solution is ideal for reverse current applications and the
specific power management and disconnect functions used in USB
Type−C and Type−C Power Delivery ports.
R
TYP
V
*DC I
MAX
ON
IN
20 mW
3.0 V − 24 V
8.0 A
*I
is defined as the maximum steady state cur-
MAX
rent the load switch can pass at room ambient tem-
perature without entering thermal lockout. See the
SOA section for more information on transient cur-
rent limitations.
Features
• Advanced Controller with Charge Pump
• Integrated N−Channel MOSFET with Low R
ON
• Soft−Start via Controlled Slew Rate
• Adjustable Slew Rate Control
1
DFN12, 3x3
CASE 506EN
• Fault Detection with Power Good Output
• Thermal Shutdown and Under Voltage Lockout
• Short−Circuit and Adjustable Over−Current Protections
• Reverse−current Protection
MARKING DIAGRAM
760
ALYWG
G
• Input Voltage Range 3 V to 24 V
• Extremely Low Standby Current
• This is a Pb−free, RoHS/REACH Compliant Device
Typical Applications
• USB Type C Power Delivery
• Reverse Current Load Switching Applications
• Servers, Set−Top Boxes and Gateways
• Notebook and Tablet Computers
760 = Specific Device Code
A
L
Y
W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
• Telecom, Networking, Medical and Industrial Equipment
• Hot−Swap Devices and Peripheral Ports
PIN CONFIGURATION
1
2
3
4
5
6
12 PG
SR
NC
VCC
EN
OCP
PG
VIN
11 OCP
13: V
OUT
Thermal
Bandgap
&
Biases
V
SS
V
CC
10
9
V
Control
Logic
OUT
Shutdown,
UVLO, &
OCP
V
IN
14: V
IN
NC
NC
8
EN
Delay and
Slew Rate
Control
7
V
IN
Charge
Pump
(Top View)
ORDERING INFORMATION
VSS
VOUT
SR
Device
NCP45760IMN24RTWG
Package
Shipping
Figure 1. Block Diagram
DFN12
3000 / Tape
& Reel
© Semiconductor Components Industries, LLC, 2018
1
Publication Order Number:
January, 2021 − Rev. 1
NCP45760/D
NCP45760
Table 1. PIN DESCRIPTION
Pin
1
Name
Function
SR
Slew Rate control pin. Slew rate adjustment made with an external capacitor to GND; float if not used.
Source of MOSFET connected to load. – Pin 13 should be used for high current (>0.5 A)
Input voltage (3 V − 24 V) – Pin 14 should be used for high current (>0.5 A)
Active−high digital input used to turn on the MOSFET driver, pin has an internal pull down resistor to GND.
Driver supply voltage (3.0 V − 5.5 V)
3,13
4,7,14
8
V
OUT
V
IN
EN
9
V
CC
10
V
SS
Driver ground
11
OCP
Over−current protection trip point adjustment made with a voltage applied (0 V − 1.2 V), pin has an internal
pull up resistor to EN; short to ground if over−current protection is not needed.
12
PG
Active−high, open−drain output that indicates when the gate of the MOSFET is fully charged, external pull up
resistor ≥ 100 kW to an external voltage source required; tie to GND if not used.
Table 2. ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
Unit
V
Supply Voltage Range
V
CC
−0.3 to 6
−0.3 to 30
−0.3 to 30
Input Voltage Range
V
IN
V
Output Voltage Range
V
OUT
V
EN Input Voltage Range
V
GND−0.3 to (V + 0.3)
V
EN
PG
CC
PG Output Voltage Range (Note 1)
OCP Input Voltage Range
V
−0.3 to 6
−0.3 to 6
28.6
V
V
OCP
V
Thermal Resistance, Junction−to−Ambient, Steady State (Note 2)
R
R
°C/W
°C/W
A
θJA
Thermal Resistance, Junction−to−Case (V Paddle)
1.7
IN
θJC
Continuous MOSFET Current @ T = 25°C (Note 2)
I
8
A
MAX
Total Power Dissipation @ T = 25°C (Note 2)
P
D
3.49
34.9
W
mW/°C
A
Derate above T = 25°C
A
Storage Temperature Range
T
−55 to 150
°C
°C
STG
Lead Temperature, Soldering (10 sec.)
ESD Capability, Human Body Model (Notes 3 and 4)
ESD Capability, Charged Device Model (Notes 3 and 4)
Latch−up Current Immunity (Note 3)
T
260
2
SLD
ESD
ESD
kV
kV
mA
HBM
CDM
0.5
100
LU
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. PG is an open drain output that requires an external pull−up resistor > 100 kW to an external voltage source.
2. Surface−mounted on FR4 board using the minimum recommended pad size, 1 oz Cu.
3. Tested by the following methods @ T = 25°C:
A
ESD Human Body Model tested per JS−001
ESD Charged Device Model per ESD JS−002
Latch−up Current tested per JESD78
PG, OCP, and SR pins must be connected correctly for compliance.
4. Rating is for all pins except for V and V
which are tied to the internal MOSFET’s Drain and Source. Typical MOSFET ESD performance
IN
OUT
for V and V
should be expected and these devices should be treated as ESD sensitive.
IN
OUT
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2
NCP45760
Table 3. OPERATING RANGES
Rating
Symbol
Min
3
Max
5.5
24
Unit
V
VCC
V
CC
VIN
V
IN
3
V
OCP External Resistor to VSS
R
short
open
100
0
kW
mJ
V
OCP
OFF to ON Transition Energy Dissipation Limit (See application section)
E
TRANS
VSS
V
SS
Ambient Temperature
Junction Temperature
T
−40
−40
85
°C
°C
A
T
125
J
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
Table 4. ELECTRICAL CHARACTERISTICS (T = 25°C, V = 3 V − 5.5 V, unless otherwise specified)
J
CC
Parameter
Conditions
Symbol
Min
Typ
20
Max
23
Unit
On−Resistance
V
CC
V
CC
V
CC
V
CC
V
EN
V
EN
V
EN
V
EN
V
EN
= 4.5 V, V = 3 V
R
ON
mW
IN
= 3.3 V, V = 4.5 V
20
23
IN
= 3.3 V, V = 15 V
20
23
IN
= 3.3 V, V = 24 V
20
23
IN
Leakage Current − V to V
(Note 5)
= 0 V, V = 24 V, V = 5.5 V
I
21
100
2.0
300
nA
IN
OUT
IN
CC
LEAK
V
IN
Control Current − V to V
= 0 V, V = 24 V (for typical)
I
0.83
144
1.55
0.35
mA
IN
SS
IN
INCTL
= V , V = 24 V (for typical)
I
INCTL_EN
CC
IN
Supply Standby Current (Note 6)
Supply Dynamic Current (Note 7)
EN Input High Voltage
= 0 V, V = 24 V (for typical)
I
mA
mA
V
IN
STBY
= V , V = 24 V (for typical)
I
DYN
0.5
CC
IN
V
IH
2
EN Input Low Voltage
V
0.8
1
V
IL
EN Input Leakage Current
V
= 0 V
I
R
V
−1.0
0.01
100
0.022
3
mA
kW
V
EN
IL
EN Pull Down Resistance
76
124
0.1
100
130
PD
OL
PG Output Low Voltage
I
= 100 mA
SINK
PG Output Leakage Current
Slew Rate Control Constant (Note 8)
FAULT PROTECTIONS
V
TERM
= 3.3 V
I
nA
mA
OH
K
SR
70
100
Thermal Shutdown Threshold (Note 9)
Thermal Shutdown Hysteresis (Note 9)
T
145
20
°C
°C
V
SDT
T
HYS
V
IN
V
IN
Under Voltage Lockout Threshold
Under Voltage Lockout Hysteresis
V
rising
V
UVLO
2
IN
V
HYS
200
0.853
2.9
5.5
8
mV
A
Over−Current Protection Trip
R
R
R
R
= open
I
0.55
1.15
OCP
OCP
OCP
OCP
TRIP
= 100 kW
= 32 kW
= short to GND (Note 10)
Over−Current Protection Blanking Time
Short−Circuit Protection Trip Current
t
2.25
12.5
ms
A
OCP
Soft & Hard Short (Note 11)
with MOSFET turned off.
OUT
I
SC
5. Average current from V to V
IN
6. Average current from V to GND with MOSFET turned off.
CC
7. Average current from V to GND after charge up time of MOSFET.
CC
8. See Applications Information section for details on how to adjust the gate slew rate.
9. Operation above T = 125°C is not guaranteed.
J
10.Transient currents exceeding the short−circuit protection trip current will cause the device to fault. For OCP setting less than 20 kW, high
steady state current may cause an over temperature lockout before the OCP threshold is reached due to self−heating.
11. Short Circuit Protection protects the device against hard shorts (R
≤ 250 mW V
to Ground) for V < 18 V, and against soft shorts
OUT IN
SHORT
(R
> 250 mW) for V < 24V. Short circuit protection testing assumed a 100 W supply capability limit on V .
SHORT
I
N
I
N
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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3
NCP45760
Table 5. SWITCHING CHARACTERISTICS (T = 25°C unless otherwise specified) (Notes 12 and 13)
J
Parameter
Conditions
= 4.5 V; V = 3 V
Symbol
Min
13
Typ
21.0
21.0
22.8
23.0
175
165
185
175
60
Max
28
Unit
Output Slew Rate − Default
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
SR
V/ms
IN
= 5.0 V; V = 3 V
13
28
IN
= 3.3 V; V = 24 V
13
28
IN
= 5.0 V; V = 24 V
13
28
IN
Output Turn−on Delay
= 4.5 V; V = 3 V
T
ON
700
700
700
700
ms
ms
IN
= 5.0 V; V = 3 V
IN
= 3.3 V; V = 24 V
IN
= 5.0 V; V = 24 V
IN
Output Turn−off Delay
= 4.5 V; V = 3 V
T
OFF
IN
= 5.0 V; V = 3 V
60
IN
= 3.3 V; V = 24 V
40
IN
= 5.0 V; V = 24 V
40
IN
Power Good Turn−on Time
Power Good Turn−off Time (Note 14)
= 4.5 V; V = 3 V
T
0.25
0.25
0.25
0.25
0.436
0.428
0.460
0.451
2.5
2.5
2.5
2.5
10
ms
ns
IN
PG,ON
= 5.0 V; V = 3 V
IN
= 3.3 V; V = 24 V
IN
= 5.0 V; V = 24 V
IN
= 4.5 V; V = 3 V
T
PG,OFF
IN
= 5.0 V; V = 3 V
10
IN
= 3.3 V; V = 24 V
10
IN
= 5.0 V; V = 24 V
10
IN
12.See below figure for Test Circuit and Timing Diagram.
13.Tested with the following conditions: V = V ; R = 100 kW; R = 10 W; C = 0.1 mF.
TERM
CC
PG
L
L
14.PG Turn−off time is dependent on external pull up resistor and capacitive loading. Tested with 100 kW pull up to 3.3 V.
VIN
VOUT
VCC
EN
OCP
NCP45760
VSS
RL
CL
OFF ON
PG
SR
50%
50%
TON
VEN
Dt
TOFF
90%
90%
DV
Dt
DV
SR=
10%
VOUT
TPG,ON
TPG,OFF
50%
50%
VPG
Figure 2. Switching Characteristics Test Circuit and Timing Diagrams
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4
NCP45760
TYPICAL CHARACTERISTICS
21.0
20.9
20.8
20.7
35
30
25
20
15
10
20.6
20.5
5
0
0
2
0
2
4
6
8
10 12 14 16 18 20 22 24 26
Vin (V)
−80 −60 −40 −20
0
20 40 60 80 100 120 140
TEMPERATURE (°C)
Figure 3. On−Resistance vs. Input Voltage
Figure 4. On−Resistance vs. Temperature
1.7
1.5
1.3
1.1
0.9
2.4
2.0
V
CC
= 5.5 V
V
V
= 5.0 V
= 4.5 V
CC
V
V
= 5.5 V
= 3.0 V
1.6
1.2
0.8
CC
CC
CC
0.7
0.5
0.4
0
V
CC
= 3.3 V
4
6
8
10 12 14 16 18 20 22 24
(V)
−80 −60 −40 −20
0
20 40 60 80 100 120 140 160
V
IN
TEMPERATURE (°C)
Figure 5. Supply Standby Current vs. VIN
Voltage
Figure 6. Supply Standby Current vs.
Temperature
370
360
450
400
V
V
= 5.5 V
= 3.0 V
CC
350
340
330
320
310
300
V
CC
= 5.5 V
350
300
250
200
150
100
V
V
= 5.0 V
= 4.5 V
CC
CC
CC
V
CC
= 3.0 V
290
280
270
260
250
240
50
0
2
4
6
8
10 12 14 16 18 20 22 24 26
(V)
−80 −60 −40 −20
0
20 40 60 80 100 120 140 160
V
IN
TEMPERATURE (°C)
Figure 7. Dynamic Current vs. Input Voltage
Figure 8. Supply Dynamic Current vs.
Temperature
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5
NCP45760
TYPICAL CHARACTERISTICS
15
14
16
14
12
10
8
13
12
11
10
9
V
IN
= 24 V
V
CC
= 3.0 V
8
7
6
5
6
4
3
4
V
= 3.0 V
IN
2
1
0
2
0
0
2
4
6
8
10 12 14 16 18 20 22 24 26
(V)
−80 −20 −40 −20
0
20 40 60
80 100 120
V
IN
TEMPERATURE (°C)
Figure 9. Input to Output Leakage vs. Input
Voltage
Figure 10. Input to Output Leakage vs.
Temperature
1.2
1.0
0.8
0.6
0.4
180
160
140
120
100
80
V
= 24 V
= 3.0 V
IN
V
IN
= 24 V
V
IN
60
40
0.2
0
V
= 3.0 V
20
0
IN
−80 −60 −40 −20
0
20 40 60 80 100 120
−80 −60 −40 −20
0
20 40 60
80 100 120
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 11. Vin Controller Current vs.
Temperature (EN=0)
Figure 12. Vin Controller Current vs.
Temperature (EN=HIGH)
0.186
0.184
0.182
0.180
0.178
0.176
0.174
0.172
0.170
500
450
400
350
300
250
V
= 24 V
IN
200
150
100
V
V
= 4.5 V
= 3.0 V
IN
IN
50
0
0.168
0.166
0
2
4
6
8
10 12 14 16 18 20 22 24 26
(V)
−80 −60 −40 −20
0
20 40 60
80 100 120
V
IN
TEMPERATURE (°C)
Figure 13. Output Turn−On Delay vs. Input
Figure 14. Output Turn−On Delay vs.
Voltage
Temperature
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6
NCP45760
TYPICAL CHARACTERISTICS
1.75
1.50
1800
1600
1400
1200
V
= 24 V
IN
V
CC
= 3.0 V
1.25
1.00
V
CC
= 5.5 V
1000
800
600
400
0.75
0.50
V
IN
= 3.0 V
0.25
0
200
0
0
2
4
6
8
10 12 14 16 18 20 22 24 26
(V)
−80 −60 −40 −20
0
20 40 60 80 100 120 140
V
IN
TEMPERATURE (°C)
Figure 15. Power Good Turn−On Time vs.
Figure 16. Power Good Turn−On vs.
Input Voltage
Temperature
23.0
22.5
22.0
21.5
11.2
11.0
V
CC
= 5.5 V
V
CC
= 5.5 V
10.8
10.6
10.4
10.2
V
CC
= 3.0 V
V
CC
= 3.0 V
21.0
20.5
10.0
9.8
0
2
4
6
8
10 12 14 16 18 20 22 24 26
(V)
0
2
4
6
8
10 12 14 16 18 20 22 24 26
(V)
V
IN
V
IN
Figure 17. Default Slew Rate vs. Input Voltage
Figure 18. Slew Rate vs. Input Voltage
(10 nF on SR pin to GND)
115
110
105
100
1.00
0.95
0.90
0.85
0.80
V
V
= 3.0 V
= 3.3 V
CC
CC
95
90
V
= 4.5 V
= 5.5 V
CC
CC
V
0.75
0.70
85
80
0
2
4
6
8
10 12 14 16 18 20 22 24 26
(V)
−80 −60 −40 −20
0
20 40 60 80 100 120 140 160
TEMPERATURE (°C)
V
IN
Figure 19. KSR vs. Temperature
Figure 20. OCP Trip Current vs. Input Voltage
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NCP45760
TYPICAL CHARACTERISTICS
1.4
1.2
1.0
0.8
0.6
0.4
2.10
2.05
V
Ascending
IN
V
V
= 5.5 V
= 3.0 V
2.00
1.95
1.90
1.85
CC
CC
V
Decending
IN
1.80
1.75
0.2
0
−80 −60 −40 −20
0
20 40 60 80 100 120 140 160
−80 −60 −40 −20
0
20 40 60 80 100 120 140
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 21. OCP Trip Current vs. Temperature
Figure 22. UVLO Trip Voltage vs. Temperature
0.1
1.4
1.2
1.0
0.8
0.6
0.4
0.01
V
CC
= 5.5 V
0.001
V
CC
= 3.0 V
0.0001
0.2
0
0.00001
0
10
20
30
40
50
60
70
80
90
−80 −60 −40 −20
0
20 40 60 80 100 120 140 160
CURRENT (A)
TEMPERATURE (°C)
Figure 23. Safe Operating Area VIN to VOUT
Transient
Figure 24. OCP Trip Current vs. Temperature
(OCP = OPEN)
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NCP45760
APPLICATIONS INFORMATION
NCP45760 OCP Trip current per R_OCP Resistance
Enable Control
12
10
8
The NCP45760 part enables the MOSFET in an
active−high configuration. When the EN pin is at a logic
high level and the V supply pin has an adequate voltage
CC
Upper Limit
Lower Limit
applied, the MOSFET will be enabled. When the EN pin is
at a logic low level, the MOSFET will be disabled. An
internal pull down resistor to ground on the EN pin ensures
that the MOSFET will be disabled when not driven.
Typical
6
4
Short−Circuit Protection
The NCP45760 device is equipped with a short−circuit
protection that helps protect the part and the system from a
2
0
sudden high−current event, such as the output, V
hard−shorted to ground.
, being
OUT
0
20
40
60
80 100 120 140 160 180 200
Once active, the circuitry monitors the voltage difference
between the V pin and the V pin. When the difference
R_OCP (kW)
IN
OUT
Figure 25. OCP Trip Current Setting
is equal to the short−circuit protection threshold voltage, the
MOSFET is turned off. The part remains off and is latched
Thermal Shutdown
in the Fault state until EN is toggled or V supply voltage
CC
The thermal shutdown of the NCP45760 device protects
the part from internally or externally generated excessive
temperatures. This circuitry is disabled when EN is not
active to reduce standby current. When an over−temperature
condition is detected, the MOSFET is turned off.
The part comes out of thermal shutdown when the
junction temperature decreases to a safe operating
temperature as dictated by the thermal hysteresis. Upon
exiting a thermal shutdown state, and if EN remains active,
the MOSFET will be turned on in a controlled fashion with
the normal output turn−on delay and slew rate.
is cycled, at which point the MOSFET will be turned on in
a controlled fashion with the normal output turn−on delay
and slew rate.
The short circuit protection feature protects the device
from hard shorts (R
< 250 mW V to GND) for V
OUT IN
SHORT
≤ 18 V. Hard short circuit testing used a 10 mW short to
ground for this scenario. The short circuit protection
circuitry remains active regardless of the EN state to protect
against enabling into a short circuit.
Over−Current Protection
The NCP45760 device is equipped with an over−current
protection (OCP) that helps protect the part and the system
from a high current event which exceeds the expected
operational current (e.g., a soft short).
Under Voltage Lockout
The under voltage lockout of the NCP45760 device turns
the MOSFET off and activates the load bleed when the input
voltage, V , drops below the under voltage lockout
IN
In the event that the current from the V pin to the V
IN
OUT
threshold. This circuitry is disabled when EN is not active to
reduce standby current.
pin exceeds the OCP threshold for longer than the blanking
time, the MOSFET will shut down and the PG pin is driven
low. Like the short−circuit protection, the part remains
If the V voltage rises above the under voltage lockout
IN
threshold, and EN remains active, the MOSFET will be
turned on in a controlled fashion with the normal output
turn−on delay and slew rate.
latched in the Fault state until EN is toggled or V supply
CC
voltage is cycled, at which point the MOSFET will be turned
on in a controlled fashion with the normal output turn−on
delay and slew rate.
Power Good
The over−current trip point is determined by the resistance
between the OCP pin and ground. If no over−current
protection is needed, then the OCP pin should be tied to
GND; if the OCP protection is disabled in this way, the
short−circuit protection will still remain active.
The NCP45760 device has a power good output (PG) that
can be used to indicate when the gate of the MOSFET is fully
charged. The PG pin is an active−high, open−drain output
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NCP45760
that requires an external pull up resistor, RPG, greater than
or equal to 100 kW to an external voltage.
to the low R . When the EN signal is asserted high, the load
ON
switch transitions from an OFF state to an ON state. During
The power good output can be used as the enable signal for
other active−high devices in the system. This allows for
guaranteed by design power sequencing and reduces the
number of enable signals needed from the system controller.
If the power good feature is not used in the application, the
PG pin should be tied to GND.
this time, the resistance from V to V
transitions from
IN
OUT
high impedance to R , and additional energy is dissipated
ON
in the device for a short period of time. The worst case
energy dissipated during the OFF to ON transition can be
approximated by the following equation:
ǒ
Ǔ @ dt
E + 0.5 @ VIN @ IINRUSH ) 0.8 @ ILOAD
(eq. 3)
Slew Rate Control
Where V is the voltage on the V pin, I is the
INRUSH
IN
IN
The NCP45760 device is equipped with controlled output
slew rate which provides soft start functionality. This limits
the inrush current caused by capacitor charging and enables
these devices to be used in hot swapping applications.
The slew rate can be decreased with an external capacitor
added between the SR pin and ground. With an external
capacitor present, the slew rate can be determined by the
following equation:
inrush current caused by capacitive loading on V
, and dt
OUT
is the time it takes V
to rise from 0 V to V . I
can
OUT
IN INRUSH
be calculated using the following equation:
dv
dt
IINRUSH
+
@ CL
(eq. 4)
Where dv/dt is the programmed slew rate, and C is the
L
capacitive loading on V . To prevent thermal lockout or
OUT
damage to the device, the energy dissipated during the OFF
KSR
CSR
(eq. 1)
to ON transition should be limited to E
operating ranges table.
listed in
Slew Rate +
[Vńs]
TRANS
where K is the specified slew rate control constant, found
SR
ecoSWITCH LAYOUT GUIDELINES
Electrical Layout Considerations
Correct physical PCB layout is important for proper low
noise accurate operation of all ecoSWITCH products.
on page 3, and C is the capacitor added between the SR pin
SR
and ground. Note that the slew rate of the device will always
be the lower of the default slew rate and the adjusted slew
rate. Therefore, if the C is not large enough to decrease the
SR
slew rate more than the specified default value, the slew rate
of the device will be the default value.
Power Planes: The ecoSWITCH is optimized for extremely
low Ron resistance, however, improper PCB layout can
substantially increase source to load series resistance by
adding PCB board parasitic resistance. Solid connections to
the VIN and VOUT pins of the ecoSWITCH to copper
planes should be used to achieve low series resistance and
good thermal dissipation. The ecoSWITCH requires ample
heat dissipation for correct thermal lockout operation. The
internal FET dissipates load condition dependent amounts
of power in the milliseconds following the rising edge of
enable, and providing good thermal conduction from the
packaging to the board is critical. Direct coupling of VIN to
VOUT should be avoided, as this will adversely affect slew
rates.
Capacitive Load
The peak in−rush current associated with the initial
charging of the application load capacitance needs to stay
below the specified I . C (capacitive load) should be less
max
L
then C
as defined by the following equation:
max
Imax
SRtyp
(eq. 2)
Cmax
+
Where I
is the maximum load current, and SR is the
typ
max
typical default slew rate when no external load capacitor is
added to the SR pin.
OFF to ON Transition Energy Dissipation
The energy dissipation due to load current traveling from
V
IN
to V
is very low during steady state operation due
OUT
ecoSwitch is a trademark of Semiconductor Component Industries, LLC (SCILLC)
www.onsemi.com
10
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DFN12 3x3, 0.5P
CASE 506EN
ISSUE O
DATE 27 SEP 2018
GENERIC
MARKING DIAGRAM*
XXXX = Specific Device Code
A
L
= Assembly Location
= Wafer Lot
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
XXXXX
XXXXX
ALYWG
G
Y
W
G
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON98579G
DFN12 3x3, 0.5P
PAGE 1 OF 1
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