NCP4672 [ONSEMI]
Dual Linear Voltage Regulators with Vin and Vout Voltage Detector; 双路线性稳压器与VIN和VOUT电压检测器
| 型号： | NCP4672 |
| 厂家： | 
ONSEMI |
| 描述： | Dual Linear Voltage Regulators with Vin and Vout Voltage Detector |
| 文件： | 总8页 (文件大小：67K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NCP4672
Dual Linear Voltage
Regulators with Vin and Vout
Voltage Detector
The NCP4672 is a dual linear voltage regulator with input voltage
and output voltage detectors. This part is useful in systems where
multiple voltages are required such as for core and I/O. The NCP4672
is very accurate at 2% over full input voltage and full load current. The
NCP4672 eliminates the need for external voltage supervision due to
the two built in voltage detectors. The voltage detector on the input is
set to 7.0 V. The output voltage detector is for channel 1 and is set to
2.9 V. An external capacitor is used to set the duration of this reset
signal. Other features include short circuit protection and thermal
shutdown protection. The NCP4672 has been designed to work with a
4.7 mF output capacitor having an ESR between 0.1 W and 5.0 W.
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MARKING
DIAGRAM
8
SOIC−8
NB SUFFIX
CASE 751
4672G
ALYW
8
1
1
Features
4672G = Specific Device Code
• Accuracy: 2% at Full Voltage and Load
• Excellent Ripple Rejection: 70 dB @ 1 kHz
• Voltage Detector for Input Voltage
• Voltage Detector for Output Voltage
• Programmable Delay of Reset Signal
• Thermal Short Circuit Protection
• This is a Pb−Free Device
A
L
YW
= Assembly Location
= Wafer Lot
= Date Code
PIN CONFIGURATION
V
out1
V
in
Rst
Rst
1
2
3
4
8
7
6
5
V
out
GND1
GND2
Typical Application
C
D
• Small Core and I/O Power
• Consumer Equipment
• Measurement Equipment
• Industrial Equipment
V
in
V
out2
(Top View)
V
in
RST
ORDERING INFORMATION
10 KW
V
in
V
V
Rst
V
V
out1
in
out1
†
Device
Package
Shipping
C
GND1
GND2
Rst
out2
4.7 mF
out
NCP4672DR2G
SOIC−8
(Pb−Free)
2500 Tape & Reel
C
D
10 nF
V
out2
V
out2
V
in
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
V
in
C
C
out2
4.7 mF
in
0.1 mF
Figure 1. Typical Application Circuit
Semiconductor Components Industries, LLC, 2004
1
Publication Order Number:
February, 2004 − Rev. 4
NCP4672/D
NCP4672
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
V
Input Voltage
V
inmax
−0.3 ~ 18
Output Voltage
V
out
−0.3 to V + 0.3
V
in
Output Current 1
Output Current 2
I
I
30
80
mA
mA
out1max
out2max
Output Short Circuit Duration
−
Infinite
−
Power Dissipation and Thermal Characteristics − SOIC−8
Power Dissipation
P
Internally Limited
W
D
Thermal Resistance, Junction−to−Ambient
Minimum Pad Size
R
q
JA
190
160
25
°C/W
°C/W
°C/W
2
200 mm Pad Size (Note 1)
Thermal Resistance, Junction−to−Case
R
q
JC
Operating Junction Temperature Range
Storage Temperature Range
T
−40 to 125
−55 to 150
°C
°C
stg
T
solder
1. Refer to Figure 4 for more information.
PIN DESCRIPTION
Pin
Number
Symbol
Description
1
V
in RST
Open−collector, active−low output of the input voltage detector with hysteresis. Threshold levels are
typical 7.0 V/ 7.35 V at V pin.
CC
2
3
V
Active−low output of the reset generator. Reset generator is based on sensing of the V
voltage.
o RST
out1
Sensing is with hysteresis − threshold levels are typically 2.9 V/ 2.95 V at V
. Reset is generated at
out1
rising edge of the V
and it’s duration is set by external capacitor connected to C pin.
out1
D
C
Programmable delay of the reset generator. Delay is adjusted by inserting a capacitor between C and
GND (typically 10 ms for 10 nF capacitor).
D
D
4
5
6
7
8
V
CC
Supply Voltage
V
out2
1.8 V/ 80 mA LDO Regulator Output
GND2
Ground for V
(internally connected with GND1)
(internally connected with GND2)
out2
out1
GND1
Ground for V
V
out1
3.5 V/30 mA LDO Regulator Output
Recommended Conditions (T = 25°C, C = 0.1 mF Ceramic, C = 4.7 mF)
A
in
out
Characteristics
Symbol
Min
Typ
Max
Unit
V
Input Voltage
Output Current (where V remains within accuracy)
V
in
3.8
12
16
I
I
0
0
−
−
20
70
mA
out
out1
out2
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2
NCP4672
V
in
V
out1
V
ref
2.9 V
7.0 V
V
In RST
−
+
V
o RST
−
+
−
+
V
ref
+
−
C
D
V
ref
V
ref
Thermal
Shutdown
V
out2
+
−
V
ref
Thermal
Shutdown
GND1
GND2
Figure 1.
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3
NCP4672
ELECTRICAL CHARACTERISTICS (C = 0.1 mF Ceramic, C = 4.7 mF with ESR = 0.1 − 5.0 W, V = 12 V, T = 25°C)
in
out
in
A
Characteristics
Symbol
Min
Typ
Max
Unit
Output Voltage
(V = 4.5 V, I
V
adj
V
V
= 20 mA)
= 40 mA)
3.43
1.764
3.5
1.8
3.57
1.836
out1
in
out1
out2
V
out2
(V = 4.5 V, I
in
Line Regulation
(V = 4.5 V , I
Reg
mV
mV
line
V
out1
= 20 mA)
−
−
3.0
3.0
30
30
in
out1
V
out2
(V = 4.5 V to 10 V, I
in
= 40 mA)
out2
Load Regulation
(V = 4.5 V, I
Reg
load
V
= 0.1 mA to 20 mA)
= 0.1 mA to 70 mA)
−
−
3.0
2.0
40
40
out1
in
out1
out2
V
out2
(V = 4.5 V, I
in
Dropout Voltage
(V = 3.3 V, I
V
in
− V
mV
mA
out1
V
= 20 mA)
−
150
300
out1
in
out1
Ground Pin Current
I
GND
(V = 8.0 V, I
(V = 2.7 V, I
in
= I
= I
= 0 mA)
= 0 mA, Rpu = infinite)
−
−
1.0
3.0
2.0
−
in
out1
out1
out2
out2
Short Current Limit
I
mA
SC
V
out1
30
80
60
150
−
−
V
out2
Thermal Shutdown
Temperature Coefficient
−
165
−
°C
T
C
ppm/°C
V
out1
(T = −30 to 85°C, V = 4.5 V, I
(T = −30 to 85°C, V = 4.5 V, I
= 20 mA)
= 40 mA)
−
−
100
100
−
−
J
in
out1
out2
V
out2
J
in
Ripple Rejection (Note 6)
R
dB
R
V
out1
(V = 4.5 V, V
= 1.0 V, I
= 1.0 V, I
= 20 mA, 120 Hz)
= 40 mA, 120 Hz)
−
−
65
70
−
−
in
ripple
(V = 4.5 V, V
in ripple
out1
out2
V
out2
Output Noise Voltage
(V = 4.5 V, f = 20 Hz − 80 kHz, I
V
n
mV
rms
V
out1
= 20 mA)
= 40 mA)
−
−
80
50
−
−
in
out1
out2
V
out2
(V = 4.5 V, f = 20 Hz − 80 kHz, I
in
V
in
Detect
Detecting Voltage L (V = H to L)
V
6.72
−
7.0
7.35
350
100
7.28
−
V
in
SLin
Detecting Voltage H (V = L to H)
V
SHin
V
in
Hysteresis Voltage (V = H to L to H)
D V
140
−
560
−
mV
in
Sin
V
SLin
Temperature Coefficient (T = −30°C to +85°C)
V
Slin
T
C
ppm/°C
J
Low−Level Output Voltage (V = 6.0 V, Vt1 = 5.0 V, Rt1 = 10 kW) (Note 5)
V
V
−
−
100
−
200
0.4
mV
V
in
OLin1
Threshold Operating Voltage (V
= Vt1 = 1.0 V)
OPLin
OLin2
V
out
Detect
Detecting Voltage L (V = H to L)
V
2.78
−
2.9
2.95
50
3.020
−
V
V
in
SLout
Detecting Voltage H (V = L to H)
V
SHout
in
Hysteresis Voltage (V = H to L to H)
D V
25
−
100
−
mV
in
Sout
V
SLin
Temperature Coefficient (T = −30°C to +85°C)
V
SLin
T
C
100
ppm/°C
J
Low−Level Output Voltage (V
= 2.6 V)
V
V
−
−
100
−
200
0.4
mV
V
out1
OLout1
Threshold Operating Voltage (V
= 0.85 V)
OPLout
OLout2
Reset Delay Time (C = 10 nF)
t
t
5
−
10
30
15
90
ms
D
PLH
“L” Transmission Delay Time (C = 10 nF)
ms
D
PHL
2. This device series contains ESD protection and exceeds the following tests:
Human Body Model 2000 V per MIL−STD−883, Method 3015
Machine Model Method 200 V.
T
* T
A
qJA
J(max)
3. The maximum package power dissipation is: P
+
D
R
4. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
5. Refer to Figure 3.
6. Guaranteed by design.
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4
NCP4672
V
SHin
DV
Sin
V
SLin
V
Vi
*
OPLin
V
OPLin
*
(Pin4)
V
in RST
(Pin1)
DV
V
SLout
Sout
V
SHout
V
(Pin8)
out1
V
*
OPLout
V
*
OPLout
V
o RST
(Pin2)
t
PHL
t
PLH
t
PLH
*; V
shows theoretical on this chart.
*; V
shows theoretical on this chart.
OPLin
OPLout
V
OPLin
spec. must be specified on Pin 1 voltage (0.4 V)
V
spec. must be specified on Pin 2 voltage (0.4 V)
OPLout
Figure 2. Dual Regulator Timing
V
in RST
1
10 kW
V
OPLin
= 1.0 V
typ
V
OLin
= 0.4 V
V
in
4
+
−
Vt1
V
= 5.0 V
= 16 V
7.0 V
typ
+
−
V
max
GND1
7
Figure 3. Threshold Operating Voltage VOPLin Under Condition VOLin = 0.4 V
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5
NCP4672
200.0
180.0
160.0
140.0
120.0
100.0
80.0
0
100
200
300
400
500
600
2
COPPER AREA 1 oz (mm )
Figure 4. SOP−8 Thermal Resistance versus
P.C.B. Copper Area
1.6
1.4
1.2
1.0
4.0
3.5
3.0
2.5
2.0
1.5
1.0
V
out1
V
out2
0.8
0.6
0.4
0.2
0
0.5
0
0
2
4
6
8
10
12
14
16
0
20
40
60
, OUTPUT CURRENT (mA)
out
80
100
120
140 160
V , INPUT VOLTAGE (V)
I
in
Figure 5. Quiescent Current versus Input
Voltage
Figure 6. Peak Current Limit
1000
100
10
1
0.001
0.01
0.1
1
C , CAPACITANCE (mF)
D
Figure 7. Delay Time versus Capacitance
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6
NCP4672
10
8
4
R
= 10 kW
PU
3
2
V
o
V
o RST
6
V
in
4
C
= 10 nF
D
V
in RST
1
0
2
0
0
5
10
15
20
25
30
35
40
0
2
4
6
8
10
12 14 16 18 20
TIME (ms)
TIME (ms)
Figure 8. Vin and Vin RST versus Time
Figure 9. Vo and Vo RST versus Time
80
70
80
70
60
50
40
30
20
60
50
40
30
20
V
= 12 V
= 3.5 V
= 10 mA
in
V
in
= 12 V
V
out1
V
out2
= 1.8 V
I
out1
I
= 10 mA
out2
C
= 4.7 mF
out1
C
= 4.7 mF
out2
10
0
10
0
0.01
0.1
1
10
100
0.01
0.1
1
10
100
FREQUENCY (kHz)
FREQUENCY (kHz)
Figure 10. Vout1 Ripple Rejection
Figure 11. Vout2 Ripple Rejection
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7
NCP4672
PACKAGE DIMENSIONS
SOIC−8
NB SUFFIX
CASE 751−07
ISSUE AB
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
−X−
A
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
8
5
4
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
S
M
M
B
0.25 (0.010)
Y
1
K
−Y−
G
MILLIMETERS
DIM MIN MAX
INCHES
MIN
MAX
0.197
0.157
0.069
0.020
A
B
C
D
G
H
J
K
M
N
S
4.80
3.80
1.35
0.33
5.00 0.189
4.00 0.150
1.75 0.053
0.51 0.013
C
N X 45
_
SEATING
PLANE
−Z−
1.27 BSC
0.050 BSC
0.10 (0.004)
0.10
0.19
0.40
0
0.25 0.004
0.25 0.007
1.27 0.016
0.010
0.010
0.050
8
0.020
0.244
M
J
H
D
8
0
_
_
_
_
0.25
5.80
0.50 0.010
6.20 0.228
M
S
S
X
0.25 (0.010)
Z
Y
SOLDERING FOOTPRINT*
1.52
0.060
7.0
0.275
4.0
0.155
0.6
0.024
1.270
0.050
mm
inches
ǒ
Ǔ
SCALE 6:1
SOIC−8
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
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PUBLICATION ORDERING INFORMATION
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For additional information, please contact your
local Sales Representative.
NCP4672/D
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