NCP5008_06_技术文档

NCP5008, NCP5009

Backlight LED Boost Driver

The NCP5008/NCP5009 is a high efficiency boost converter

operating in current loop control mode to drive Light Emitting

Diode. The current mode regulation allows a uniform brightness of

the LEDs.

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Features

• 2.7 to 6.0 V Input Voltage Range

MARKING

DIAGRAM

• Output Voltage from V to 15 V

bat

• 3.0 mA Quiescent Supply Current

• Automatically LEDs Current Matching

• No External Sense Resistor

Micro 10

DM SUFFIX

CASE 846B

5Tx

AYW G

G

• Includes Dimming Function

1

• Programmable or Automatic Current Output Mode

• LOCAL or REMOTE Control Facility

• Photo Transistor Sense Feedback Input

• Inductor Based Converter brings High Efficiency

• Low Noise DC/DC Converter

• All Pins are Fully ESD Protected

• Pb−Free Package is Available

5Tx = Device Number

x = 8 or 9

A

Y

W

G

= Assembly Location

= Year

= Work Week

= Pb−Free Package

(Note: Microdot may be in either location)

PIN CONNECTIONS

Typical Applications

• LED Display Back Light Control

• High Efficiency Step Up Converter

I

1

2

3

4

5

10

9

V

bat

ref

NC

CS

L1

V

bat

8

L2 Iout

GND

VBIAS

CLOCK

7

C1

6

LOCAL

U1

R1

30 k

1

2

10

9

10 mF/6.3 V

NCP5008

I

V

bat

ref

GND

PHOTO

L1

GND

Q1

I

1

2

3

4

5

10

9

V

ref

bat

Photo

CS

L1

8

L2 Iout

GND

V

bat

22 mH

NPN−PHOTO

VBIAS

CLOCK

7

GND

6

LOCAL

Vcc

D5 MBR0520

GND

4

3

5

8

7

6

NCP5009

VBIAS

CS

L2

GND

CLK

LOCAL

ORDERING INFORMATION

NCP5009

D2

†

Device

Package

Shipping

D1

LED

D3

D4

LED

NCP5008DMR2

Micro 10

4000 / Tape & Reel

LED

Micro 10

NCP5008DMR2G

GND

C2

(Pb−Free)

4000 / Tape & Reel

NCP5009DMR2

Micro 10

2.2 mF/16 V

GND

†For information on tape and reel specifications,

including part orientation and tape sizes, please

refer to our Tape and Reel Packaging Specifications

Brochure, BRD8011/D.

Figure 1. Typical Battery Powered LED Boost Driver

©

Semiconductor Components Industries, LLC, 2006

1

Publication Order Number:

April, 2006 − Rev. 7

NCP5008/D

NCP5008, NCP5009

BACK LIGHT WHITE LED CURRENT DRIVE CONTROLLER

V

bat

V

bat

V

bat

10

BandGap

POR

VBIAS

CLK

4

5

Iout Reference

Isense

L1

9

V

bat

+

A=10

CS

3

GND

V

bat

V

bat

Q2

V

bat

POR

Iout

L2

8

7

Q1

LOCAL

6

CONTROLLER

I

1

2

ref

GND

PHOTO

GND

(See Note)

V

bat

V

bat

+

V

bat

_OK

BANDGAP

REFERENCE

BandGap

−

GND

NOTE: This functionality is NOT implemented on the NCP5008 type.

Figure 2. Block Diagram

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2

NCP5008, NCP5009

PIN FUNCTION DESCRIPTION

Symbol

Type

Description

1

I

ref

INPUT

This pin provides the output current range adjustment by means of a resistor connected to

ground. The current output tolerance depends upon the accuracy of this resistor. Using a "1%

metal film resistor, or better, yields the best output current accuracy.

2

3

PHOTO

SIGNAL

INPUT

This pin provides an access to the output current control loop for the NCP5009 version. The cur-

rent sunk to ground from this pin is subtracted from the output current mirror. Primary use is the

ambient light automatic adjustment by means of an external photo transistor connected across

this pin and ground. The output current decreases as the ambient light increases. The internal

circuit provides a 1/1 current ratio with the I defined by the resistor connected from pin 1 to

ref

ground. This current shall be limited to 65 mA.

This functionality is NOT implemented on the NCP5008 type.

CS

Negative going Chip Select logic input. This pin is used to select the NCP5008/ NCP5009 and

validate the clock/data when CS = Low. The internal shift register is automatically clear to zero

upon the falling edge, thanks to a 20 ns built−in one shoot. The built−in pull−up resistor disables

the device when the CS pin is left open.

4

5

VBIAS

POWER

INPUT

This pin should be connected to V

.

bat

CLOCK

The clock signal connected to this pin is used to serially shift right the internal preset high logic

level. The clock is valid between the falling edge and until the rising edge of the CS. There is nei-

ther a feedback nor an overflow control. If the clock count exceeds 8 bits, the internal register is

clear, the output current is forced to zero and the device comes back to the shutdown mode.

6

LOCAL

INPUT

This pin is used to select the mode of operation.

•

When LOCAL = High or Open, the chip is controlled by two digital lines:CS and CLOCK. The

output current is programmed by the logic control of these pins, allowing a current adjustment

within the range defined by the I resistor.

ref

When LOCAL = Low, the chip is turned ON /OFF by means of the CS line, the CLOCK pins

being deactivated. The output current is constant, as defined by the I resistor value.

ref

In order to minimize the standby current a dynamic pull−up resistor is activated when POR is

High, this pull−up resistor being disconnected when LOCAL = Low.

7

8

GND

L2

POWER

This pin is the system ground for the NCP5008/NCP5009 and carries both the Power and the

Digital signals. High quality ground must be provided to avoid spikes and/or uncontrolled opera-

tion. Care must be observed to avoid high−density current flow in a limited PCB copper track.

This pin is the power side of the external inductor and must be connected either to the external

Schottky diode (see Figure 22) or directly to one external LED (see Figure 23). It provides the

output current to the load. Since the boost converter operates in a current loop mode, the output

voltage can range up to +15 V but shall not extend this limit. The user must make sure this voltage

will not be exceeded during the normal operation of this part.

An external low cost ceramic capacitor (2.2 mF/16 V, ESR < 100 mW) is recommended to smooth

the current flowing into the diode(s), thus limiting the noise created by the fast transients present

in this circuitry.

Care must be observed to avoid EMI though the PCB copper tracks connected to this pin.

9

L1

POWER

The return side of the external inductor shall be connected to this pin. Typical application will use a

22 mH, size 1210, to handle the 2.8 to 364 mA max range. On the other hand, when the desired

output current is above 20 mA, the inductor shall have an ESR < 1.0 W. The output current toler-

ance can be improved by using a larger inductor value.

10

V

bat

The external voltage supply is connected to this pin. A high quality reservoir capacitor must be

connected across pin 10 and Ground to achieve the specified output voltage parameters. A

10 mF/6.3 V, low ESR capacitor must be connected as close as possible across pin 10 and

ground pin 7. The X5R ceramic types are recommended.

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3

NCP5008, NCP5009

Table 1. Shift Register Bits Assignment and Functions

SetReg shift register (Note: The register content is latched upon CS positive going).

B7

B6

B5

B4

B3

B2

B1

Bn Value After POR

Iout Peak (mA)

0

I

ref

*k*7.5

I

ref

*k*6.5

I

ref

*k*5.5

I

ref

*k*4.5

I

ref

*k*3.5

I

ref

*k*2.5

I *k*1.5

ref

LOCAL

L

CLOCK

CS

H

L

B1−B7

Output Current

X

↓

↑

X

0

L

I

ref

* k

H or Open

H

L

No Change

I

* k * (Bn + 0.5)

ref

L

Q

→ Bn

data

The register is clear to 0 during the first 20 ns following the CS falling edge.

Note:

Coefficient Value (internal ratio): k = 746

Maximum output peak current @ B7 = 1 and Iphoto = 0 mA :Iout peak = I * (7 + 0.5) * 746 = I * 5595

ref

V

R1

ref

1.24 V

R1

I

+

ref

MAXIMUM RATINGS

Rating

Symbol

V , V

bat BIAS

Value

7.0

Unit

V

Power Supply

Output Power Supply Voltage Compliance

V

L2

16

V

Digital Input Voltage

Digital Input Current

CLK, CS

−0.3 tV tV + 3.0 V

V

mA

bat

1.0

Human Body Model: R = 1500 W, C = 100 pF

Machine Model

ESD

"2.0

"200

kV

V

Micro 10 Package

Power Dissipation @ T = +85°C

P

200

mW

°C/W

A

D

Thermal Resistance, Junction−to−Air

Operating Ambient Temperature Range

Operating Junction Temperature Range

Maximum Junction Temperature

Storage Temperature Range

R

Thja

T

A

−25 to +85

−25 to +125

+150

°C

T

J

T

Jmax

T

stg

−65 to +150

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the

RecommendedOperating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect

device reliability.

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4

NCP5008, NCP5009

POWER SUPPLY SECTION (−25°C to +85°C ambient temperature, unless otherwise noted.)

Rating

10

8

Symbol

Min

2.7

−

Typ

−

Max

6.0

2.7

15.0

400

75

Unit

V

Power Supply

V

bat

Power Supply Threshold Startup Voltage

Output Load Voltage Compliance

Pulsed Current Regulation Range

Continuous DC Current in the Load

V

batThr

2.3

−

V

out

−

V

8

I

0

−

mA

%

out

8

−

Output Pulsed Current Tolerance @ V = 3.6 V, L1 = 22 mH/0.71 W,

8

−

"5.0

−

bat

R

ref

"1%, I

= 20 mA (Note 1)

LED

Output Leakage @ LOCAL = 0, CS = H, Vout = 15 V, V = 6.0 V

8

I

−

3.0

−

500

−

nA

mA

bat

out

Standby Current @ Iout = 0 mA, CS = H, CLK = H, V = V

= 3.6 V

= 6.0 V

BIAS

10

I

bat

BIAS

stdb

Standby Current @ Iout = 0 mA, CS = H, CLK = H, V = V

I

10

−

bat

Operating Current @ V = V

= 3.6 V, I = 30 mA, CLK = H, CS = L,

I

ope

600

bat

BIAS

ref

LOCAL = Open

mA

Boost Internal Oscillator Clock @ L1 = 22 mH, V = V

= 3.6 V,

−

F

osc

−

300

−

kHz

bat

BIAS

Iout = 20 mA (Vout = 14 V)

1. The tolerance refers to the 20 mA to 70 mA current range.

DIGITAL SECTION (−25°C to +85°C ambient temperature, unless otherwise noted.)

Rating

Symbol

Min

Typ

Max

Unit

High Level Input Voltage

Low Level Input Voltage

Input Capacitance

(Note 2)

3, 5

V

C

0.7*V

−

10

V

bat

V

pF

IH

IL

in

bat

−

0.3*V

−

bat

High Level Input Voltage

Low Level Input Voltage

Input Capacitance

(Note 2)

6

V

C

−

0.6*V

0.4*V

10

−

V

pF

IH

IL

in

bat

LOCAL Pullup Resistor

LOCAL Leakage Current

CS Pullup Resistor

6

9

3

5

−

R

20

−

80

kW

nA

kW

ns

loc

I

100

80

−

Loc

R

20

−

cs

Minimum CS Low Time

Clock Frequency

Tcs

250

−

setup

CLK

F

−

5.0

−

MHz

ns

CLOCK tr and tf

tr

, tf

CLK CLK

10

−

Internal Register Clear

Internal Power on Reset Width

t

30

−

ns

clear

t

100

−

ms

POR

2. Digital inputs undershoot < − 0.30 V, Digital inputs overshoot < 0.30 V.

ANALOG SECTION (−25°C to +85°C ambient temperature, unless otherwise noted.)

Rating

Symbol

Min

1.20

−

Typ

1.24

5595

1119

1.8

Max

1.28

−

Unit

V

Output Voltage Range Reference @ 2.5 mA < I < 65 mA (Note 3)

1

V

ref

Maximum Output Current Range Ratio

8

I

−

out

Minimum Output Current Range Ratio

−

Output Current Sense Resistor

10, 9

2

R

s

−

5.0

1.28

−

W

Output Voltage Range Reference @ 2.5 mA < Ipho < 65 mA

Output Current Stabilization tdelay following a DC/DC startup

V

pho

1.20

−

1.24

100

2.2

V

8

I

ms

W

outdly

Internal NMOS Resistor @ V = 3.6 V

8

QR

−

3.0

−

bat

DSON

comp

Internal Comparator Delay Time

−

Td

−

60

ns

3. The overall tolerance depends upon the accuracy of the external resistor. Using a 1%/low PPM metal film resistor is recommended to achieve

"5% output current tolerance.

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5

NCP5008, NCP5009

TYPICAL OPERATING CHARACTERISTICS

Condition: Typical Application: L = 22 mH, Cin = 10 mF, Cout = 2.2 mF, R1 = 30 kW

80

75

70

65

60

55

50

80

75

V

= 4.2 V

= 3.6 V

bat

V

= 4.2 V

= 3.6 V

bat

V

bat

70

65

60

55

50

V

bat

V

= 3.0 V

bat

V

= 3.0 V

25

bat

0

5

10

15

20

(mA)

25

30

35

0

5

10

15

20

(mA)

30

35

I

LED

Figure 3. Efficiency vs. Load Current @ 4 LEDS

Figure 4. Efficiency vs. Load Current @ 3 LEDS

(V_load= 4*Vf ⇒ 14.2 V)

(V_load= 3*Vf ⇒ 10.5 V)

100

90

80

70

60

50

85

80

75

70

65

60

V

= 4.2 V

bat

V

=7.5 V

= 40 mA

V

= 3.6 V

= 3.0 V

out

bat

I

led

V

bat

V

= 15 V

= 20 mA

out

I

led

0

5

10

15

20

(mA)

25

30

35

2.5

3.0

3.5

4.0

4.5

(V)

5.0

5.5

6.0

6.5

I

V

LED

bat

Figure 5. Efficiency vs. Load Current @ 2 LEDS

Figure 6. Efficiency vs. V_bat@

(V_load= 2*Vf ⇒ 7.1 V)

V_out= 15 V/I_led= 20mA and

V_out= 7.5 V/I_led= 40 mA

100

95

90

85

80

75

400

Bn

V

= 6.0 V

bat

350

300

250

200

150

100

50

7

6

5.0 V

5

4

4.2 V

3

2

1

3.6 V

3.0 V

50

0

20

40

(mA)

60

80

0

10

20

30

40

(mA)

60

70

I

ref

LED

Figure 7. Efficiency vs. Load Current @ 4 LEDS

(V_load= 2 strings of 2 LEDs in series = 7.1V)

Figure 8. Inductor peak Current vs.

I_ref@ Bn = {1, 2, 3, 4, 5, 6, 7}

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6

NCP5008, NCP5009

TYPICAL OPERATING CHARACTERISTICS

Condition: Typical Application: L = 22 mH, Cin = 10 mF, Cout = 2.2 mF, R1 = 30 kW

50

45

40

35

30

25

20

15

10

5

20

18

V

= 10 V

= 15 V

load

16

14

12

10

8

V

load

6

4

2

0

10

20

30

40

(mA)

50

60

70

50

100

150

200

250

(mA)

peak

300

350 400

I

ref

THEORETICAL I

Figure 9. Load Current (I_led) vs. I_ref

@ V_bat= 3.6 V, V_load= 15 V and 10 V

Figure 10. Inductor Peak Current Error vs.

Theoretical Inductor Peak Current

7.0

6.5

6.0

5.5

5.0

4.5

4.0

3.5

3.0

200

180

160

140

120

100

80

Theoretical

Measured

60

40

20

0

10

20

(mA)

30

40

2.4 2.8 3.2 3.6 4.0 4.4 4.8 5.2 5.6

6.0

I

V

bat

(V)

photo

Figure 11. Inductor Peak Current vs. I_photo@ I_ref= 34 mA

Figure 12. Stand by Current vs. V_bat@ T = 20°C

80

75

85

80

75

70

65

60

55

50

V

= 4.2 V

= 3.6 V

bat

V

= 4.2 V

bat

70

65

60

55

50

V

bat

V

= 3.6 V

bat

V

= 3.0 V

bat

V

= 3.0 V

30

bat

0

5

10

15

20

25

30

35

0

5

10

15

20

25

35

I

(mA)

I

(mA)

LED

Figure 14. Efficiency vs. Load Current @ 3 LEDS

Figure 13. Efficiency vs. Load Current @ 4 LEDS

(V_load= 3*Vf ⇒ 10.5 V)

(V_load= 4*Vf ⇒ 14.2 V)

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7

NCP5008, NCP5009

TYPICAL OPERATING CHARACTERISTICS

Condition: Typical Application: L = 22 mH, Cin = 10 mF, Cout = 2.2 mF, R1 = 30 kW

90

85

80

75

70

65

60

100

V

= 6.0 V

bat

V

= 4.2 V

= 3.6 V

bat

V

95

90

85

80

75

70

5.0 V

bat

4.2 V

V

bat

= 3.0 V

3.6 V

3.0 V

40

0

5

10

15

20

25

30

35

0

10

20

30

50

60

70

I

(mA)

I

(mA)

LED

Figure 15. Efficiency vs Load Current @ 2 LEDS

Figure 16. Efficiency vs Load Current @ 4 LEDS

(V_load= 2 strings of 2 LEDs in series = 7.1 V)

(V_load= 2*Vf ⇒ 7.1 V)

Operating Description

Output

t

CLKmin

V

bat

ON

90%

50%

10%

tf

tr

OFF

Input

0.30* V

0.70* V

V

bat

Figure 17. Digital Timing Definitions

Figure 18. Typical Schmitt Trigger Characteristic

Input Schmitt Triggers

the current drawn pin 1. The clock signal is irrelevant and

All the Logic Input pins have built−in Schmitt trigger

circuits to prevent the NCP5008/NCP5009 against

uncontrolled operation. The typical dynamic characteristics

of the related pins are depicted in Figure 18.

the output current is derived by equation I = I * k, the

internal constant k being equal to 746.

out ref

ESD Protection

The NCP5008/NCP5009 includes silicon devices to

protect the pins against the ESD spikes voltages. To cope

with the different ESD voltages developed in the

applications, the built−in structures have been designed to

handle $2.0 kV in Human Body Model (HBM) and

$200 V in Machine Model (MM) and on each pin.

The output signal is guaranteed to go High when the

input voltage is above 0.70*V , and will go Low when the

bat

input voltage is below 0.30*V

.

bat

Local Mode

When the system operate in a Local Mode (Pin 6,

/LOCAL=Low), the output current depends solely upon

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8

NCP5008, NCP5009

Remote Control Programming Sequence

tCSsetup

CS

tclear

CLEAR

CLK

Qdata

B1

B2

B3

B4

B5

B6

B7

Last Latched Bit

Output Current Programmed Register

Internal Latch Data and Reset

I

out ref

Ioutdly

Iout

Figure 19. Programming Sequence

Upon CS transition from High to Low, the internal

sequence will take place:

− Qdata is internally set to high level.

− Upon positive going transition of the next CLK signal,

the Qdata is shifted to the next Bn stage.

− Clear the Qdata flip−flop upon the positive going of

the SetReg[B1] transient.

will be adjusted accordingly. If the number of CLK pulses

is higher than 7, the Qdata is lost and the SetReg register

bits B[1−7] are in the Low state, yielding a zero output

current.

The internal shift register can be clear by sending more

than 7 pulses to the CLK pin when the pin CS is low. If the

internal shift register is clear upon the CS transition from

Low to High, the device will be placed or maintained in the

shut down mode.

The sequence keeps going until CS = High.

When the CS line returns to a High state, the

programming output current flip−flop is set according to

the previous state of the shift register and SetReg B[1−7] is

cleared afterward.

When the register content is higher than zero, the DC/DC

is activated and a 100 ms delay (typical) is necessary to

stabilize the output current to the programmed value.

Depending upon the CS width, for a given CLK period,

the last SetReg bit will be latched and the output current

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9

NCP5008, NCP5009

Set Up Output Current Range

V

bat

1

V

bat

I

ref

+

−

BandGap

V

bat

GND

I

ref

1

1:746

V

bat

R

30 k

ref

Iphoto

1

Iout Reference

= (I −Iphoto)*746*(Bn+0.5)

ref

GND

1

I = (I −Iphoto)*(Bn+0.5)

ref

V

bat

1

1:Bn

2:1

+

−

BandGap

GND

GND GND

GND

Photo

Q1

NPN−PHOTO

GND

Figure 20. Functional Diagram

The current sunk to ground on PHOTO pin is subtracted

Where k = 746, Bn represents the bit of the internal shift

from the current sunk to ground on I pin. The result is

register, range from 1 to 7, and Ivalley = (I − Iphoto)

ref

multiplied by the programmed value (Bn) and then

multiplied by the constant factor ratio (k = 746) in the

current mirror.

The constant factor k is a ratio between the current on

Iout sense and the Iout reference internally fixed.

* 0.5 * k.

We can write also Ipeak = (I − Iphoto) * (Bn + 0.5) * k.

Please find below the formula to quickly calculate R1

resistor (resistor on I pin):

ref

1.24

R1

I

+

ref

The output current reference is:

Ipeak = Ivalley + (I − Iphoto) * Bn * k.

ref

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10

NCP5008, NCP5009

DC/DC Converter Operation

is monitored by the internal sense resistor Rsense to Set and

Reset the flip−flop U3 and U6 according to the comparators

U2 and U4 output state.

The DC/DC converter operates with a boost structure

depicted in Figure 21, the load being supplied by the pulsed

current coming from the external inductor L1. The current

V

bat

V

bat

V

bat

+

Rsense

1R8

U1

−

L1

V

bat

GND

L1

22 mH

+

U2

−

I

peak_ref

U3

U6

L2

V

D5

MBR0520

bat

GND

+

valley_ref

D4

LED

U4

U5

Q1

U7

−

D3

LED

GND

C2

2.2 mF/16 V

POR

D2

LED

D1

LED

GND

Figure 21. Basic DC/DC Boost Structure

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11

NCP5008, NCP5009

Output Load Drive

maximum rating will not exist across pin 8 and

ground. Depending upon a specific application

In order to make profit of the built−in Boost capabilities,

one shall operate the NCP5008/NCP5009 in the continuous

output current mode. Such a mode is achieved by using and

external reservoir capacitor (preferably a low ESR ceramic

type) across the LED as depicted in Figures 22, 23, 24, 25,

and 26.

(V voltage, PCB layout…), using an external

bat

voltage clamp could be necessary.

2. The peak current flowing into the LED diodes

shall be within the maximum ratings specified for

these devices.

Using an extra photo sensor is not mandatory and the

The Schottky diode D5, associated with capacitor C2,

provides a rectification and filtering function.

When a pulse−operating mode is acceptable:

related pin 2 can be either left open or connected to V

,

bat

but must not be grounded on the NCP5009 version only.

At this point, the designer must carefully analyze two

parameters:

• The LEDs brightness can be controlled in LOCAL

mode with a PWM on CS pin as depicted in Figure 24.

• Or the Schottky can be removed and replaced by at

least one LED diode as depicted in Figure 23.

1. The output voltage must be limited to 15 V

maximum. It’s the designer responsibility to

make sure that spike voltages beyond the

TYPICAL APPLICATION CIRCUIT

V

bat

C1

U1

R1

1

10 mF/6.3 V

10

9

I

ref

V

bat

GND

30 k

2

PHOTO

L1

GND

Q1

Vcc

L1

22 mH

V

bat

NPN−PHOTO

GND

D5

MBR0520

4

3

5

8

7

6

VBIAS

CS

L2

GND

CLK

LOCAL

GND

NCP5009

D1

D2

LED

D3

LED

D4

GND

LED

C2

2.2 mF/16 V

GND

Figure 22. Basic DC Current Mode Operation in REMOTE Control

http://onsemi.com

12

NCP5008, NCP5009

V

bat

C1

U1

R1

10 mF/6.3 V

1

2

10

I

ref

V

bat

GND

30 k

9

PHOTO

L1

GND

Q1

Vcc

L1

22 mH

V

bat

NPN−PHOTO

GND

4

3

5

8

7

6

VBIAS

CS

L2

GND

CLK

LOCAL

GND

D3

NCP5009

D4

GND

LED

C2

LED

1.0 mF/16 V

GND

Figure 23. Typical Semi−Pulsed Mode of Operation in REMOTE Mode

V

bat

C1

U1

R1

10 mF/6.3 V

1

2

10

9

I

ref

V

bat

GND

30 k

PHOTO

L1

GND

Q1

L1

22 mH

V

bat

NPN−PHOTO

GND

D5

MBR0520

4

3

5

8

7

6

VBIAS

CS

L2

PWM

GND

CLK

LOCAL

NCP5009

GND

D4

D1

D2

LED

D3

LED

C2

2.2 mF/16 V

GND

Figure 24. PWM Current Control Mode Operation in LOCAL Mode

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13

NCP5008, NCP5009

V

bat

C1

U1

R1

10 mF/6.3 V

1

2

10

9

I

ref

V

bat

DAC

GND

30 k

PHOTO

L1

22 mH

Q1

NPN−PHOTO

V

bat

GND

OFF ON

D5

MBR0520

4

3

5

8

7

6

VBIAS

CS

L2

GND

CLK

LOCAL

NCP5009

GND

D4

D1

D2

LED

D3

LED

C2

2.2 mF/16 V

GND

Figure 25. DAC Current Control Mode Operation in LOCAL Mode

V

bat

C1

U1

R1

10 mF/6.3 V

1

2

10

9

I

ref

V

bat

GND

30 k

PHOTO

L1

GND

L1

22 mH

Q1

NPN−PHOTO

V

bat

GND

OFF ON

D5

MBR0520

4

3

5

8

7

6

VBIAS

CS

L2

GND

CLK

LOCAL

NCP5009

GND

D4

D1

D2

D3

LED

C2

2.2 mF/16 V

GND

Figure 26. Basic DC Current Mode Operation in LOCAL Mode

http://onsemi.com

14

NCP5008, NCP5009

TYPICAL LEDS LOAD MAPPING

75 mA

Load+

D1

LED

D3

LED

D5

LED

D7

LED

D9

LED

6.7 V

D2

LED

D4

LED

D6

LED

D8

LED

D10

LED

Example 1

GND

50 mA

Load+

D1

LED

D4

LED

D7

LED

60 mA

Load+

D2

LED

D5

LED

D8

LED

D1

LED

D3

LED

D5

LED

10.4 V

6.7 V

D3

LED

D6

LED

D9

LED

D2

LED

D4

LED

D6

LED

Example 2

Example 3

GND

Figure 27. Three different examples of load can be driven by the NCP5009 or NCP5008

Condition: V_bat= 3.6 V, L = 22 mH

MANUFACTURER REFERENCE

Design Ref

Value/Reference or Size

Manufacturer

ON Semiconductor

MURATA

Reference Number

MBR0520

D5

L1

MBR0520/SOD−123

22 mH/1210

LQH3C220K34

C1

10 mF/ 6.3 V/0805

2.2 mF/16 V/1206

SFH320/PLCC2

White LED

MURATA

GRM40 X5R 106K 6.3

GRM42−6 X7R 225K 16

SFH320

C2

MURATA

Q1

Osram

D1 to D4

Osram

LW5413−VBW−1

http://onsemi.com

15

NCP5008, NCP5009

LAYOUT EXAMPLE

Figure 28. Typical Printed Circuit Layout

(the Top Silk Screen and the Top Layer)

The Figure 28 represents the typical printed circuit

layout based on the basic application Figure 1. This

application has been routed on a single copper layer to save

cost. A dual side PCB has better noise protection and can

be the right choice for an industrial system. In order to

avoid voltage spikes, care must be observed to group the

capacitors, the inductor, the Schottky diode and the

integrated circuit in the same area. On the other hand, using

large copper tracks to reduce the resistor connectivity is

strongly recommended.

Obviously, the connectors GND, CLK, CS, V and

bat

Load are for engineering purpose only and not for final

application.

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16

NCP5008, NCP5009

PACKAGE DIMENSIONS

Micro10

CASE 846B−03

ISSUE D

NOTES:

1. DIMENSIONING AND TOLERANCING PER

ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION “A” DOES NOT INCLUDE MOLD

FLASH, PROTRUSIONS OR GATE BURRS.

MOLD FLASH, PROTRUSIONS OR GATE

BURRS SHALL NOT EXCEED 0.15 (0.006)

PER SIDE.

−A−

4. DIMENSION “B” DOES NOT INCLUDE

INTERLEAD FLASH OR PROTRUSION.

INTERLEAD FLASH OR PROTRUSION

SHALL NOT EXCEED 0.25 (0.010) PER SIDE.

5. 846B−01 OBSOLETE. NEW STANDARD

846B−02

−B−

K

G

MILLIMETERS

INCHES

PIN 1 ID

D 8 PL

DIM MIN

MAX

3.10

1.10

0.30

MIN

MAX

0.122

0.043

0.012

M

S

A

0.08 (0.003)

T B

A

B

C

D

G

H

J

2.90

0.95

0.20

0.114

0.037

0.008

0.50 BSC

0.020 BSC

C

0.038 (0.0015)

0.05

0.10

4.75

0.40

0.15

0.21

5.05

0.70

0.002

0.004

0.187

0.016

0.006

0.008

0.199

0.028

−T−

SEATING

PLANE

L

H

K

L

J

SOLDERING FOOTPRINT*

1.04

0.041

0.32

0.0126

10X

3.20

4.24

5.28

0.126

0.167 0.208

0.50

mm

inches

ǒ

Ǔ

^8X0.0196

SCALE 8:1

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

MountingTechniques Reference Manual, SOLDERRM/D.

ON Semiconductor and

are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice

to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any

liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental

damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over

time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under

its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body,

or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death

may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees,

subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of

personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part.

SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

PUBLICATION ORDERING INFORMATION

LITERATURE FULFILLMENT:

N. American Technical Support: 800−282−9855 Toll Free

USA/Canada

ON Semiconductor Website: http://onsemi.com

Order Literature: http://www.onsemi.com/litorder

Literature Distribution Center for ON Semiconductor

P.O. Box 61312, Phoenix, Arizona 85082−1312 USA

Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada

Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada

Email: orderlit@onsemi.com

Japan: ON Semiconductor, Japan Customer Focus Center

2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051

Phone: 81−3−5773−3850

For additional information, please contact your

local Sales Representative.

NCP5008/D

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17


型号：	NCP5008_06
厂家：	ONSEMI
描述：	Backlight LED Boost Driver 背光LED升压驱动器驱动器
文件：	总17页 (文件大小：160K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

NCP5008_06 [ONSEMI]

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