NCP5500 [ONSEMI]
500 mA Linear Regulator; 500毫安线性稳压器型号: | NCP5500 |
厂家: | ONSEMI |
描述: | 500 mA Linear Regulator |
文件: | 总9页 (文件大小:137K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
NCP5500, NCV5500,
NCP5501, NCV5501
500 mA Linear Regulator
These linear regulators provide up to 500 mA over a user−adjustable
output range of 1.25 V to 5.0 V, or at a fixed output voltage of 1.5 V or
5.0 V*, with typical output voltage accuracy better than 3%. NCV
versions are qualified for demanding automotive applications that
require site and change control. NCP5500 and NCV5500 versions
include an Enable/Shutdown function and are available in a DPAK−5L
power package. In shutdown, current consumption is reduced to
30 mA. An internal PNP pass transistor permits low dropout voltage
and operation at full load current at the minimum input voltage.
NCP5501 and NCV5501 versions are available in DPAK−3L for
applications that do not require logical on/off control.
http://onsemi.com
4
1
2
1
5
3
DPAK 5
DPAK
CENTER LEAD CROP
CASE 175AA
SINGLE GAUGE
CASE 369C
This regulator family is ideal for applications that require a broad
input voltage range, including both automotive and portable battery
powered devices. Integral protection features include short circuit
current and thermal shutdown.
MARKING DIAGRAMS
Pin 1. EN
2. IN
Features
P5500xG
ALYWW
• Output Current up to 500 mA
• 2.9% Output Voltage Accuracy
• Low Dropout Voltage
TAB, 3. GND
4. OUT
5. NC/ADJ
1
5
• Enable Control Pin (NCP5500 / NCV5500)
• Reverse Bias Protection
• Short Circuit Protection
• Thermal Shutdown
DPAK 5
Pin 1. IN
TAB, 2. GND
3. OUT
V5501xG
ALYWW
• Operating Temperature Range of −40°C to +125°C
(NCV5500 / NCV5501)
1
3
• NCV Prefix for Applications that Require Site and Change Control
• These are Pb−Free Devices
DPAK
P or V = P (NCP), V (NCV)
5500/1 = Device Code
Typical Applications
x
= Output Voltage
= L = 1.5 V
= U = 5.0 V
= W = Adjustable
= Pb−Free Package
= Assembly Location
= Wafer Lot
• Automotive
• Industrial and Consumer
• Post SMPS Regulation
• Point of Use Regulation
G
A
L
Y
= Year
WW
= Work Week
*Contact ON Semiconductor for other fixed voltages.
IN
100 nF
EN
2
1
4
5
Output
OUT
ADJ
Input
4.7 mF
NCP5500
NCV5500
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
OFF ON
R
L
3
GND
Figure 1. Typical Application Circuit
©
Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
June, 2006 − Rev. 3
NCP5500/D
NCP5500, NCV5500, NCP5501, NCV5501
PIN FUNCTION DESCRIPTIONS
Pin No.
Symbol
Description
NCP5500 / NCV5500 − DPAK 5 Lead Center Lead Crop
1
EN
IN
Output Enable; high level turns on the output.
2
Input; battery/unregulated supply input voltage.
Ground; Pin 3 connected internally to the Tab heat sink.
Output; bypass to ground.
3, TAB
GND
4
5
OUT
NC / ADJ
No connection (Fixed output versions only).
Voltage−adjust input. Use an external voltage divider to set the output voltage over a
range of 1.25 V to 5.0 V. Adjustable version only.
NCP5501 / NCV5501 − DPAK 3 Lead
1
2, TAB
3
IN
Input; battery/unregulated supply input voltage.
Ground; Pin 3 connected internally to the Tab heat sink.
Output; bypass to ground.
GND
OUT
IN
OUT
Current Limit and
Error
Saturation Sense
Amplifier
Bandgap
Reference
−
+
Thermal
Shutdown
Connection for Fixed Output
EN
GND
Connection for Enable
EN and ADJ Pins
are applicable to
NCP5500 /
Connection for Adjustable Output
NC / ADJ
NCV5500 only.
Figure 2. Block Diagram
http://onsemi.com
2
NCP5500, NCV5500, NCP5501, NCV5501
ABSOLUTE MAXIMUM RATINGS
T = −40°C to +85°C (NCP5500, NCP5501), T = −40°C to +125°C (NCV5500, NCV5501), unless otherwise noted.
A
A
Pin Symbol, Parameter
IN, V , DC Input Voltage
Symbol
Min
−7.0
−0.3
Max
+18
+16
Units
V
V
V
IN
IN
OUT, EN, V , V , DC Voltage
OUT EN
V
V
+ 0.3
IN
(Note 4)
Junction Temperature
T
+150
°C
J
Package Dissipation
DPAK 5
°C/W
P
Internally Limited
D
Power Dissipation at T = 25°C
A
Thermal Resistance, Junction−to−Air
Thermal Resistance, Junction−to−Case
R
75
8.0
q
JA
JC
R
q
DPAK
Internally Limited
P
D
Power Dissipation at T = 25°C
A
Thermal Resistance, Junction−to−Air
Thermal Resistance, Junction−to−Case
101
6.6
R
q
q
JA
JC
R
Storage Temperature
T
−55
+150
°C
−
Stg
Moisture Sensitivity Level
MSL
ESD
1
ESD Capability, Human Body Model (Note 1)
ESD Capability, Machine Model (Note 1)
4000
200
−
−
−
V
HBM
ESD
V
MM
ESD Capability, Charged Device Model (Note 1)
ESD
1000
V
CDM
Lead Temperature Soldering
Reflow (SMD Styles Only), Pb−Free Versions (Note 3)
°C
T
sld
265 Peak
OPERATING RANGES
IN, V , Operating DC Input Voltage
V
V
+ V , 2.5 V
16
V
V
IN
IN
OUT
DO
(Note 5)
OUT, V
Adjust Range (adjustable version only)
V
1.25
5.0
OUT
OUT
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115)
ESD Charged Device Model tested per EIA/JES D22/C101, Field Induced Charge Model
2. Latch−up Current Maximum Rating: ≤ 100 mA per JEDEC standard: JESD78.
3. Pb−Free, 60 sec –150 sec above 217°C, 40 sec max at peak temperature
4. Maximum = +16 V or (V +0.3 V), whichever is lower.
IN
5. Minimum V = 2.5 V or (V
+ V ), whichever is higher.
IN
OUT
DO
http://onsemi.com
3
NCP5500, NCV5500, NCP5501, NCV5501
ELECTRICAL CHARACTERISTICS V = 2.5 V or (V
+ 1.0 V), whichever is higher, C = 4.7 mF, −40°C < T < 85°C (<125°C for
IN
OUT
O
A
NCV versions), T < 150°C unless otherwise noted.
J
Characteristic
Symbol
Test Conditions
Min
Typ
Max
Unit
OUTPUT
Output Voltage (Note 6)
Fixed Output Versions
V
V
V
OUT
OUT
T = 25°C, I = 50 mA
±2.9%
±2.9%
A
O
Adjustable Voltage Versions
T = 25°C, I = 50 mA
A O
Output Voltage (Notes 6 and 7)
V
1.0 mA < I < 500 mA
−4.9%
+4.9%
1.0
O
Line Regulation (Note 7)
Load Regulation (Note 7)
REG
I
= 50 mA
O
0.1
%
LINE
2.5 V or (V
+ 1.0 V) < V < 16 V
OUT
IN
REG
1.0 mA < I < 500 mA
0.35
1.0
%
LOAD
O
Dropout Voltage
V
I
O
= 1.0 mA, DV
= −2%
= −2%
20
300
90
700
mV
DO
O
OUT
OUT
Fixed Output Versions
(Note 8)
I
= 500 mA, DV
Dropout Voltage
V
I
= 1.0 mA, DV
= −2%
= −2%
20
300
90
700
mV
DO
O
O
OUT
OUT
Adjustable Output Versions
(Note 9)
I
= 500 mA, DV
Ground Current
I
I
= 100 mA
O
300
10
500
20
mA
mA
GND
I
= 500 mA (Note 7)
O
Quiescent Current in Shutdown
(NCP5500, NCV5500)
Iq
Adjustable and 1.5 V versions
All other versions
30
40
50
50
mA
Current Limit
I
V
= 0 V (Note 7)
OUT
500
700
75
900
mA
dB
OUT(LIM)
Ripple Rejection Ratio
Output Noise Voltage (Note 10)
RR
f = 120 Hz
V
f = 10 Hz to 100 kHz, V = 2.5 V
mVrms
n
IN
V
= 1.25 V, I = 1.0 mA
20
OUT
O
f = 10 Hz to 100 kHz, V = 2.5 V
IN
V
= 1.25 V, I = 100 mA
34
OUT
O
Minimum Output Capacitance /
ESR for Stability
C
5.0 mA < I < 500 mA
4.7 mF / 3 W
OUT
O
/ ESR
T = 25°C
A
ENABLE (NCP5500, NCV5500 Only)
Enable Voltage
V
ENoff
V
ENon
OFF (shutdown) State
ON (enabled) State
0.4
V
2.0
Enable Pin Bias Current
ADJUST
I
V
= V , V = 2.5 V, I = 1.0 mA
−
−
−
1.0
60
mA
EN
EN
IN
IN
O
Adjust Pin Current (Note 11)
THERMAL SHUTDOWN
Thermal Shutdown Temperature (Note 11)
I
V
= V , V
= 1.25 V, V = 1.25 V
OUT
nA
ADJ
EN
IN ADJ
TSD
I
= 100 mA
150
210
°C
O
6. Deviation from nominal. For adjustable versions, Pin ADJ connected to OUT.
7. Use pulse loading to limit power dissipation (duration < 100 mS and duty cycle < 1%).
8. V
9. V
= V − V
. For <2.5 V versions, V
will be constrained by the minimum input voltage of 2.5 V.
DO
DO
n
IN
OUT
DO
= V − V
. For output voltage set to <2.5 V, V
will be constrained by the minimum input voltage.
IN
OUT
DO
10.V for other fixed voltage versions, as well as adjustable versions set to other output voltages, can be calculated from the following formula:
V = V
* (V
− 1.25) / 1.25, where V
is the typical value from the table above.
n
n(x)
OUT
n(x)
11. Not tested in production. Limits are guaranteed by design.
http://onsemi.com
4
NCP5500, NCV5500, NCP5501, NCV5501
Output
I
I
OUT
Input
IN
OUT
NCV5500 NCP5500
IN
C
C
IN
100 nF
Bulk
10 mF
C
OUT
Enable
R
L
EN
ADJ
I
I
ADJ
EN
GND
I
GND
I
Q
Output
Input
I
I
OUT
IN
OUT
IN
C
10 mF
C
IN
100 nF
Bulk
C
OUT
NCV5501
R
L
GND
I
GND
I
Q
Figure 3. Measuring Circuits
Circuit Description
electrolytic capacitor is best, since a film or ceramic
capacitor with its almost zero ESR, can cause instability. The
aluminum electrolytic capacitor is the least expensive
solution. However, if the circuit operates at low
temperatures (−25°C to −40°C), both capacitor value and
ESR will vary considerably. The capacitor manufacturer’s
data sheet usually provides temperature performance data.
The NCP5500/NCP5501/NCV5500/NCV5501 are
integrated linear regulators with a DC load current
capability of 500 mA. The output voltage is regulated by a
PNP pass transistor controlled by an error amplifier and
band gap reference. The choice of a PNP pass element
provides the lowest possible dropout voltage, particularly at
reduced load currents. Pass transistor base drive current is
controlled to prevent oversaturation. The regulator is
internally protected by both current limit and thermal
shutdown. Thermal shutdown occurs when the junction
temperature exceeds 150°C. The NCV5500 includes an
enable/shutdown pin to turn off the regulator to a low current
drain standby state.
Stability is guaranteed for C
= 4.7 mF and ESR < 3 W.
OUT
Enable Input (NCP5500, NCV5500)
The enable pin is used to turn the regulator on or off. By
holding the pin at a voltage less than 0.5 V, the output of the
regulator will be turned off to a minimal current drain state.
When the voltage at the Enable pin is greater than 2.0 V, the
output of the regulator will be enabled and rise to the
regulated output voltage. The Enable pin may be connected
directly to the input pin to provide a constant enable to the
regulator.
Regulator
The error amplifier compares the reference voltage to a
sample of the output voltage (V
) and drives the base of
OUT
a PNP series pass transistor via a buffer. The reference is a
bandgap design for enhanced temperature stability.
Saturation control of the PNP pass transistor is a function of
the load current and input voltage. Oversaturation of the
output power device is prevented, and quiescent current in
the ground pin is minimized.
Active Load Protection in Shutdown
(NCP5500, NCV5500)
When a linear regulator is disabled (shutdown), the output
(load) voltage should be zero. However, stray PC board
leakage paths, output capacitor dielectric absorption, and
inductively coupled power sources can cause an undesirable
regulator output voltage if load current is low or zero. The
NCV5500 features a load protection network that is active
only during Shutdown mode. This network switches in a
Regulator Stability Considerations
The input capacitors (C
and C ) are necessary to
BULK
IN
stabilize the input impedance to reduce transient line
influences. The output capacitor helps determine three main
characteristics of a linear regulator: startup delay, load
transient response and loop stability. The capacitor value
and type should be based on cost, availability, size and
shunt current path (~500 mA) from V
to Ground. This
OUT
feature also provides a controlled (“soft”) discharge path for
the output capacitor after a transition from Enable to
Shutdown.
temperature constraints.
A tantalum or aluminum
http://onsemi.com
5
NCP5500, NCV5500, NCP5501, NCV5501
DEFINITION OF TERMS
Once the value of P
is known, the maximum
D(max)
permissible value of R
can be calculated:
Dropout Voltage: The input−to−output voltage differential
at which the circuit ceases to regulate against further
reduction input voltage. Measured when the output voltage
has dropped 2% relative to the value measured at 6.0 V
input, dropout voltage is dependent upon load current and
junction temperature.
qJA
ǒ
Ǔ
°
150 C * TA
(eq. 2)
RqJA
+
PD
The value of R
can then be compared with those in the
qJA
package section of the data sheet. Those packages with R
less than the calculated value in Equation 2 will keep the die
temperature below 150°C.
In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external heat
sink will be required.
qJA
Input Voltage: The DC voltage applied to the input
terminals with respect to ground.
Line Regulation: The change in output voltage for a change
in the input voltage. The measurement is made under
conditions of low dissipation or by using pulse techniques
such that the average chip temperature is not significantly
affected.
Heat sinks
A heat sink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Each material in the heat flow path between the IC and the
outside environment will have a thermal resistance. Like
series electrical resistances, these resistances are summed to
Load Regulation: The change in output voltage for a change
in load current at constant chip temperature. Pulse loading
techniques are employed such that the average chip
temperature is not significantly affected.
Quiescent Current: The part of the positive input current
that does not contribute to the positive load current. The
regulator ground pin current with no load.
determine the value of R
:
qJA
R
qJA + RqJC ) RqCS ) RqSA
(eq. 3)
Ripple Rejection: The ratio of the peak−to−peak input ripple
voltage to the peak−to−peak output ripple voltage.
where
R
R
R
is the junction−to−case thermal resistance,
is the case−to−heatsink thermal resistance,
qJC
qCS
qSA
Current Limit: Peak current that can be delivered to the
output.
is the heatsink−to−ambient thermal resistance.
appears in the package section of the data sheet. Like
R
qJC
Calculating Power Dissipation
The maximum power dissipation for a single output
regulator (Figure 3) is:
R , it too is a function of package type. R
qJA
and R
are
qCS
qSA
functions of the package type, heat sink and the interface
between them. These values appear in data sheets of heat
sink manufacturers.
Thermal, mounting, and heat sink considerations are
further discussed in ON Semiconductor Application Note
AN1040/D.
ƪ ƫI
(eq. 1)
D(max) + VIN(max) * VOUT(min) OUT(max) ) VIN(max)Iq
P
Where
V
V
is the maximum input voltage,
is the minimum output voltage,
is the maximum output current for the application,
IN(max)
OUT(min)
OUT(max)
I
I
is the ground current at I
.
GND
OUT(max)
http://onsemi.com
6
NCP5500, NCV5500, NCP5501, NCV5501
ORDERING INFORMATION
Package
Marking
†
Device
Nominal Output Voltage
Package
Shipping
NCP5500DT15RKG
1.5
P5500LG
DPAK−5
2500 / Tape & Reel
2500 / Tape & Reel
2500 / Tape & Reel
75 Units / Rail
(Pb−Free)
NCV5500DT15RKG
NCP5501DT15RKG
NCP5501DT15G
V5500LG
P5501LG
P5501LG
V5501LG
V5501LG
P5500UG
P5501UG
P5501UG
P5500WG
DPAK−5
(Pb−Free)
DPAK
(Pb−Free)
DPAK
(Pb−Free)
NCV5501DT15RKG
NCV5501DT15G
DPAK
(Pb−Free)
2500 / Tape & Reel
75 Units / Rail
DPAK
(Pb−Free)
NCP5500DT50RKG
NCP5501DT50RKG
NCP5501DT50G
5.0
DPAK−5
(Pb−Free)
2500 / Tape & Reel
2500 / Tape & Reel
75 Units / Rail
DPAK
(Pb−Free)
DPAK
(Pb−Free)
NCP5500DTADJRKG
Adjustable
DPAK−5
(Pb−Free)
2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
http://onsemi.com
7
NCP5500, NCV5500, NCP5501, NCV5501
PACKAGE DIMENSIONS
DPAK (SINGLE GAUGE)
CASE 369C
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING
SEATING
PLANE
−T−
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
C
B
R
INCHES
DIM MIN MAX
MILLIMETERS
E
V
MIN
5.97
6.35
2.19
0.69
0.46
0.94
MAX
6.22
6.73
2.38
0.88
0.58
1.14
A
B
C
D
E
F
G
H
J
0.235 0.245
0.250 0.265
0.086 0.094
0.027 0.035
0.018 0.023
0.037 0.045
0.180 BSC
0.034 0.040
0.018 0.023
0.102 0.114
0.090 BSC
4
2
Z
A
K
S
1
3
4.58 BSC
U
0.87
0.46
2.60
1.01
0.58
2.89
K
L
2.29 BSC
F
J
R
S
U
V
Z
0.180 0.215
0.025 0.040
4.57
0.63
0.51
0.89
3.93
5.45
1.01
−−−
1.27
−−−
L
H
0.020
0.035 0.050
0.155 −−−
−−−
D 2 PL
M
G
0.13 (0.005)
T
RECOMMENDED FOOTPRINT
6.20
3.0
0.244
0.118
2.58
0.101
5.80
1.6
0.063
6.172
0.243
0.228
mm
inches
ǒ
Ǔ
SCALE 3:1
http://onsemi.com
8
NCP5500, NCV5500, NCP5501, NCV5501
PACKAGE DIMENSIONS
DPAK 5, CENTER LEAD CROP
CASE 175AA−01
ISSUE A
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
SEATING
PLANE
−T−
C
B
R
INCHES
DIM MIN MAX
MILLIMETERS
MIN
5.97
6.35
2.19
0.51
0.46
0.61
MAX
6.22
6.73
2.38
0.71
0.58
0.81
E
V
A
B
C
D
E
F
G
H
J
0.235 0.245
0.250 0.265
0.086 0.094
0.020 0.028
0.018 0.023
0.024 0.032
0.180 BSC
0.034 0.040
0.018 0.023
0.102 0.114
0.045 BSC
R1
Z
A
K
S
4.56 BSC
1 2 3 4
5
0.87
0.46
2.60
1.01
0.58
2.89
U
K
L
1.14 BSC
R
0.170 0.190
4.32
4.70
0.63
0.51
0.89
3.93
4.83
5.33
1.01
−−−
1.27
4.32
F
R1 0.185 0.210
J
S
U
V
Z
0.025 0.040
0.020 −−−
0.035 0.050
0.155 0.170
L
H
D 5 PL
M
G
0.13 (0.005)
T
SOLDERING FOOTPRINT*
6.4
0.252
2.2
0.086
0.34
0.013
5.8
0.228
5.36
0.217
10.6
0.417
0.8
0.031
mm
inches
ǒ
Ǔ
SCALE 4:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
Literature Distribution Center for ON Semiconductor
P.O. Box 61312, Phoenix, Arizona 85082−1312 USA
Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada
Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
Japan: ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Phone: 81−3−5773−3850
For additional information, please contact your
local Sales Representative.
NCP5500/D
相关型号:
©2020 ICPDF网 联系我们和版权申明