NCP565MN33T2G [ONSEMI]
1.5 A Low Dropout Linear Regulator; 1.5低压差线性稳压器型号: | NCP565MN33T2G |
厂家: | ONSEMI |
描述: | 1.5 A Low Dropout Linear Regulator |
文件: | 总16页 (文件大小:136K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
NCP565/NCV565
1.5 A Low Dropout
Linear Regulator
The NCP565/NCV565 low dropout linear regulator will provide
1.5 A at a fixed output voltage or an adjustable voltage down to 0.9 V.
The fast loop response and low dropout voltage make this regulator
ideal for applications where low voltage and good load transient
response are important. Device protection includes current limit, short
circuit protection, and thermal shutdown.
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MARKING
DIAGRAMS
Features
2
1
D PAK
2
CASE 936
FIXED
NC
P565D2Txx
AWLYWWG
• Ultra Fast Transient Response (t1.0 ms)
• Low Ground Current (1.1 mA @ Iload = 1.5 A)
• Low Dropout Voltage (0.9 V @ Iload = 1.5 A)
• Low Noise (28 mVrms)
3
Tab = Ground
Pin 1. V
in
2. Ground
3. V
out
• 0.9 V Reference Voltage
• Adjustable Output Voltage from 7.7 V down to 0.9 V
• 1.2 V Fixed Output Version. Other Fixed Voltages Available on
NC
y565D2T
2
D PAK
Request
1
CASE 936A
ADJUSTABLE
AWLYWWG
5
• Current Limit Protection (3.5 A Typ)
• Thermal Shutdown Protection (160°C)
• Pb−Free Packages are Available
xx = 12 or 33
Tab = Ground
Pin 1. N.C.
y
A
= P or V
= Assembly Location
WL = Wafer Lot
= Year
WW = Work Week
Typical Applications
2. V
3. Ground
4. V
5. Adj
in
• Servers
out
Y
• ASIC Power Supplies
• Post Regulation for Power Supplies
• Constant Current Source
G
= Pb−Free
P565
DFN6
CASE 506AX
MNxx
AYWWG
G
1
xx
=
Voltage Rating
AJ = Adjustible
12 = 1.2 V
33 = 3.3 V
AYM
565yy G
G
SOT−223
CASE 318E
1
Tab = V
yy
= Voltage Rating
out
Pin 1. Ground
12 = 1.2 V
Assembly Location
Year
2. V
3. V
out
in
A
Y
WW
M
G
=
=
=
=
=
Work Week
Date Code
Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 12 of this data sheet.
©
Semiconductor Components Industries, LLC, 2007
1
Publication Order Number:
February, 2007 − Rev. 12
NCP565/D
NCP565/NCV565
PIN DESCRIPTION
2
D PAK
DFN6
SOT−223
Pin No.
Pin No.
Pin No.
Pin No.
Pin No.
Adj. Version Fixed Version Adj. Version Fixed Version Fixed Version
Symbol
Description
1
−
1, 2
3
1, 2, 5
−
N.C.
−
2
1
3
6
4
−
3
V
in
Positive Power Supply Input Voltage
3, Tab
2, Tab
6
1
2, Tab
−
Ground Power Supply Ground
4
5
3
−
4
V
out
Regulated Output Voltage
5
Adj
This pin is to be connected to the R
resistors on the output. The linear
sense
regulator will attempt to maintain 0.9 V
between this pin and ground. Refer to
Figure 1 for the equation.
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
V
Input Voltage (Note 1)
Output Pin Voltage
Adjust Pin Voltage
V
in
9.0
V
−0.3 to V + 0.3
V
out
in
V
adj
−0.3 to V + 0.3
V
in
Thermal Characteristics SOT−223 (Notes 2, 3)
Thermal Resistance, Junction−to−Ambient
Thermal Resistance, Junction−to−Pin
°C/W
RqJA
RqJP
107
12
Thermal Characteristics DFN6 3x3 (Notes 2, 3)
Thermal Resistance, Junction−to−Ambient
Thermal Resistance, Junction−to−Pin
°C/W
°C/W
RqJA
RqJP
176
37
2
Thermal Characteristics D PAK (5ld) (Notes 2, 3)
Thermal Resistance, Junction−to−Case
Thermal Resistance, Junction−to−Ambient
Thermal Resistance, Junction−to−Pin
RqJC
RqJA
RqJP
3
105
4
Operating Junction Temperature Range
Operating Ambient Temperature Range
Storage Temperature Range
TJ
−40 to 150
−40 to 125
−55 to 150
°C
°C
°C
T
A
Tstg
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. This device series contains ESD protection and exceeds the following tests:
Human Body Model JESD 22−A114−B
Machine Model JESD 22−A115−A
2. The maximum package power dissipation is:
T
* T
J(max)
A
P
D
+
R
qJA
3. As measured using a copper heat spreading area of 50 mm .
2
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2
NCP565/NCV565
V
in
V
in
C1
C1
Voltage
Reference
Block
Voltage
Reference
Block
V
ref
= 0.9 V
V
ref
= 0.9 V
V
out
V
out
Output
Stage
Output
Stage
5.6
pF
R1
R2
R1
R2
C2
C2
ADJ
GND
V
V
GND
out
ref
GND
R1 + R2 ǒ * 1Ǔ
Figure 1. Typical Schematic, Adjustable Output
Figure 2. Typical Schematic, Fixed Output
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3
NCP565/NCV565
ELECTRICAL CHARACTERISTICS (V = V + 1.3 V, V = 0.9 V, T = 25°C, C = C = 150 mF, unless otherwise noted.)
in
out
out
J
in
out
Characteristic
Symbol
Min
Typ
Max
Unit
ADJUSTABLE OUTPUT VERSION
Reference Voltage (10 mA < I < 1.5 A; V + 1.6 V < V < 9.0 V; T = −10 to 105°C)
V
0.882
(−2%)
0.9
0.9
0.918
(+2%)
V
V
out
out
in
J
ref
Reference Voltage (10 mA < I < 1.5 A; V + 1.6 V < V < 9.0 V; T = −40 to 125°C)
V
ref
0.873
(−3%)
0.927
(+3%)
out
out
in
J
ADJ Pin Current
Line Regulation (I = 10 mA)
I
−
−
30
0.03
0.03
0.9
3.5
85
−
−
nA
%
Adj
Reg
out
line
Load Regulation (10 mA < I < 1.5 A)
Reg
−
−
%
out
load
Dropout Voltage (I = 1.5 A, V = 2.5 V) (Note 4)
Vdo
−
1.3
−
V
out
out
Current Limit
Ripple Rejection (120 Hz; I = 1.5 A)
I
1.6
−
A
lim
RR
RR
−
dB
dB
mA
mVrms
out
Ripple Rejection (1 kHz; I = 1.5 A)
−
75
−
out
Ground Current (I = 1.0 mA to 1.5 A)
I
−
1.1
28
3.0
−
out
GND
Output Noise Voltage (f = 100 Hz to 100 kHz, I = 1.5 A)
V
−
out
n
FIXED OUTPUT VOLTAGE (V = V + 1.3 V, T = 25°C, C = C = 150 mF, unless otherwise noted.)
in
out
J
in
out
Output Voltage (10 mA < I < 1.5 A; V + 1.6 V < V < 9.0 V; T = −10 to 105°C)
V
out
1.176
(−2%)
1.2
1.2
3.3
3.3
1.224
(+2%)
V
V
V
V
out
out
in
J
1.2 V version
Output Voltage (10 mA < I < 1.5 A; V + 1.6 V < V < 9.0 V; T = −40 to 125°C)
V
out
1.164
(−3%)
1.236
(+3%)
out
out
in
J
1.2 V version
Output Voltage (10 mA < I < 1.5 A; V + 1.6 V < V < 9.0 V; T = −10 to 105°C)
V
out
3.234
(−2%)
3.366
(+2%)
out
out
in
J
3.3 V version
Output Voltage (10 mA < I < 1.5 A; V + 1.6 V < V < 9.0 V; T = −40 to 125°C)
V
out
3.201
(−3%)
3.399
(+3%)
out
out
in
J
3.3 V version
Line Regulation (I = 10 mA)
Reg
−
−
0.03
0.03
0.9
3.5
85
−
−
%
%
out
line
Load Regulation (10 mA < I < 1.5 A)
Reg
load
out
Dropout Voltage (I = 1.5 A, V = 2.5 V) (Note 4)
Vdo
−
1.3
−
V
out
out
Current Limit
Ripple Rejection (120 Hz; I = 1.5 A)
I
1.6
−
A
lim
RR
RR
−
dB
out
Ripple Rejection (1 kHz; I = 1.5 A)
−
75
−
dB
out
Ground Current (I = 1.0 mA to 1.5 A)
I
−
1.1
28
3.0
−
mA
mVrms
out
GND
Output Noise Voltage (f = 100 Hz to 100 kHz, I = 1.5 A)
V
−
out
n
4. Dropout voltage is a measurement of the minimum input/output differential at full load.
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4
NCP565/NCV565
TYPICAL CHARACTERISTICS
3.302
3.300
3.298
3.296
3.294
0.9005
0.9000
0.8995
0.8990
0.8985
0.8980
0.8975
0.8970
3.292
V
V
C
= 4.9 V
= 3.3 V
= C = 150 mF
out
V
V
C
= 2.5 V
= 0.9 V
in
in
out
out
= C = 150 mF
3.290
3.288
in
in
out
−50 −25
0
25
50
75
100
125 150
−50 −25
0
25
50
75
100 125 150
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 4. Output Voltage vs. Temperature
Figure 3. Output Voltage vs. Temperature
1.2
1.0
0.8
0.6
0.4
0.2
0
3.90
3.85
3.80
3.75
3.70
3.65
3.60
3.55
3.50
3.45
3.40
3.35
I
= 1.5 A
out
I
= 50 mA
out
V
= 2.5 V
= 0.9 V
= C = 150 mF
out
in
V
out
C
= C = 150 mF
out
C
in
in
−50 −25
0
25
50
75
100
125 150
−50 −25
0
25
50
75
100
125 150
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 5. Short Circuit Current Limit
vs. Temperature
Figure 6. Dropout Voltage vs. Temperature
1.28
1.26
1.24
1.22
1.2
1.16
1.14
1.12
1.10
1.08
1.06
1.04
1.02
1.00
0.98
0.96
V
= 2.5 V
= 0.9 V
= 1.5 A
in
1.18
1.16
1.14
1.12
V
out
I
out
C
= C = 150 mF
out
in
0
300
600
, OUTPUT CURRENT (mA)
out
900
1200
1500
−50 −25
0
25
50
75
100
125 150
T , JUNCTION TEMPERATURE (°C)
J
I
Figure 7. Ground Current vs. Temperature
Figure 8. Ground Current vs. Output Current
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5
NCP565/NCV565
TYPICAL CHARACTERISTICS
100
90
80
70
60
50
40
30
20
10
0
1000
Unstable
100
10
1
I
= 1.5 A
out
V
C
= 3.3 V
out
Stable
500
= 10 mF
out
0
250
750
1000
1250
1500
10
100
1000
10000
100000 1000000
F, FREQUENCY (Hz)
OUTPUT CURRENT (mA)
Figure 9. Ripple Rejection vs. Frequency
Figure 10. Output Capacitor ESR Stability vs.
Output Current
10
0
10
0
−10
−20
−30
−40
−10
V
= 4.59 V
= 0.9 V
V = 4.59 V
in
in
−20
−30
−40
V
out
V
out
= 0.9 V
1.50
1.00
0.50
0
1.50
1.00
0.50
0
0
50 100
150 200 250 300 350 400
TIME (nS)
0
0.5
1.0
1.5 2.0
2.5 3.0
3.5
4.0
TIME (ms)
Figure 11. Load Transient from 10 mA to 1.5 A
Figure 12. Load Transient from 10 mA to 1.5 A
50
50
40
30
20
10
0
40
30
20
10
0
V
V
= 4.59 V
= 0.9 V
V
V
= 4.59 V
= 0.9 V
in
in
out
out
1.50
1.00
0.50
1.50
1.00
0.50
0
0
−50
200
250 300 350
0
50
100 150
400
0
0.2
0.4 0.6
0.8
1.0 1.2
1.4
1.6
TIME (nS)
TIME (ms)
Figure 13. Load Transient from 1.5 A to 10 mA
Figure 14. Load Transient from 1.5 A to 10 mA
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NCP565/NCV565
TYPICAL CHARACTERISTICS
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
V
= 3.0 V
= 0.9 V
= 1.5 A
in
V
out
V
= 3.0 V
50
in
I
out
V
out
= 0.9 V
= 10 mA
40
30
20
10
0
I
out
Start 1.0 kHz
Stop 100 kHz
Start 1.0 kHz
Stop 100 kHz
FREQUENCY (kHz)
FREQUENCY (kHz)
Figure 15. Noise Density vs. Frequency
Figure 16. Noise Density vs. Frequency
1000
Unstable
100
10
1
Stable
500
C
= 10 mF
out
Fixed 3.3V
0
250
750
1000 1250
1500
OUTPUT CURRENT (mA)
Figure 17. Output Capacitor ESR Stability vs.
Output Current
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NCP565/NCV565
Adjustable Operation
APPLICATION INFORMATION
The typical application circuit for the adjustable output
regulators is shown in Figure 1. The adjustable device
develops and maintains the nominal 0.9 V reference voltage
between Adj and ground pins. A resistor divider network R1
and R2 causes a fixed current to flow to ground. This current
creates a voltage across R1 that adds to the 0.9 V across R2
and sets the overall output voltage.
The NCP565 low dropout linear regulator provides
adjustable voltages at currents up to 1.5 A. It features ultra
fast transient response and low dropout voltage. These
devices contain output current limiting, short circuit
protection and thermal shutdown protection.
Input, Output Capacitor and Stability
The output voltage is set according to the formula:
An input bypass capacitor is recommended to improve
transient response or if the regulator is located more than a
few inches from the power source. This will reduce the
circuit’s sensitivity to the input line impedance at high
frequencies and significantly enhance the output transient
response. Different types and different sizes of input
capacitors can be chosen dependent on the quality of power
supply. A 150 mF OSCON 16SA150M type from Sanyo
should be adequate for most applications. The bypass
capacitor should be mounted with shortest possible lead or
track length directly across the regulator’s input terminals.
The output capacitor is required for stability. The NCP565
remains stable with ceramic, tantalum, and aluminum−
electrolytic capacitors with a minimum value of 1.0 mF as
long as the ESR remains between 50 mW and 2.5 W. The
NCP565 is optimized for use with a 150 mF OSCON
16SA150M type in parallel with a 10 mF OSCON 10SL10M
type from Sanyo. The 10 mF capacitor is used for best AC
stability while 150 mF capacitor is used for achieving
excellent output transient response. The output capacitors
should be placed as close as possible to the output pin of the
device. If not, the excellent load transient response of
NCP565 will be degraded.
R1 ) R2
ǒ
Ǔ* I
V
out
+ V
ref
R2
Adj
R2
The adjust pin current, Iadj, is typically 30 nA and
normally much lower than the current flowing through R1
and R2, thus it generates a small output voltage error that can
usually be ignored.
Load Transient Measurement
Large load current changes are always presented in
microprocessor applications. Therefore good load transient
performance is required for the power stage. NCP565 has
the feature of ultra fast transient response. Its load transient
responses in Figures 11 through 14 are tested on evaluation
board shown in Figure 18. On the evaluation board, it
consists of NCP565 regulator circuit with decoupling and
filter capacitors and the pulse controlled current sink to
obtain load current transitions. The load current transitions
are measured by current probe. Because the signal from
current probe has some time delay, it causes
un−synchronization between the load current transition and
output voltage response, which is shown in Figures 11
through 14.
GEN
V
out
−V
CC
V
NCP565
RL
V
in
Evaluation Board
Pulse
GND
+
+
GND
Scope Voltage Probe
Figure 18. Schematic for Transient Response Measurement
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8
NCP565/NCV565
PCB Layout Considerations
several capacitors in parallel. This reduces the overall ESR
and reduces the instantaneous output voltage drop under
transient load conditions. The output capacitor network
should be as close as possible to the load for the best results.
The schematic of NCP565 typical application circuit, which
this PCB layout is base on, is shown in Figure 19. The output
voltage is set to 3.3 V for this demonstration board according
to the feedback resistors in the Table 1.
Good PCB layout plays an important role in achieving
good load transient performance. Because it is very sensitive
to its PCB layout, particular care has to be taken when
tackling Printed Circuit Board (PCB) layout. The figures
below give an example of a layout where parasitic elements
are minimized. For microprocessor applications it is
customary to use an output capacitor network consisting of
V
out
2
4
5
V
V
out
V
in
in
NCP565
1
Adj
NC
C
1
C
2
C
4
C
3
C
3
150 m
150 m
10 m
150 m
150 m
GND
3
GND
GND
R
2
R
1
15.8 k
42.2 k
C
6
5.6 p
Figure 19. Schematic of NCP565 Typical Application Circuit
Figure 20. Top Layer
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9
NCP565/NCV565
Figure 21. Bottom Layer
NCP565
ON Semiconductor
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D1
R2
R1
C6
VIN
VOUT
C2
C3
C5
C1
GND
GND
July, 2003
Figure 22. Silkscreen Layer
Table 1. Bill of Materials for NCP565 Adj Demonstration Board
Item
Used #
Component
Designators
Suppliers
Part Number
1
4
Radial Lead Aluminum Capacitor
C1, C2, C3, C5
Sanyo Oscon
16SA150M
150 mF/16 V
2
1
Radial Lead Aluminum Capacitor
C4
Sanyo Oscon
10SL10M
10 mF/10 V
3
4
5
6
1
1
1
1
SMT Chip Resistor (0805) 15.8 K 1%
SMT Chip Resistor (0805) 42.2 K 1%
SMT Ceramic Capacitor (0603) 5.6 pF 10%
NCP565 Low Dropout Linear Regulator
R2
R1
C6
U1
Vishay
Vishay
CRCW08051582F
CRCW08054222F
VJ0603A5R6KXAA
NCP565D2TR4
Vishay
ON Semiconductor
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NCP565/NCV565
Protection Diodes
Thermal Considerations
When large external capacitors are used with a linear
regulator it is sometimes necessary to add protection diodes.
If the input voltage of the regulator gets shorted, the output
capacitor will discharge into the output of the regulator. The
discharge current depends on the value of the capacitor, the
This series contains an internal thermal limiting circuit
that is designed to protect the regulator in the event that the
maximum junction temperature is exceeded. This feature
provides protection from a catastrophic device failure due to
accidental overheating. It is not intended to be used as a
substitute for proper heat sinking. The maximum device
power dissipation can be calculated by:
output voltage and the rate at which V drops. In the
in
NCP565 linear regulator, the discharge path is through a
large junction and protection diodes are not usually needed.
If the regulator is used with large values of output
capacitance and the input voltage is instantaneously shorted
to ground, damage can occur. In this case, a diode connected
as shown in Figure 23 is recommended.
T
* T
A
J(max)
P
D
+
R
qJA
200
180
160
140
DFN 1 oz Cu
DFN 2 oz Cu
1N4002 (Optional)
V
in
V
out
V
V
out
in
SOT−223 1 oz Cu
C
Adj
NCP565
120
100
80
SOT−223 2 oz Cu
C
2
C
1
2
D PAK 1 oz Cu
Adj
GND
R
R
1
2
D PAK 2 oz Cu
60
2
40
0
50 100 150 200 250 300 350 400 450 500
COPPER HEAT−SPREADER AREA (mm sq)
Figure 24. Thermal Resistance
Figure 23. Protection Diode for Large
Output Capacitors
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11
NCP565/NCV565
ORDERING INFORMATION
Device
†
Nominal Output Voltage*
Package
Shipping
2
NCP565D2T
D PAK
2
50 Units / Tube
NCP565D2TG
D PAK
(Pb−Free)
2
NCP565D2TR4
D PAK
Adj
2
800 / Tape & Reel
3000 / Tape & Reel
50 Units / Tube
NCP565D2TR4G
D PAK
(Pb−Free)
NCP565MNADJT2G
DFN6
(Pb−Free)
2
NCP565D2T12
D PAK
2
NCP565D2T12G
D PAK
(Pb−Free)
2
NCP565D2T12R4
NCP565D2T12R4G
D PAK
2
800 / Tape & Reel
D PAK
Fixed (1.2 V)
(Pb−Free)
NCP565MN12T2G
NCP565ST12T3G
NCP565D2T33G
NCP565D2T33R4G
NCP565MN33T2G
DFN6
(Pb−Free)
3000 / Tape & Reel
4000 / Tape & Reel
50 Units / Tube
SOT−223
(Pb−Free)
2
D PAK
(Pb−Free)
2
D PAK
800 / Tape & Reel
3000 / Tape & Reel
Fixed (3.3 V)
(Pb−Free)
DFN6
(Pb−Free)
2
NCV565D2TG
D PAK
50 Units / Tube
Adj
(Pb−Free)
NCV565D2TR4G
800 / Tape & Reel
*For other fixed output versions, please contact the factory.
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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12
NCP565/NCV565
PACKAGE DIMENSIONS
D2PAK−3
D2T SUFFIX
CASE 936−03
ISSUE B
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. TAB CONTOUR OPTIONAL WITHIN DIMENSIONS
A AND K.
TERMINAL 4
−T−
OPTIONAL
CHAMFER
K
E
A
U
4. DIMENSIONS U AND V ESTABLISH A MINIMUM
MOUNTING SURFACE FOR TERMINAL 4.
5. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH OR GATE PROTRUSIONS. MOLD FLASH
AND GATE PROTRUSIONS NOT TO EXCEED
0.025 (0.635) MAXIMUM.
S
V
B
H
F
1
2
3
M
L
INCHES
DIM MIN MAX
0.403 9.804 10.236
MILLIMETERS
J
D
MIN MAX
P
N
A
B
C
D
E
F
0.386
0.356
0.170
0.026
0.045
0.368 9.042
0.180 4.318
0.036 0.660
0.055 1.143
9.347
4.572
0.914
1.397
G
0.010 (0.254)M
T
R
0.051 REF
0.100 BSC
0.539 0.579 13.691 14.707
0.125 MAX
0.050 REF
1.295 REF
G
H
J
2.540 BSC
C
3.175 MAX
1.270 REF
K
L
0.000
0.088
0.018
0.058
0.010 0.000
0.254
2.591
0.660
1.981
M
N
P
R
S
U
V
0.102 2.235
0.026 0.457
0.078 1.473
5_REF
5_REF
0.116 REF
0.200 MIN
0.250 MIN
2.946 REF
5.080 MIN
6.350 MIN
SOLDERING FOOTPRINT*
8.38
0.33
1.016
0.04
10.66
0.42
5.08
0.20
3.05
0.12
17.02
0.67
mm
inches
ǒ
Ǔ
SCALE 3:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
13
NCP565/NCV565
PACKAGE DIMENSIONS
D2PAK 5
CASE 936A−02
ISSUE C
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. TAB CONTOUR OPTIONAL WITHIN DIMENSIONS A
AND K.
4. DIMENSIONS U AND V ESTABLISH A MINIMUM
MOUNTING SURFACE FOR TERMINAL 6.
5. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH OR GATE PROTRUSIONS. MOLD FLASH
AND GATE PROTRUSIONS NOT TO EXCEED 0.025
(0.635) MAXIMUM.
−T−
TERMINAL 6
OPTIONAL
CHAMFER
A
E
U
S
K
V
B
H
1
2
3
4 5
INCHES
MILLIMETERS
M
L
DIM
A
B
C
D
E
MIN
MAX
0.403
0.368
0.180
0.036
0.055
MIN
9.804
9.042
4.318
0.660
1.143
MAX
10.236
9.347
4.572
0.914
1.397
0.386
0.356
0.170
0.026
0.045
D
P
N
M
0.010 (0.254)
T
G
R
G
H
K
L
M
N
P
0.067 BSC
1.702 BSC
14.707
1.270 REF
0.539
0.579 13.691
0.050 REF
0.000
0.088
0.018
0.058
0.010
0.102
0.026
0.078
0.000
2.235
0.457
1.473
0.254
2.591
0.660
1.981
C
R
S
U
V
5_ REF
5_ REF
0.116 REF
0.200 MIN
0.250 MIN
2.946 REF
5.080 MIN
6.350 MIN
SOLDERING FOOTPRINT*
8.38
0.33
1.702
0.067
10.66
0.42
1.016
0.04
3.05
0.12
16.02
0.63
mm
inches
ǒ
Ǔ
SCALE 3:1
2
5−LEAD D PAK
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
14
NCP565/NCV565
PACKAGE DIMENSIONS
SOT−223 (TO−261)
CASE 318E−04
ISSUE L
D
b1
NOTES:
6. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
7. CONTROLLING DIMENSION: INCH.
4
2
MILLIMETERS
INCHES
NOM
0.064
0.002
0.030
0.121
0.012
0.256
0.138
0.091
0.037
0.069
0.276
−
H
E
E
DIM
A
A1
b
b1
c
D
E
e
e1
L1
MIN
1.50
0.02
0.60
2.90
0.24
6.30
3.30
2.20
0.85
1.50
6.70
0°
NOM
1.63
0.06
0.75
3.06
0.29
6.50
3.50
2.30
0.94
1.75
7.00
−
MAX
1.75
0.10
0.89
3.20
0.35
6.70
3.70
2.40
1.05
2.00
7.30
10°
MIN
0.060
0.001
0.024
0.115
0.009
0.249
0.130
0.087
0.033
0.060
0.264
0°
MAX
0.068
0.004
0.035
0.126
0.014
0.263
0.145
0.094
0.041
0.078
0.287
10°
1
3
b
e1
e
C
q
H
E
A
q
0.08 (0003)
A1
L1
SOLDERING FOOTPRINT*
3.8
0.15
2.0
0.079
6.3
0.248
2.3
0.091
2.3
0.091
2.0
0.079
mm
inches
1.5
0.059
ǒ
Ǔ
SCALE 6:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
15
NCP565/NCV565
PACKAGE DIMENSIONS
DFN6, 3x3.3, 0.95 PITCH
CASE 506AX−01
ISSUE O
A
NOTES:
D
1. DIMENSIONS AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.25 AND 0.30 mm
FROM TERMINAL.
B
E
4. COPLANARITY APPLIES TO THE EXPOSED PAD
AS WELL AS THE TERMINALS.
PIN 1
REFERENCE
MILLIMETERS
DIM MIN
0.80
A1 0.00
NOM MAX
A
−−−
−−−
0.90
0.05
2X
0.15
C
A3
0.20 REF
−−−
3.00 BSC
−−−
3.30 BSC
−−−
b
0.30
0.40
2.10
1.30
2X
D
D2 1.90
E
E2 1.10
0.15
C
TOP VIEW
e
K
L
0.95 BSC
−−−
−−−
0.10 C
0.08 C
0.20
0.40
−−−
0.60
0.15
A
L1 0.00
−−−
6X
SEATING
PLANE
(A3)
C
SIDE VIEW
D2
A1
SOLDERING FOOTPRINT*
4X
3.60
e
6X L
6X
0.50
K
1.35
1
3
1
E2
0.95
PITCH
2.15
6X L1
6
4
6X b (NOTE 3)
0.10 C A B
0.05
6X
BOTTOM VIEW
DIMENSIONS: MILLIMETERS
0.83
C
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
The product described herein (NCP565), may be covered by one or more of the following U.S. patents: 5,920,184; 5,834,926.
There may be other patents pending.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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