NCP706MX22TAG [ONSEMI]
1A, 1% Precision Very Low Dropout Voltage Regulator with Enable; 1A ， 1 ％精度非常低压差稳压器与启用
| 型号： | NCP706MX22TAG |
| 厂家： | 
ONSEMI |
| 描述： | 1A, 1% Precision Very Low Dropout Voltage Regulator with Enable |
| 文件： | 总12页 (文件大小：505K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NCP706
1A, 1% Precision Very Low
Dropout Voltage Regulator
with Enable
The NCP706 is a Very Low Dropout Regulator which provides up to
1 A of load current and maintains excellent output voltage accuracy of
1% including line, load and temperature variations. The operating
input voltage range from 2.4 V up to 5.5 V makes this device suitable
for Li−ion battery powered products as well as post−regulation
applications. The product is available in 2.1 V and 2.2 V fixed output
voltage options. NCP706 is fully protected against overheating and
output short circuit.
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MARKING
DIAGRAM
XXMG
G
XDFN8
Very small 8−pin XDFN8 1.6 x 1.2, 04P package makes the device
especially suitable for space constrained portable applications such as
tablets and smartphones.
CASE 711AS
XX = Specific Device Code
M
G
= Date Code
= Pb−Free Package
Features
• Operating Input Voltage Range: 2.4 V to 5.5 V
• Fixed Output Voltage Option: 2.1 V, 2.2 V
Other Output Voltage Options available on request.
• Low Quiescent Current of typ. 200 mA
(*Note: Microdot may be in either location)
PIN CONNECTION
• Very Low Dropout: 300 mV Max. at I
= 1 A
OUT
OUT
OUT
N/C
IN
1
2
3
4
8
7
6
5
•
1% Accuracy Over Load/Line/Temperature
• High PSRR: 60 dB at 1 kHz
IN
• Internal Soft−Start to Limit the Inrush Current
• Thermal Shutdown and Current Limit Protections
• Stable with a 4.7 mF Ceramic Output Capacitor
• Available in XDFN8 1.6 x 1.2, 04P 8−pin package
• These are Pb−Free Devices
EN
GND
SNS
(Top View)
IN
IN
OUT
OUT
N/C
8
7
6
5
1
2
3
4
Typical Applications
• Tablets, Smartphones,
• Wireless Handsets, Portable Media Players
• Portable Medical Equipment
• Other Battery Powered Applications
EN
GND
SNS
(Bottom View)
V
= 2.4 (2.5) − 5.5 V
V
= 2.1 (2.2) V @ 1 A
IN
OUT
IN
OUT
SNS
ORDERING INFORMATION
See detailed ordering and shipping information on page 11 of
this data sheet.
NCP706
GND
C
C
4.7 mF
Ceramic
IN
OUT
EN
ON
OFF
Figure 1. Typical Application Schematic
© Semiconductor Components Industries, LLC, 2013
1
Publication Order Number:
July, 2013 − Rev. 2
NCP706/D
NCP706
Figure 2. Simplified Internal Schematic Block Diagram
PIN FUNCTION DESCRIPTION
Pin No.
XDFN8
Pin Name
OUT
OUT
N/C
Description
1
2
3
4
5
6
Regulated output voltage. A minimum 4.7 mF ceramic capacitor is needed from this pin to ground to
assure stability.
Not connected. This pin can be tied to ground to improve thermal dissipation.
Remote sense connection. This pin should be connected to the output voltage rail.
Power supply ground.
SNS
GND
EN
Enable pin. Driving EN over 0.9 V turns on the regulator. Driving EN below 0.4 V puts the regulator
into shutdown mode.
7
8
−
IN
IN
Input pin. A small capacitor is needed from this pin to ground to assure stability.
Exposed
Pad
This pad enhances thermal performance and is electrically connected to GND. It is recommended
that the exposed pad is connected to the ground plane on the board or otherwise left open.
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2
NCP706
ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
−0.3 V to 6 V
−0.3 V to VIN + 0.3 V
−0.3 V to VIN + 0.3 V
Indefinite
Unit
V
Input Voltage (Note 1)
V
IN
Output Voltage
V
OUT
V
Enable Input
V
EN
V
Output Short Circuit Duration
Maximum Junction Temperature
Storage Temperature
t
s
SC
T
125
°C
°C
V
J(MAX)
T
−55 to 150
2000
STG
ESD Capability, Human Body Model (Note 2)
ESD Capability, Machine Model (Note 2)
ESD
HBM
ESD
200
V
MM
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Refer to ELECTRICAL CHARACTERISTIS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per EIA/JESD22−A114
ESD Machine Model tested per EIA/JESD22−A115
Latch−up Current Maximum Rating tested per JEDEC standard: JESD78
THERMAL CHARACTERISTICS
Rating
Symbol
Value
Unit
Thermal Characteristics, XDFN8 1.6x1.2, 04P
Thermal Resistance, Junction−to−Air
R
160
°C/W
q
JA
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3
NCP706
ELECTRICAL CHARACTERISTICS − VOLTAGE VERSION 2.1 V
−40°C ≤ T ≤ 125°C; V = V
+ 0.3 V or 2.4 V, whichever is greater; I
= 10 mA, C = C
= 4.7 mF, V = 0.9 V, unless
OUT EN
J
IN
OUT(NOM)
OUT
IN
otherwise noted. Typical values are at T = +25°C. (Note 3)
J
Parameter
Operating Input Voltage
Undervoltage lock−out
Output Voltage Accuracy
Line Regulation
Test Conditions
Symbol
Min
Typ
Max
5.5
Unit
V
V
IN
2.4
1.2
V
V
V
rising
UVLO
1.6
2.10
2
1.9
V
IN
+ 0.3 V ≤ V ≤ 4.5 V, I
= 0 – 1 A
V
OUT
2.079
2.121
V
OUT
OUT
IN
OUT
+ 0.3 V ≤ V ≤ 4.5 V, I
= 10 mA
Reg
mV
mV
mV
IN
OUT
LINE
LOAD
LOAD
Load Regulation
I
= 0 mA to 1 A
Reg
2
OUT
Load Transient
I
= 10 mA to 1A or 10 mA to 1 A in 10 ms,
= 10 mF
Tran
120
OUT
C
OUT
Dropout voltage (Note 4)
Output Current Limit
Quiescent current
Ground current
I
= 1 A, V
= 2.1 V
V
300
230
mV
A
OUT
OUT(nom)
DO
V
= 90% V
I
CL
1.1
0.9
OUT
OUT(nom)
I
= 0 mA
= 1 A
I
180
200
0.1
1.5
mA
mA
mA
mA
OUT
OUT
Q
I
I
GND
Shutdown current
V
≤ 0 V, V = 2.0 to 5.5 V
1
5
EN
IN
Reverse Leakage Current
in Shutdown
V
V
= 5.5 V, V
< 0.4 V
= V
,
I
REV
IN
EN
OUT
OUT(NOM)
EN Pin High Threshold
EN Pin Low Threshold
V
V
Voltage increasing
Voltage decreasing
V
EN_HI
V
V
EN
EN
V
0.4
EN_LO
EN Pin Input Current
V
= 5.5 V
I
100
200
500
nA
EN
EN
Turn−on Time
C
= 4.7 mF,
t
ms
OUT
ON
from assertion EN pin to 98% V
out(nom)
Power Supply Rejection Ratio
Output Noise Voltage
V
V
OUT
= 2.6 V,
f = 100 Hz
f = 1 kHz
f = 10 kHz
PSRR
60
60
40
dB
IN
= 2.1 V
OUT
I
= 0.5 A
V
OUT
= 2.1 V, V = 2.6 V, I
= 0.5 A
V
NOISE
280
mV
rms
IN
OUT
f = 100 Hz to 100 kHz
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
Temperature increasing from T = +25°C
T
160
20
°C
°C
J
SD
Temperature falling from T
T
SDH
−
−
SD
3. Performance guaranteed over the indicated operating temperature range by design and/or characterization production tested at
T = T = 25°C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
J
A
4. Characterized when VOUT falls 100 mV below the regulated voltage at VIN = VOUT(NOM) + 0.3 V.
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4
NCP706
ELECTRICAL CHARACTERISTICS − VOLTAGE VERSION 2.2 V
−40°C ≤ T ≤ 125°C; V = V
+ 0.3 V or 2.5 V, whichever is greater; I
= 10 mA, C = C
= 4.7 mF, V = 0.9 V, unless
OUT EN
J
IN
OUT(NOM)
OUT
IN
otherwise noted. Typical values are at T = +25°C. (Note 5)
J
Parameter
Operating Input Voltage
Undervoltage lock−out
Output Voltage Accuracy
Line Regulation
Test Conditions
Symbol
VIN
Min
Typ
Max
5.5
Unit
V
2.5
1.2
V
V
V
rising
UVLO
VOUT
1.6
2.2
2
1.9
V
IN
+ 0.3 V ≤ V ≤ 4.5 V, I
= 0 – 1 A
2.178
2.222
V
OUT
OUT
IN
OUT
+ 0.3 V ≤ V ≤ 4.5 V, I
= 10 mA
Reg
mV
mV
mV
IN
OUT
LINE
LOAD
LOAD
Load Regulation
I
= 0 mA to 1 A
Reg
2
OUT
Load Transient
I
= 10 mA to 1A or 10 mA to 1 A in 10 ms,
= 10 mF
Tran
120
OUT
C
OUT
Dropout voltage (Note 6)
Output Current Limit
Quiescent current
Ground current
I
= 1 A, V
= 2.2 V
VDO
300
230
1
mV
A
OUT
OUT(nom)
V
= 90% V
ICL
IQ
1.1
0.9
OUT
OUT(nom)
IOUT = 0 mA
IOUT = 1 A
180
200
0.1
mA
mA
mA
V
IGND
Shutdown current
V
≤ 0 V, V = 2.0 to 5.5 V
EN
IN
EN Pin High Threshold
EN Pin Low Threshold
V
V
Voltage increasing
Voltage decreasing
V
EN_HI
EN_LO
EN
EN
V
0.4
EN Pin Input Current
VEN = 5.5 V
= 4.7 mF, from assertion EN pin to 98%
I
100
200
500
nA
EN
Turn−on Time
C
V
t
ms
OUT
ON
out(nom)
Power Supply Rejection Ratio
Output Noise Voltage
V
OUT
= 3.2 V, V
= 2.2 V f = 100 Hz
f = 1 kHz
PSRR
55
70
60
dB
IN
OUT
I
= 0.5 A
f = 10 kHz
V
= 2.2 V, V = 2.7 V, I
= 0.5 A
VNOISE
300
mV
rms
OUT
IN
OUT
f = 100 Hz to 100 kHz
Temperature increasing from TJ = +25°C
Temperature falling from T
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
T
SD
160
20
°C
°C
T
SDH
−
−
SD
5. Performance guaranteed over the indicated operating temperature range by design and/or characterization production tested at T = T =
J
A
25_C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
6. Characterized when V
falls 100 mV below the regulated voltage at V = V
+ 0.3 V.
OUT
IN
OUT(NOM)
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5
NCP706
TYPICAL CHARACTERISTICS
2.102
2.100
2.098
2.096
2.094
2.092
2.090
2.208
V
= 2.4 V
= 10 mA
= 4.7 mF
V
= 2.5 V
= 10 mA
= 4.7 mF
IN
IN
I
C
I
C
OUT
OUT
2.204
2.200
2.196
2.192
2.188
2.184
OUT
OUT
V
= 2.1 V
V
= 2.2 V
OUT(NOM)
OUT(NOM)
−40 −20
0
20
40
60
80
100 120
−40 −20
0
20
40
60
80
100 120
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 3. Output Voltage vs. Temperature
Figure 4. Output Voltage vs. Temperature
2.4
2.4
2.0
1.6
1.2
0.8
0.4
0.0
2.0
1.6
1.2
0.8
0.4
0.0
V
= V
EN
IN
V
IN
= V
EN
T = 25°C
A
T = 25°C
A
C
= 4.7 mF
OUT
OUT(NOM)
C
= 4.7 mF
OUT
OUT(NOM)
V
= 2.1 V
V
= 2.2 V
I
I
I
I
= 10 mA
OUT
OUT
OUT
OUT
I
I
I
I
= 10 mA
= 50 mA
= 250 mA
= 500 mA
OUT
OUT
OUT
OUT
= 50 mA
= 250 mA
= 500 mA
0.0
1.0
2.0
3.0
4.0
5.0
0.0
1.0
2.0
3.0
4.0
5.0
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
Figure 5. Output Voltage vs. Input Voltage
Figure 6. Output Voltage vs. Input Voltage
260
240
220
200
180
160
140
240
220
200
180
160
140
120
I
= 0
= 4.7 mF
I
= 0
= 4.7 mF
OUT
OUT
C
C
OUT
OUT
T = 125°C
V
= 2.2 V
V
= 2.1 V
A
OUT(NOM)
OUT(NOM)
T = 125°C
A
T = 25°C
A
T = 25°C
A
T = −40°C
A
T = −40°C
A
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
Figure 7. Quiescent Current vs. Input Voltage
Figure 8. Quiescent Current vs. Input Voltage
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NCP706
TYPICAL CHARACTERISTICS
260
240
220
200
180
160
140
260
V
V
V
= 2.4 V
= 4.0 V
= 5.5 V
V
IN
V
IN
= 3.0 V
= 5.0 V
IN
IN
IN
V
= 2.5 V
= 4.0 V
= 5.5 V
V
IN
V
IN
= 3.0 V
= 5.0 V
IN
240
220
200
180
160
140
V
IN
V
IN
C
= 4.7 mF
C
= 4.7 mF
OUT
OUT
T = 25°C
A
T = 25°C
A
V
= 2.1 V
V
= 2.2 V
OUT(NOM)
OUT(NOM)
0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
Figure 9. Ground Current vs. Output Current
Figure 10. Ground Current vs. Output Current
2
1.8
1.6
1.4
1.2
1
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
V
= 0
V
= 0
= V
= 4.7 mF
OUT
OUT
V
EN
= V
V
IN
EN IN
C
= 4.7 mF
C
OUT
OUT
T = 25°C
A
OUT(NOM)
T = 25°C
A
V
= 2.1 V
V
= 2.2 V
OUT(NOM)
0.8
0.6
0.4
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
Figure 11. Short Current Limitation vs. Input
Voltage
Figure 12. Short Current Limitation vs. Input
Voltage
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0.00
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0.00
V
= V
IN
= 4.7 mF
EN
V
= V
IN
= 4.7 mF
EN
C
OUT
C
OUT
125°C
25°C
V
= 2.2 V
OUT(NOM)
V
= 2.1 V
OUT(NOM)
125°C
25°C
−40°C
−40°C
0
0.2
0.4
0.6
0.8
1
0
0.2
0.4
0.6
0.8
1
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
Figure 13. Dropout Voltage vs. Output Current
Figure 14. Dropout Voltage vs. Output Current
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7
NCP706
100
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
V
= 5.5 V
IN
V
V
IN
= 2.6 V + 200 V Modulation
PP
= 0
EN
I
= 500 mA
OUT
C
= C
T = 25°C
= 4.7 mF
IN
OUT
80
60
40
20
T = 25°C
A
A
V
= 2.1 V
OUT(NOM)
C
C
C
= 22 mF
= 10 mF
= 4.7 mF
OUT
OUT
OUT
V
V
= 2.1 V
= 2.2 V
OUT(NOM)
OUT(NOM)
0
0.0
1.0
2.0
3.0
4.0
5.0
0.1
1
10
FREQUENCY (kHz)
100
1000
FORCED OUTPUT VOLTAGE (V)
Figure 15. Reverse Leakage Current in
Shutdown
Figure 16. PSRR vs. Frequency & Output
Capacitor
100
90
80
70
60
50
40
30
20
10
0
100
80
60
40
20
0
V
= 3.7 V + 200 V Modulation
PP
V
= 2.7 V + 200 V Modulation
PP
IN
IN
C
= 4.7 mF
I
= 500 mA
OUT
OUT
T = 25°C
T = 25°C
A
A
V
= 2.1 V
V
= 2.2 V
OUT(NOM)
OUT(NOM)
I
I
I
= 10 mA
= 100 mA
= 500 mA
C
C
C
= 22 mF
= 10 mF
OUT
OUT
OUT
OUT
OUT
OUT
= 4.7 mF
0.1
1
10
FREQUENCY (kHz)
100
1000
0.1
1.0
10
FREQUENCY (kHz)
100
1000
Figure 17. PSRR vs. Frequency & Output
Capacitor
Figure 18. PSRR vs. Frequency & Output
Current
80
60
40
20
0
2.5
2.0
1.5
1.0
0.5
0.0
I
= 500 mA
= 2.7 V
T = 25°C
OUT
V
IN
A
V
= 2.1 V
OUT(NOM)
V
= 3.2 V + 200 V Modulation
PP
IN
C
= 4.7 mF
OUT
T = 25°C
A
V
= 2.2 V
OUT(NOM)
I
I
I
= 10 mA
= 100 mA
= 500 mA
OUT
OUT
OUT
C
C
= 4.7 mF
= 10 mF
OUT
OUT
0.1
1
10
100
1000
0.01
0.1
1
10
100
1000
FREQUENCY (kHz)
FREQUENCY (kHz)
Figure 19. PSRR vs. Frequency & Output
Current
Figure 20. Output Noise Density vs. Frequency
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NCP706
TYPICAL CHARACTERISTICS
2.5
2.0
1.5
1.0
0.5
0.0
I
= 500 mA
= 2.6 V
T = 25°C
OUT
V
IN
A
V
= 2.2 V
OUT(NOM)
C
C
= 4.7 mF
= 10 mF
OUT
OUT
0.01
0.1
1
10
100
1000
FREQUENCY (kHz)
Figure 21. Output Noise Density vs. Frequency
Figure 22. Turn−on by Coupled Input and
Figure 23. Turn−on by Coupled Input and
Enable Pins
Enable Pins
Figure 24. Turn−on by Enable Signal
Figure 25. Turn−on by Enable Signal
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NCP706
TYPICAL CHARACTERISTICS
Figure 26. Line Transient Response
Figure 27. Line Transient Response
Figure 28. Load Transient Response
Figure 29. Load Transient Response
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10
NCP706
APPLICATIONS INFORMATION
Thermal
Input Decoupling (Cin)
A 4.7 mF capacitor either ceramic or tantalum is
recommended and should be connected as close as possible
to the pins of NCP706 device. Higher values and lower ESR
will improve the overall line transient response.
As power across the NCP706 increases, it might become
necessary to provide some thermal relief. The maximum
power dissipation supported by the device is dependent
upon board design and layout. Mounting pad configuration
on the PCB, the board material, and also the ambient
temperature affect the rate of temperature rise for the part.
This is stating that when the NCP706 has good thermal
conductivity through the PCB, the junction temperature will
be relatively low with high power dissipation.
Output Decoupling (Cout)
The minimum decoupling value is 4.7 mF and can be
augmented to fulfill stringent load transient requirements.
The regulator accepts ceramic chip capacitors MLCC. If a
tantalum capacitor is used, and its ESR is large, the loop
oscillation may result. Larger values improve noise
rejection and PSRR.
The power dissipation across the device can be roughly
represented by the equation:
ǒ
Ǔ
(eq. 1)
PD + VIN * VOUT * IOUT [W]
Enable Operation
The maximum power dissipation depends on the thermal
resistance of the case and circuit board, the temperature
differential between the junction and ambient, PCB
orientation and the rate of air flow.
The maximum allowable power dissipation can be
calculated using the following equation:
The enable pin EN will turn on or off the regulator. These
limits of threshold are covered in the electrical specification
section of this data sheet. If the enable is not used then the
pin should be connected to V .
IN
Hints
Please be sure the V and GND lines are sufficiently wide.
If their impedance is high, noise pickup or unstable
operation may result.
Set external components, especially the output capacitor,
as close as possible to the circuit.
The sense pin SNS trace is recommended to be kept as far
from noisy power traces as possible and as close to load as
possible.
in
ǒ
Ǔ
(eq. 2)
PMAX + TJ * TA ńqJA [W]
Where (T − T ) is the temperature differential between
the junction and the surrounding environment and q is the
thermal resistance from the junction to the ambient.
Connecting the exposed pad and non connected pin 3 to
a large ground pad or plane helps to conduct away heat and
improves thermal relief.
J
A
JA
ORDERING INFORMATION
Nominal Ooutput
†
Voltage
Device
Marking
Package
Shipping
NCP706MX21TAG
2.1 V
QM
XDFN8
(Pb−Free)
3000 / Tape & Reel
NCP706MX22TAG
2.2 V
QR
XDFN8
(Pb−Free)
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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11
NCP706
PACKAGE DIMENSIONS
XDFN8 1.6x1.2, 0.4P
CASE 711AS
ISSUE O
NOTES:
L
L
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
D
A
B
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
L1
DETAIL A
MILLIMETERS
ALTERNATE TERMINAL
CONSTRUCTIONS
DIM
A
A1
A3
b
MIN
0.35
0.00
MAX
0.45
0.05
E
PIN ONE
IDENTIFIER
0.125 REF
EXPOSED Cu
MOLD CMPD
0.13
0.23
2X
0.10
C
1.60 BSC
D
D2
E
E2
e
1.20
1.40
1.20 BSC
2X
0.10
C
0.20
0.40
TOP VIEW
DETAIL B
0.40 BSC
ALTERNATE
0.15
0.25
L
L1
A
CONSTRUCTION
0.05 REF
DETAIL B
0.10
0.08
C
C
A3
A1
RECOMMENDED
8X
MOUNTING FOOTPRINT*
SEATING
PLANE
NOTE 3
C
SIDE VIEW
D2
8X
0.35
1.44
PACKAGE
OUTLINE
DETAIL A
1.40
1
4
E2
1
0.44
0.40
PITCH
8X
0.26
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
8
5
8X b
8X
L
e
e/2
0.10
0.05
C
C
A
B
BOTTOM VIEW
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