NCP785BST150T3G [ONSEMI]
Wide Input Voltage Range PSRR Linear Regulator;
| 型号： | NCP785BST150T3G |
| 厂家： | 
ONSEMI |
| 描述： | Wide Input Voltage Range PSRR Linear Regulator |
| 文件： | 总8页 (文件大小：132K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NCP785B
Product Preview
Wide Input Voltage Range
10ꢀmA Ultra-Low Iq, High
PSRR Linear Regulator with
Enable Pin
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MARKING
The NCP785B is a high−performance linear regulator, offering a
very wide operating input voltage range of up to 450 V DC, with an
output current of up to 10 mA.
DIAGRAMS
4
Ideal for high input voltage applications such as industrial and home
metering, home appliances. The NCP785B LDO offers 5% initial
accuracy, extremely high−power supply rejection ratio and ultra−low
quiescent current. It is optimized for high−voltage operations, making
them ideal for harsh environment applications.
The device is offered in fixed output voltages 3.3 V, 5.0 V, 12 V and
15 V. NCP785B has an Enable pin with internal pull up which allows
for easy output voltage ON/OFF control. SOT−223 package option
provides good thermal performance as well as helps to minimize the
overall solution size.
AYW
XXXXXG
G
SOT−223
S SUFFIX
CASE 318E
1
2
3
(Top View)
= Assembly Location
A
Y
W
= Year
= Work Week
XXXXX = Specific Device Code
G
= Pb−Free Package
Features
(Note: Microdot may be in either location)
• Wide Input Voltage Range:
DC: Up to 450 V
AC: 85 V to 260 V (half−wave rectifier and 2.2 mF capacitor)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
• 10 mA Guaranteed Output Current
• Ultra Low Quiescent Current: Typ. 15 mA (V
≤ 5 V)
OUT
•
5% Accuracy Over Full Load, Line and Temperature Variations
• Ultra−high PSRR: 70 dB at 60 Hz, 90 dB at 100 kHz
• Stable with Ceramic Output Capacitor 22 mF MLCC
• Thermal Shutdown and Current Limit Protection
• Available in Thermally Enhanced SOT−223 Package
• This is a Pb−Free Device
Typical Applications
• Industrial Applications, Home Appliances
• Home Metering / Network Application
• Off−line Power Supplies
V
V
IN
IN
V
V
85 VAC − 260 VAC
OUT
OUT
15 V − 450 V
V
V
V
V
OUT
IN
OUT
IN
3.3 V, 5 V,
12 V, 15 V
3.3 V, 5 V,
12 V, 15 V
C
C
NCP785B
EN
NCP785B
C
OUT
IN
OUT
C
IN
2.2 μF/
EN
22 μF
2.2 μF
22 μF
GND
450 V
GND
V
EN
V
EN
ON
ON
OFF
OFF
Figure 1. Typical Applications
This document contains information on a product under development. ON Semiconductor
reserves the right to change or discontinue this product without notice.
© Semiconductor Components Industries, LLC, 2014
1
Publication Order Number:
February, 2014 − Rev. P0
NCP785B/D
NCP785B
VIN
EN
ENB
Current
Limit
+
−
EN
V
REF
NB
+
−
1.25 V
VOUT
GND
Thermal
Shutdown
EN
EN
NCP785B
Figure 2. Simplified Internal Block Diagram
Table 1. PIN FUNCTION DESCRIPTION
Pin No.
(SOT−223)
Pin Name
VIN
Description
1
2
Supply Voltage Input. Connect 1 mF capacitor from VIN to GND.
EN
Enable pin. Allows to turn−on/off the Regulator’s output voltage. Pulling the EN pin low turns−off the
NCP785B. Releasing the EN pin allows the internal pull−up to turn−on the Regulator. This pin should
be driven by an open collector output.
3
VOUT
GND
Regulator Output. Connect 10 mF or higher MLCC capacitor from VOUT to GND.
4 (Tab)
Ground connection.
Table 2. ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
−0.3 to 700
−0.3 to 18
−0.3 to 5.5
150
Unit
V
Input Voltage (Note 1)
V
IN
Output Voltage
V
OUT
V
Enable Pin Voltage
V
EN
V
Maximum Junction Temperature
Storage Temperature
T
°C
°C
V
J(MAX)
T
STG
−55 to 150
2000
ESD Capability, Human Body Model (All pins except HV pin no.1) (Note 2)
ESD Capability, Machine Model (Note 2)
ESD
HBM
ESD
200
V
MM
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Peak 650 V max 1 ms non repeated for 1 s
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115)
Latch−up Current Maximum Rating tested per JEDEC standard: JESD78.
Table 3. THERMAL CHARACTERISTICS
Rating
Symbol
Value
Unit
Thermal Characteristics, SOT−223
R
73
°C/W
q
JA
Thermal Resistance, Junction−to−Air
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2
NCP785B
Table 4. ELECTRICAL CHARACTERISTICS, VOUT = 3.3 V (−40°C ≤ T ≤ 85°C; V = 340 V; I
= 100 mA, C = 1 mF,
IN
J
IN
OUT
C
= 22 mF, unless otherwise noted. Typical values are at T = +25°C.) (Note 3)
OUT
J
Parameter
Test Conditions
Symbol
Min
23
Typ
Max
450
Unit
V
Operating Input Voltage DC
Output Voltage Accuracy
V
IN
T = 25°C, Iout = 100 mA, 23 V ≤ Vin ≤ 450 V
V
OUT
V
OUT
3.1515
3.135
3.3
3.3
3.4485
3.465
V
J
−40°C ≤ T ≤ 85°C, Iout = 100 mA,
23 V ≤ Vin ≤ 450 V
V
J
Line Regulation
23 V ≤ Vin ≤ 450 V, Iout = 100 mA
Reg
−0.5
−1.0
11.5
0.2
0.6
+0.5
+1.0
%
%
LINE
Load Regulation
100 mA ≤ I
≤ 10 mA, Vin = 23 V
Reg
LOAD
OUT
Maximum Output Current (Note 4)
Quiescent Current
23 V ≤ Vin ≤ 450 V
= 0, 23 V ≤ Vin ≤ 450 V
I
mA
mA
mA
OUT
I
I
Q
15
26
27
OUT
Ground Current (Note 4)
23 V ≤ Vin ≤ 450 V
0 < I ≤ 10 mA
I
GND
OUT
EN Pin High Threshold
EN Pin Low Threshold
V
V
Voltage increasing
Voltage decreasing
V
1.4
V
EN
EN
EN_HI
V
0.8
3.3
EN_LO
EN Pin Pull up Current (Note 5)
EN Pin Voltage (Note 6)
Vin = 450 V
Vin = 450 V
I
5
mA
V
DC
DC
EN
V
3.0
70
EN
Power Supply Rejection Ratio
Vin = 340 V +1 Vpp
modulation, Iout = 100 mA
f = 1 kHz
PSRR
dB
DC
Output Noise
f = 10 kHz to 100 kHz
V
280
145
10
mVrms
°C
NOISE
Vin = 340 V , Iout = 100 mA
DC
Thermal Shutdown Temperature
(Note 5)
Temperature increasing from T = +25°C
T
SD
J
Thermal Shutdown Hysteresis
(Note 5)
Temperature falling from T
T
−
−
°C
SD
SDH
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Performance guaranteed over the indicated operating temperature range by design and/or characterization production tested at T = T =
J
A
25°C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
4. A proper heatsinking and/or low duty cycle pulse techniques are used to operate the device within the Safe Operating Area.
5. Guaranteed by design
6. Voltage present at the EN pin in case that this pin is left floating. It is generated by the internal EN Pin Pull−up Current.
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NCP785B
Table 5. ELECTRICAL CHARACTERISTICS, VOUT = 5.0 V (−40°C ≤ T ≤ 85°C; V = 340 V; I
= 100 mA, C = 1 mF,
IN
J
IN
OUT
C
= 22 mF, unless otherwise noted. Typical values are at T = +25°C.) (Note 7)
OUT
J
Parameter
Test Conditions
Symbol
Min
24
Typ
Max
450
Unit
V
Operating Input Voltage DC
Output Voltage Accuracy
V
IN
T = 25°C, Iout = 100 mA, 24 V ≤ Vin ≤ 450 V
V
OUT
V
OUT
4.775
4.75
5.0
5.0
5.225
5.25
V
J
−40°C ≤ T ≤ 85°C, Iout = 100 mA,
24 V ≤ Vin ≤ 450 V
V
J
Line Regulation
35 V ≤ Vin ≤ 450 V, Iout = 100 mA
Reg
−0.5
−1.0
12.7
0.2
+0.5
+1.0
%
%
LINE
Load Regulation
100 mA ≤ I
≤ 10 mA, Vin = 35 V
Reg
0.62
OUT
LOAD
Maximum Output Current (Note 8)
Quiescent Current
24 V ≤ Vin ≤ 450 V
= 0, 24 V ≤ Vin ≤ 450 V
I
mA
mA
mA
OUT
I
I
Q
15
26
27
OUT
Ground Current (Note 8)
24 V ≤ Vin ≤ 450 V
0 < I ≤ 10 mA
I
GND
OUT
EN Pin High Threshold
EN Pin Low Threshold
V
V
Voltage increasing
Voltage decreasing
V
1.4
V
EN
EN
EN_HI
V
0.8
3.3
EN_LO
EN Pin Pull up Current (Note 9)
EN Pin Voltage (Note 10)
Vin = 450 V
Vin = 450 V
I
5
mA
V
DC
DC
EN
V
3.0
70
EN
Power Supply Rejection Ratio
Vin = 340 V +1 Vpp
modulation, Iout = 100 mA
f = 1 kHz
PSRR
dB
DC
Output Noise
f = 10 kHz to 100 kHz
V
280
145
10
mVrms
°C
NOISE
Vin = 340 V , Iout = 100 mA
DC
Thermal Shutdown Temperature
(Note 9)
Temperature increasing from T = +25°C
T
SD
J
Thermal Shutdown Hysteresis
(Note 9)
Temperature falling from T
T
−
−
°C
SD
SDH
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
7. Performance guaranteed over the indicated operating temperature range by design and/or characterization production tested at T = T =
J
A
25°C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
8. A proper heatsinking and/or low duty cycle pulse techniques are used to operate the device within the Safe Operating Area.
9. Guaranteed by design
10.Voltage present at the EN pin in case that this pin is left floating. It is generated by the internal EN Pin Pull−up Current.
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NCP785B
Table 6. ELECTRICAL CHARACTERISTICS, VOUT = 12 V (−40°C ≤ T ≤ 85°C; V = 340 V; I
= 100 mA, C = 1 mF,
IN
J
IN
OUT
C
= 22 mF, unless otherwise noted. Typical values are at T = +25°C.) (Note 11)
OUT
J
Parameter
Test Conditions
Symbol
Min
Typ
Max
450
Unit
V
Operating Input Voltage DC
Output Voltage Accuracy
V
IN
35
T = 25°C, Iout = 100 mA, 35 V ≤ Vin ≤ 450 V
V
11.46
11.4
12
12
12.54
12.6
V
J
OUT
OUT
−40°C ≤ T ≤ 85°C, Iout = 100 mA,
35 V ≤ Vin ≤ 450 V
V
V
J
Line Regulation
35 V ≤ Vin ≤ 450 V, Iout = 100 mA
Reg
−0.5
−1.0
11.5
0.1
+0.5
+1.0
%/V
%
LINE
Load Regulation
100 mA ≤ I
≤ 10 mA, Vin = 35 V
Reg
0.66
OUT
LOAD
Maximum Output Current (Note 12)
Quiescent Current
38 V ≤ Vin ≤ 450 V
= 0, 35 V ≤ Vin ≤ 450 V
I
mA
mA
OUT
I
I
Q
12
18
19
OUT
Ground Current (Note 12)
35 V ≤ Vin ≤ 450 V
0 < I ≤ 10 mA
I
mA
GND
OUT
EN Pin High Threshold
EN Pin Low Threshold
V
V
Voltage increasing
Voltage decreasing
V
1.4
V
EN
EN
EN_HI
V
0.8
3.3
EN_LO
EN Pin Pull up Current (Note 13)
EN Pin Voltage (Note 14)
Vin = 450 V
Vin = 450 V
I
5
mA
V
DC
DC
EN
V
3.0
70
EN
Power Supply Rejection Ratio
Vin = 340 V +1 Vpp
modulation, Iout = 100 mA
f = 1 kHz
PSRR
dB
DC
Output Noise
f = 10 kHz to 100 kHz
V
280
145
10
mVrms
°C
NOISE
Vin = 340 V , Iout = 100 mA
DC
Thermal Shutdown Temperature
(Note 13)
Temperature increasing from T = +25°C
T
SD
J
Thermal Shutdown Hysteresis
(Note 13)
Temperature falling from T
T
−
−
°C
SD
SDH
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
11. Performance guaranteed over the indicated operating temperature range by design and/or characterization production tested at T = T =
J
A
25°C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
12.A proper heatsinking and/or low duty cycle pulse techniques are used to operate the device within the Safe Operating Area.
13.Guaranteed by design
14.Voltage present at the EN pin in case that this pin is left floating. It is generated by the internal EN Pin Pull−up Current.
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5
NCP785B
Table 7. ELECTRICAL CHARACTERISTICS, VOUT = 15 V (−40°C ≤ T ≤ 85°C; V = 340 V; I
= 100 mA, C = 1 mF,
IN
J
IN
OUT
C
= 22 mF, unless otherwise noted. Typical values are at T = +25°C.) (Note 15)
OUT
J
Parameter
Test Conditions
Symbol
Min
Typ
Max
450
Unit
V
Operating Input Voltage DC
Output Voltage Accuracy
V
IN
38
T = 25°C, Iout = 100 mA, 38 V ≤ Vin ≤ 450 V
V
14.325
14.25
15
15
15.675
15.75
V
J
OUT
OUT
−40°C ≤ T ≤ 85°C, Iout = 100 mA,
38 V ≤ Vin ≤ 450 V
V
V
J
Line Regulation
38 V ≤ Vin ≤ 450 V, Iout = 100 mA
Reg
−0.5
−1.0
11
0.1
+0.5
+1.0
%
%
LINE
Load Regulation
100 mA ≤ I
≤ 10 mA, Vin = 38 V
Reg
0.66
OUT
LOAD
Maximum Output Current (Note 16)
Quiescent Current
38 V ≤ Vin ≤ 450 V
= 0, 38 V ≤ Vin ≤ 450 V
I
mA
mA
mA
OUT
I
I
Q
17
27
28
OUT
Ground Current (Note 16)
38 V ≤ Vin ≤ 450 V
0 < I ≤ 10 mA
I
GND
OUT
EN Pin High Threshold
EN Pin Low Threshold
V
V
Voltage increasing
Voltage decreasing
V
1.4
V
EN
EN
EN_HI
V
0.8
3.3
EN_LO
EN Pin Pull up Current (Note 17)
EN Pin Voltage (Note 18)
Vin = 450 V
Vin = 450 V
I
5
mA
V
DC
DC
EN
V
3.0
70
EN
Power Supply Rejection Ratio
Vin = 340 V +1 Vpp
modulation, Iout = 100 mA
f = 1 kHz
PSRR
dB
DC
Output Noise
f = 10 kHz to 100 kHz
V
280
145
10
mVrms
°C
NOISE
Vin = 340 V , Iout = 100 mA
DC
Thermal Shutdown Temperature
(Note 17)
Temperature increasing from T = +25°C
T
SD
J
Thermal Shutdown Hysteresis
(Note 17)
Temperature falling from T
T
−
−
°C
SD
SDH
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
15.Performance guaranteed over the indicated operating temperature range by design and/or characterization production tested at T = T =
J
A
25°C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
16.A proper heatsinking and/or low duty cycle pulse techniques are used to operate the device within the Safe Operating Area.
17.Guaranteed by design
18.Voltage present at the EN pin in case that this pin is left floating. It is generated by the internal EN Pin Pull−up Current.
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6
NCP785B
APPLICATION INFORMATION
The typical application circuit for the NCP785B device is shown below.
VIN
15V – 450V
VOUT
3.3V, 5V, 12V, 15V
VIN
NCP785B
EN
VOUT
COUT
22μF
CIN
2.2μF
GND
VEN
ON
Figure 3. Typical Application Schematic
OFF
Input Decoupling (C1)
upon board design layout and used package. Mounting pad
configuration on the PCB, the board material, and also the
ambient temperature affect the rate of temperature rise for
the part. This is stating that when the NCP785B has good
thermal conductivity through the PCB, the junction
temperature will be relatively low with high power
dissipation applications.
A 1 mF capacitor either ceramic or electrolytic is
recommended and should be connected close to the input pin
of NCP785B. Higher value 2.2 mF is necessary to keep the
input voltage above the required minimum input voltage at
full load for AC voltage as low as 85 V with half wave
rectifier.
Output Decoupling (C2)
ENABLE Operation
The NCP785B Regulator does not require any specific
Equivalent Series Resistance (ESR). Thus capacitors
exhibiting ESRs ranging from a few mW up to 0.5 W can be
used safely. The minimum decoupling value is 22 mF. The
regulator accepts ceramic chip capacitors as well as
tantalum devices or low ESR electrolytic capacitors. Larger
values improve noise rejection and load transient response.
The enable pin EN of the NCP785B will turn on or off the
regulator’s output. The threshold limits are covered in the
electrical specification section of this data sheet. If the
enable function is not used then the EN pin should be left
disconnected. An internal current source pulls this pin high
to a voltage given by the internal resistor divider. The limit
of this voltage is mentioned in the electrical specification
section of this data sheet. Maximum applicable external
voltage at this pin from external source is limited to 5.0 V.
Layout Recommendations
Please be sure that the V and GND lines are sufficiently
IN
wide. When the impedance of these lines is high, there is a
chance to pick up noise or to cause the malfunction of
regulator.
VIN
EN
5 mA
Set external components, especially the output capacitor,
as close as possible to the circuit, and make leads as short as
possible.
V
EN
REF
+
1.25 V
−
500 kW
600 kW
EN
5.3 V
Thermal
EN
Thermal
As power across the NCP785B increases, it might become
necessary to provide some thermal relief. The maximum
power dissipation supported by the device is dependent
Shutdown
NCP785B
ORDERING INFORMATION:
Output
Voltage
3.3 V
5 V
Part Number
Case
TBD
TBD
TBD
TBD
Package
SOT223−4
SOT223−4
SOT223−4
SOT223−4
Marking
HVH
Shiping
Released PN
Marking
XAH
NCP785BST33T3G
NCP785BST50T3G
NCP785BST120T3G
NCP785BST150T3G
TBD
TBD
TBD
TBD
PCP785BST33T3G
PCP785BST50T3G
PCP785BST120T3G
PCP785BST150T3G
HVJ
XAJ
12 V
HVK
XAK
15 V
HVL
XAL
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7
NCP785B
PACKAGE DIMENSIONS
SOT−223 (TO−261)
CASE 318E−04
ISSUE N
D
b1
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCH.
MILLIMETERS
INCHES
NOM
0.064
0.002
0.030
0.121
0.012
0.256
0.138
0.091
0.037
−−−
4
2
DIM
A
A1
b
b1
c
D
E
e
e1
L
L1
MIN
1.50
0.02
0.60
2.90
0.24
6.30
3.30
2.20
0.85
0.20
1.50
6.70
0°
NOM
1.63
0.06
0.75
3.06
0.29
6.50
3.50
2.30
0.94
−−−
1.75
7.00
−
MAX
MIN
0.060
0.001
0.024
0.115
0.009
0.249
0.130
0.087
0.033
0.008
0.060
0.264
0°
MAX
0.068
0.004
0.035
0.126
0.014
0.263
0.145
0.094
0.041
−−−
H
E
E
1.75
0.10
0.89
3.20
0.35
6.70
3.70
2.40
1.05
−−−
2.00
7.30
10°
1
3
b
e1
e
0.069
0.276
−
0.078
0.287
10°
C
q
H
E
A
q
0.08 (0003)
STYLE 11:
PIN 1. MT 1
2. MT 2
A1
L
L1
3. GATE
4. MT 2
SOLDERING FOOTPRINT
3.8
0.15
2.0
0.079
6.3
0.248
2.3
0.091
2.3
0.091
2.0
0.079
mm
inches
1.5
0.059
ǒ
Ǔ
SCALE 6:1
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where
personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and
its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,
any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture
of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
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Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
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For additional information, please contact your local
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NCP785B/D
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