NCP81155 [ONSEMI]
MOSFET Driver;
| 型号： | NCP81155 |
| 厂家： | 
ONSEMI |
| 描述： | MOSFET Driver |
| 文件： | 总8页 (文件大小：68K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NCP81155
Product Preview
MOSFET Driver
The NCP81155 is a high−performance dual MOSFET gate driver
in a small 3 mm x 3 mm package, optimized to drive the gates of both
high−side and low−side power MOSFETs in a buck or buck−boost
application. VCC UVLO ensures the MOSFETs are off when supply
voltages are low. A bi−directional Enable pin provides a fault signal
to the controller when a UVLO fault is detected.
www.onsemi.com
Features
1
• Space−Efficient 3 mm x 3 mm DFN8 Thermally−Enhanced
Package
DFN8
MN SUFFIX
CASE 506BJ
• VCC Range of 4.5 V to 13.2 V
• Integrated Bootstrap Diode
• Compatible with 3.3 V and 5 V PWM Inputs
MARKING DIAGRAM
• Bi−Directional Enable Feature Pulls Enable Pin low during a
UVLO Fault.
1
81155
ALYWG
• Adaptive Anti−Cross Conduction Circuit Protects against
Cross−Conduction during FET Turn−on and Turn−off
• Output Disable Control Turns Off Both MOSFETs
G
• VCC Undervoltage Lockout
81155 = Specific Device Code
A
L
Y
W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
• E−Cigarettes
• Unmanned Aerial Vehicles (UAV)
(Note: Microdot may be in either location)
PIN CONNECTIONS
1
2
3
4
8
7
6
5
BST
PWM
EN
DRVH
SW
FLAG
9
GND
DRVL
VCC
(Top View)
ORDERING INFORMATION
†
Device
Package
Shipping
NCP81155MNTXG
DFN8
3000 / Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
This document contains information on a product under development. ON Semiconductor
reserves the right to change or discontinue this product without notice.
©
Semiconductor Components Industries, LLC, 2016
1
Publication Order Number:
October, 2017 − Rev. P1
NCP81155/D
NCP81155
BST
VCC
DRVH
SW
PWM
Logic
Anti−Cross
Conduction
VCC
DRVL
EN
VCC
UVLO
Fault
Figure 1. Simplified Block Diagram
Description
Table 1. Pin Descriptions
Pin No.
Symbol
1
BST
Floating bootstrap supply pin for high side gate driver. Connect the bootstrap capacitor between this pin
and the SW pin.
2
3
PWM
EN
Control input:
PWM = High − DRVH is high, DRVL is low.
PWM = Low − DRVH is low, DRVL is high.
Enable input:
EN = High − Driver is enabled.
EN = Low − Driver is disabled.
4
5
6
7
8
9
VCC
DRVL
GND
SW
Power supply input. Connect a bypass capacitor (0.1 mF) from this pin to ground.
Low side gate drive output. Connect to the gate of low side MOSFET.
Bias and reference ground. All signals are referenced to this node (QFN Flag).
Switch node. Connect this pin to the source of the high side MOSFET and drain of the low side MOSFET.
High side gate drive output. Connect to the gate of high side MOSFET.
DRVH
FLAG
Thermal flag. There is no electrical connection to the IC. Connect to ground plane.
www.onsemi.com
2
NCP81155
Table 2. ABSOLUTE MAXIMUM RATINGS
Pin Symbol
Pin Name
V
MAX
V
MIN
VCC
Main Supply Voltage Input
15 V
−0.3 V
16 V (< 50 ns)
BST
Bootstrap Supply Voltage
35 V wrt/ GND
40 V ≤ 50 ns wrt/ GND
15 V wrt/ SW
−0.3 V wrt/SW
SW
Switching Node
(Bootstrap Supply Return)
35 V
−5 V
40 V ≤ 50 ns
−10 V (200 ns)
DRVH
DRVL
High Side Driver Output
Low Side Driver Output
BST+0.3 V
−0.3 V wrt/SW
SW + 15 V (< 80 ns)
−2 V (<200 ns) wrt/SW
VCC+0.3 V
−0.3 V DC
15 V (< 80 ns)
−5 V (<200 ns)
PWM
EN
DRVH and DRVL Control Input
Enable Pin
6.5 V
6.5 V
0 V
−0.3 V
−0.3 V
0 V
GND
Ground
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
Table 3. THERMAL INFORMATION (All signals referenced to AGND unless noted otherwise)
Symbol
Parameter
Thermal Characteristic (Note 1)
Value
74
Unit
°C/W
°C
R
q
JA
T
J
Operating Junction Temperature Range
Operating Ambient Temperature Range
Maximum Storage Temperature Range
Moisture Sensitivity Level
−40 to 125
−10 to +125
−55 to +150
1
T
A
°C
T
STG
°C
MSL
* The maximum package power dissipation must be observed.
2
1. I in Cu, 1 oz thickness.
www.onsemi.com
3
NCP81155
Table 4. ELECTRICAL CHARACTERISTICS (Unless otherwise stated: −10°C < T < +125°C; 4.5 V < V < 13.2 V,
A
CC
4.5 V < BST−SWN < 13.2 V, 4.5 V < BST < 30 V, 0 V < SWN < 21 V)
Parameter Test Conditions
SUPPLY VOLTAGE
Min.
Typ.
Max.
Units
VCC Operation Voltage
UNDERVOLTAGE LOCKOUT
VCC Start Threshold
VCC UVLO Hysteresis
SUPPLY CURRENT
Normal Mode
4.5
13.2
V
3.8
4.35
200
4.5
V
150
250
mV
Icc + Ibst, EN = 5 V, PWM = OSC, Fsw = 100 KHz,
Cload = 3 nF for DRVH, 3 nF for DRVL
10
mA
Standby Current
Standby Current
Icc + Ibst, EN = GND
0.5
2.0
1.4
mA
mA
I
+ I , EN = HIGH, PWM = LOW,
BST
No loading on DRVH & DRVL
CC
Standby Current
I
+ I , EN = HIGH, PWM = HIGH,
2.0
0.4
mA
V
CC
BST
No loading on DRVH & DRVL
BOOTSTRAP DIODE
Forward Voltage
V
= 12 V, forward bias current = 2 mA
0.1
2.0
0.6
0.8
CC
PWM INPUT
PWM Input High
V
V
PWM Input Low
HIGH SIDE DRIVER (VCC = 12 V)
Output Impedance, Sourcing Current
Output Impedance, Sinking Current
DRVH Rise Time trDRVH
DRVH Fall Time tfDRVH
DRVH Turn−Off Propagation Delay
VBST − VSW = 12 V
VBST − VSW = 12 V
1.9
1.0
16
11
3.0
1.7
30
25
30
W
W
V
VCC
V
VCC
= 12 V, 3 nF load, VBST−VSW = 12 V
= 12 V, 3 nF load, VBST−VSW = 12 V
ns
ns
ns
C
LOAD
= 3 nF
8
13
tpdl
DRVH
DRVH Turn−On Propagation Delay
tpdh
C
LOAD
= 3 nF
30
ns
DRVH
DRVH Pull Down Resistance
DRVH to SW, BST−SW = 0 V
37.5
kW
HIGH SIDE DRIVER (VCC = 5 V)
Output Impedance, Sourcing Current
Output Impedance, Sinking Current
VBST − VSW = 5 V
VBST − VSW = 5 V
2.5
1.6
30
27
20
W
W
DRVH Rise Time tr
V
VCC
V
VCC
= 5 V, 3 nF load, VBST − VSW = 5 V
= 5 V, 3 nF load, VBST − VSW = 5 V
ns
ns
ns
DRVH
DRVH
DRVH Fall Time tf
DRVH Turn−Off Propagation Delay
tpdl
C
LOAD
= 3 nF
DRVH
DRVH Turn−On Propagation Delay
tpdh
C
LOAD
= 3 nF
27
ns
DRVH
SW Pull Down Resistance
SW to PGND
37.5
kW
LOW SIDE DRIVER (VCC = 12 V)
Output Impedance, Sourcing Current
Output Impedance, Sinking Current
2.0
0.7
16
3.0
1.5
35
W
W
DRVL Rise Time tr
C
C
= 3 nF
= 3 nF
ns
ns
DRVL
DRVL
LOAD
DRVL Fall Time tf
11
20
LOAD
www.onsemi.com
4
NCP81155
Table 4. ELECTRICAL CHARACTERISTICS (Unless otherwise stated: −10°C < T < +125°C; 4.5 V < V < 13.2 V,
A
CC
4.5 V < BST−SWN < 13.2 V, 4.5 V < BST < 30 V, 0 V < SWN < 21 V)
Parameter
Test Conditions
Min.
Typ.
Max.
Units
LOW SIDE DRIVER (VCC = 12 V)
DRVL Turn−Off Propagation Delay
C
C
= 3 nF
= 3 nF
15
35
30
ns
ns
LOAD
tpdl
DRVL
DRVL Turn−On Propagation Delay
tpdh
8.0
LOAD
DRVL
DRVL Pull Down Resistance
DRVL to PGND, VCC = PGND
37.5
kW
LOW SIDE DRIVER (VCC = 5 V)
Output Impedance, Sourcing Current
Output Impedance, Sinking Current
2.5
1.0
30
22
22
W
W
DRVL Rise Time tr
C
LOAD
C
LOAD
C
LOAD
= 3 nF
= 3 nF
= 3 nF
ns
ns
ns
DRVL
DRVL
DRVL Fall Time tf
DRVL Turn−Off Propagation Delay
tpdl
DRVL
DRVL Turn−On Propagation Delay
tpdh
C
LOAD
= 3 nF
12
ns
DRVL
DRVL Pull Down Resistance
EN INPUT
DRVL to PGND, VCC = PGND
37.5
kW
Input Voltage High
2.0
V
V
Input Voltage Low
1.0
Hysteresis
500
20
mV
mA
mA
ns
Normal Mode Bias Current
Enable Pin Sink Current
Propagation Delay Time
−1
4
1
30
40
PWM = 0 V, EN going from 0 V to EN to DRVL
HI
rising to 10%
SW Node
SW Node Leakage Current
20
mA
www.onsemi.com
5
NCP81155
PWM
DRVL
tpdlDRVL tfDRVL
90%
1V
90%
10%
tpdh
10%
tpdlDRVH
90%
trDRVL
tfDRVH
trDRVH
DRVH
90%
10%
tpdhDRVL
10%
1 V
DRVH−
SW
Figure 2. Gate Timing Diagram
PWM
EN
DRVH
DRVL
tpdEN_HI
Figure 3. PWM/EN Logic Diagram
www.onsemi.com
6
NCP81155
APPLICATIONS INFORMATION
The NCP81155 gate driver is a MOSFET driver designed
for driving two N−channel MOSFETs in a synchronous
buck or buck−boost topology.
states according to the PWM input. A UVLO fault turns on
the internal MOSFET that pulls the EN pin towards ground.
By connecting EN to the DRON pin of a controller, the
controller is alerted when the driver encounters a fault
condition.
Low−Side Driver
The low−side driver is designed to drive a ground
referenced low R
N−channel MOSFET. The voltage
PWM Input
DS(on)
supply for the low−side driver is internally connected to the
VCC and GND pins.
Switching PWM between logic−high and logic−low
states will allow the driver to operate in continuous
conduction mode as long as VCC is greater than the UVLO
threshold and EN is high. The threshold limits are specified
in the electrical characteristics table in this datasheet. Refer
to Figure 2 for the gate timing diagrams.
High−Side Driver
The high−side driver is designed to drive a floating low
R
N−channel MOSFET. The gate voltage for the
DS(on)
high−side driver is developed by a bootstrap circuit
referenced to the SW pin.
When PWM is set above PWM , DRVL will first turn
HI
off after a propagation delay of tpdl . To ensure
DRVL
The bootstrap circuit is comprised of the integrated diode
and an external bootstrap capacitor. When the NCP81155
is starting up, the SW pin is held at ground, allowing the
bootstrap capacitor to charge up to VCC through the
bootstrap diode. When the PWM input is driven high, the
high−side driver will turn on the high−side MOSFET using
the stored charge of the bootstrap capacitor. As the
high−side MOSFET turns on, the SW pin rises. When the
high−side MOSFET is fully turned on, SW will settle to
VIN and BST will settle to VIN + VCC (excluding parasitic
ringing).
non−overlap between DRVL and DRVH, there is a delay of
tpdh from the time DRVL falls to 1 V, before DRVH
DRVH
is allowed to turn on.
When PWM falls below PWM , DRVH will first turn
LO
off after a propagation delay of tpdl . To ensure
DRVH
non−overlap between DRVH and DRVL, there is a delay of
tpdh from the time DRVH – SW falls to 1 V, before
DRVL
DRVL is allowed to turn on.
Thermal Considerations
As power in the NCP81155 increases, it might become
necessary to provide some thermal relief. The maximum
power dissipation supported by the device is dependent
upon board design and layout. Mounting pad configuration
on the PCB, the board material, and the ambient
temperature affect the rate of junction temperature rise for
the part. When the NCP81155 has good thermal
conductivity through the PCB, the junction temperature
will be relatively low with high power applications. The
maximum dissipation the NCP81155 can handle is given
by:
Bootstrap Circuit
The bootstrap circuit relies on an external charge storage
capacitor (C ) and an integrated diode to provide current
BST
to the high−side driver. A multi−layer ceramic capacitor
(MLCC) with a value greater than 100 nF should be used
for C
.
BST
Power Supply Decoupling
The NCP81155 can source and sink relatively large
currents to the gate pins of the MOSFETs. In order to
maintain a constant and stable supply voltage, a low−ESR
capacitor should be placed near the VCC and GND pins. A
MLCC between 1 mF and 4.7 mF is typically used.
[TJ(MAX) * TA]
PD(MAX)
+
(eq. 1)
RqJA
Since T is not recommended to exceed 150°C, the
J
2
NCP81155, soldered on to a 645 mm copper area, using 1
Undervoltage Lockout
oz. copper and FR4, can dissipate up to 2.3 W when the
DRVH and DRVL are low until VCC reaches the VCC
UVLO threshold, typically 4.35 V. Once VCC reaches this
threshold, the PWM signal will control DRVH and DRVL.
There is a 200 mV hysteresis on VCC UVLO. There are
pull−down resistors on DRVH and DRVL to prevent the
gates of the MOSFETs from accumulating enough charge
to turn on when the driver is powered off.
ambient temperature (T ) is 25°C. The power dissipated by
A
the NCP81155 can be calculated from the following
equation:
ǒ
Ǔ
PD [ VCC [ nHS QgHS ) nLS QgLS f ) Istandby
]
(eq. 2)
Where n and n are the number of high−side and
HS
LS
low−side FETs, respectively, Qg and Qg are the gate
Bi−Directional EN Signal
HS
LS
charges of the high−side and low−side FETs, respectively
and f is the switching frequency of the converter.
The Enable pin (EN) is used to disable the DRVH and
DRVL outputs to prevent power transfer. When EN is
above the EN threshold, DRVH and DRVL change their
HI
www.onsemi.com
7
NCP81155
PACKAGE DIMENSIONS
DFN8 3x3, 0.5P
CASE 506BJ
ISSUE O
EDGE OF PACKAGE
NOTES:
A
B
D
1. DIMENSIONS AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND 0.30
MM FROM TERMINAL.
L
L1
PIN 1
REFERENCE
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
DETAIL A
E
MILLIMETERS
OPTIONAL
DIM MIN
0.80
A1 0.00
MAX
1.00
0.05
CONSTRUCTION
2X
A
L
0.10 C
A3
b
0.20 REF
0.18
0.30
2X
D
3.00 BSC
1.84
3.00 BSC
1.55
0.50 BSC
0.10 C
D2 1.64
E
E2 1.35
e
K
L
TOP VIEW
DETAIL A
OPTIONAL
DETAIL B
0.05 C
CONSTRUCTION
0.20
0.30
−−−
0.50
0.03
A
L1 0.00
8X
0.05 C
(A3)
SOLDERMASK DEFINED
MOUNTING FOOTPRINT
SEATING
PLANE
NOTE 4
C
SIDE VIEW
D2
A1
1.85
8X
MOLD CMPD
DETAIL A
EXPOSED Cu
8X L
0.35
1
4
DETAIL B
E2
OPTIONAL
8X K
3.30
1.55
CONSTRUCTION
8
5
8X b
e
0.10 C A B
0.05
C
NOTE 3
0.50
BOTTOM VIEW
PITCH
8X
0.63
DIMENSION: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
MountingTechniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent− Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or
unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs,
damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized
use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action
Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
Literature Distribution Center for ON Semiconductor
19521 E. 32nd Pkwy, Aurora, Colorado 80011 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
For additional information, please contact your loca
Sales Representative
◊
NCP81155/D
相关型号：
SI9130DB
5- and 3.3-V Step-Down Synchronous ConvertersWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1-E3
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135_11
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9136_11
Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130CG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130LG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130_11
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137DB
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137LG
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9122E
500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification DriversWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
©2020 ICPDF网 联系我们和版权申明