NCS2001SQ1T2 [ONSEMI]
0.9 V, Rail-to-Rail, Single Operational Amplifier; 0.9 V，轨至轨，单路运算放大器
| 型号： | NCS2001SQ1T2 |
| 厂家： | 
ONSEMI |
| 描述： | 0.9 V, Rail-to-Rail, Single Operational Amplifier |
| 文件： | 总16页 (文件大小：130K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NCS2001
0.9 V, Rail−to−Rail, Single
Operational Amplifier
The NCS2001 is an industry first sub−one voltage operational
amplifier that features a rail−to−rail common mode input voltage range,
along with rail−to−rail output drive capability. This amplifier is
guaranteed to be fully operational down to 0.9 V, providing an ideal
solution for powering applications from a single cell Nickel Cadmium
(NiCd) or Nickel Metal Hydride (NiMH) battery. Additional features
include no output phase reversal with overdriven inputs, trimmed input
offset voltage of 0.5 mV, extremely low input bias current of 40 pA, and
a unity gain bandwidth of 1.4 MHz at 5.0 V. The tiny NCS2001 is the
ideal solution for small portable electronic applications and is available
in the space saving SOT23−5 and SC70−5 packages with two industry
standard pinouts.
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MARKING
DIAGRAMS
5
SOT23−5
SN SUFFIX
CASE 483
5
AAxYW
1
1
2
Features
5
4
SC70−5
SQ SUFFIX
CASE 419A
• 0.9 V Guaranteed Operation
5
|
AAx
• Rail−to−Rail Common Mode Input Voltage Range
• Rail−to−Rail Output Drive Capability
• No Output Phase Reversal for Over−Driven Input Signals
• 0.5 mV Trimmed Input Offset
3
1
1
x = G for SN1
H for SN2
I for SQ1
Y = Year
W = Work Week
M = Date Code
• 10 pA Input Bias Current
• 1.4 MHz Unity Gain Bandwidth at "2.5 V, 1.1 MHz at "0.5 V
• Tiny SC70−5 and SOT23−5 Packages
• Pb−Free Package is Available
J for SQ2
PIN CONNECTIONS
Typical Applications
1
2
3
5
4
V
V
EE
OUT
• Single Cell NiCd/NiMH Battery Powered Applications
• Cellular Telephones
• Pagers
V
CC
+ −
Non−Inverting
Input
Inverting
Input
• Personal Digital Assistants
• Electronic Games
Style 1 Pinout (SN1T1, SQ1T1)
• Digital Cameras
• Camcorders
• Hand−Held Instruments
V
1
2
3
5
4
V
CC
OUT
V
EE
+ −
Non−Inverting
Input
Inverting
Input
Style 2 Pinout (SN2T1, SQ2T1)
Rail to Rail Input
Rail to Rail Output
ORDERING INFORMATION
See detailed ordering and shipping information in the
dimensions section on page 14 of this data sheet.
0.8 V
to
7.0 V
+
−
This device contains 63 active transistors.
Figure 1. Typical Application
Semiconductor Components Industries, LLC, 2004
1
Publication Order Number:
September, 2004 − Rev. 12
NCS2001/D
NCS2001
MAXIMUM RATINGS
Rating
Symbol
Value
7.0
Unit
V
Supply Voltage (V to V
)
V
S
CC
EE
Input Differential Voltage Range (Note 1)
Input Common Mode Voltage Range (Note 1)
Output Short Circuit Duration (Note 2)
Junction Temperature
V
V
t
V
V
−300 mV to 7.0 V
−300 mV to 7.0 V
Indefinite
150
V
IDR
ICR
Sc
EE
V
EE
sec
°C
T
J
Power Dissipation and Thermal Characteristics
SOT23−5 Package
Thermal Resistance, Junction−to−Air
R
P
235
340
°C/W
mW
q
JA
Power Dissipation @ T = 70°C
A
D
SC70−5 Package
Thermal Resistance, Junction−to−Air
R
P
280
286
°C/W
mW
q
JA
Power Dissipation @ T = 70°C
A
D
Storage Temperature Range
T
−65 to 150
2000
°C
stg
ESD Protection at any Pin Human Body Model (Note 3)
V
ESD
V
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. Either or both inputs should not exceed the range of V −300 mV to V +7.0 V.
EE
EE
2. Maximum package power dissipation limits must be observed to ensure that the maximum junction temperature is not exceeded.
T = T + (P ).
R
q
JA
J
A
D
3. ESD data available upon request.
DC ELECTRICAL CHARACTERISTICS
(V = 2.5 V, V = −2.5 V, V
= V = 0 V, R to GND, T = 25°C unless otherwise noted.)
CC
EE
CM
O L A
Characteristics
Symbol
Min
Typ
Max
Unit
Input Offset Voltage
V
IO
mV
V
V
V
= 0.45 V, V = −0.45 V
EE
T = 25°C
T = 0°C to 70°C
T = −40°C to 105°C
CC
−6.0
−8.5
−9.5
0.5
−
−
6.0
8.5
9.5
A
A
A
= 1.5 V, V = −1.5 V
CC
EE
T = 25°C
T = 0°C to 70°C
T = −40°C to 105°C
−6.0
−7.0
−7.5
0.5
−
−
6.0
7.0
7.5
A
A
A
= 2.5 V, V = −2.5 V
CC
EE
T = 25°C
−6.0
−7.5
−7.5
0.5
−
−
6.0
7.5
7.5
A
T = 0°C to 70°C
A
T = −40°C to 105°C
A
Input Offset Voltage Temperature Coefficient (R = 50)
D V /D T
IO
−
8.0
−
m
V
/
°
C
S
T = −40°C to 105°C
A
Input Bias Current (V = 1.0 V to 5.0 V)
I
−
−
10
−
−
pA
V
CC
IB
Input Common Mode Voltage Range
V
ICR
V
EE
to V
CC
Large Signal Voltage Gain
A
VOL
kV/V
V
V
V
= 0.45 V, V = −0.45 V
EE
CC
R = 10 k
−
−
40
20
−
−
L
R = 2.0 k
L
= 1.5 V, V = −1.5 V
CC
EE
R = 10 k
−
−
40
40
−
−
L
R = 2.0 k
L
= 2.5 V, V = −2.5 V
CC
EE
R = 10 k
R = 2.0 k
L
20
15
40
40
−
−
L
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NCS2001
DC ELECTRICAL CHARACTERISTICS (continued)
(V = 2.5 V, V = −2.5 V, V
= V = 0 V, R to GND, T = 25°C unless otherwise noted.)
CC
EE
CM
O L A
Characteristics
Symbol
Min
Typ
Max
Unit
Output Voltage Swing, High State Output (V = +0.5 V)
V
OH
V
ID
V
CC
= 0.45 V, V = −0.45 V
EE
T = 25°C
A
R = 10 k
R = 2.0 k
L
0.40
0.35
0.494
0.466
−
−
L
T = 0°C to 70°C
A
R = 10 k
R = 2.0 k
L
0.40
0.35
−
−
−
−
L
T = −40°C to 105°C
A
R = 10 k
R = 2.0 k
L
0.40
0.35
−
−
−
−
L
V
CC
= 1.5 V, V = −1.5 V
EE
T = 25°C
A
R = 10 k
R = 2.0 k
L
1.45
1.40
1.498
1.480
−
−
L
T = 0°C to 70°C
A
R = 10 k
R = 2.0 k
L
1.45
1.40
−
−
−
−
L
T = −40°C to 105°C
A
R = 10 k
R = 2.0 k
L
1.45
1.40
−
−
−
−
L
V
CC
= 2.5 V, V = −2.5 V
EE
T = 25°C
A
R = 10 k
R = 2.0 k
L
2.45
2.40
2.498
2.475
−
−
L
T = 0°C to 70°C
A
R = 10 k
R = 2.0 k
L
2.45
2.40
−
−
−
−
L
T = −40°C to 105°C
A
R = 10 k
R = 2.0 k
L
2.45
2.40
−
−
−
−
L
Output Voltage Swing, Low State Output (V = −0.5 V)
V
OL
V
ID
V
CC
= 0.45 V, V = −0.45 V
EE
T = 25°C
A
R = 10 k
R = 2.0 k
L
−
−
−0.494
−0.480
−0.40
−0.35
L
T = 0°C to 70°C
A
R = 10 k
R = 2.0 k
L
−
−
−
−
−0.40
−0.35
L
T = −40°C to 105°C
A
R = 10 k
R = 2.0 k
L
−
−
−
−
−0.40
−0.35
L
V
CC
= 1.5 V, V = −1.5 V
EE
T = 25°C
A
R = 10 k
R = 2.0 k
L
−
−
−1.493
−1.480
−1.45
−1.40
L
T = 0°C to 70°C
A
R = 10 k
R = 2.0 k
L
−
−
−
−
−1.45
−1.40
L
T = −40°C to 105°C
A
R = 10 k
R = 2.0 k
L
−
−
−
−
−1.45
−1.40
L
V
CC
= 2.5 V, V = −2.5 V
EE
T = 25°C
R = 10 k
L
−
−
A
−2.492
−2.479
−2.45
−2.40
R = 2.0 k
L
T = 0°C to 70°C
A
R = 10 k
R = 2.0 k
L
−
−
−
−
−2.45
−2.40
L
T = −40°C to 105°C
A
R = 10 k
R = 2.0 k
L
−
−
−
−
−2.45
−2.40
L
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NCS2001
DC ELECTRICAL CHARACTERISTICS (continued)
(V = 2.5 V, V = −2.5 V, V
= V = 0 V, R to GND, T = 25°C unless otherwise noted.)
CC
EE
CM
O L A
Characteristics
Common Mode Rejection Ratio (V = 0 to 5.0 V)
Symbol
CMRR
PSRR
Min
60
Typ
70
Max
−
Unit
dB
in
Power Supply Rejection Ratio (V = 0.5 V to 2.5 V, V = −2.5 V)
55
65
−
dB
CC
EE
Output Short Circuit Current
I
mA
SC
V
V
V
= 0.45 V, V = −0.45 V, V = "0.4 V
EE ID
Source Current High Output State
Sink Current Low Output State
CC
0.5
−
1.2
−3.0
−
−1.5
= 1.5 V, V = −1.5 V, V = "0.5 V
CC
EE
ID
Source Current High Output State
Sink Current Low Output State
15
−
29
−40
−
−20
= 2.5 V, V = −2.5 V, V = "0.5 V
CC
EE
ID
Source Current High Output State
Sink Current Low Output State
40
−
76
−96
−
−50
Power Supply Current (Per Amplifier, V = 0 V)
I
D
mA
O
V
V
V
= 0.45 V, V = −0.45 V
EE
CC
T = 25°C
−
−
−
0.51
−
−
1.10
1.10
1.10
A
T = 0°C to 70°C
A
T = −40°C to 105°C
A
= 1.5 V, V = −1.5 V
CC
EE
T = 25°C
−
−
−
0.72
−
−
1.40
1.40
1.40
A
T = 0°C to 70°C
A
T = −40°C to 105°C
A
= 2.5 V, V = −2.5 V
CC
EE
T = 25°C
−
−
−
0.82
−
−
1.50
1.50
1.50
A
T = 0°C to 70°C
A
T = −40°C to 105°C
A
AC ELECTRICAL CHARACTERISTICS
(V = 2.5 V, V = −2.5 V, V
= V = 0 V, R to GND, T = 25°C unless otherwise noted.)
CC
EE
CM
O L A
Characteristics
Differential Input Resistance (V = 0 V)
Symbol
Min
−
Typ
u1.0
3.0
Max
Unit
R
in
C
in
e
n
−
−
−
tera
pF
W
CM
Differential Input Capacitance (V
= 0 V)
−
CM
Equivalent Input Noise Voltage (f = 1.0 kHz)
−
100
nV/√Hz
MHz
Gain Bandwidth Product (f = 100 kHz)
GBW
V
CC
V
CC
V
CC
= 0.45 V, V = −0.45 V
−
−
0.5
1.1
1.3
1.4
−
−
−
EE
= 1.5 V, V = −1.5 V
EE
= 2.5 V, V = −2.5 V
EE
Gain Margin (R = 10 k, C = 5.0 pf)
Am
−
−
−
6.5
60
80
−
−
−
dB
°
L
L
Phase Margin (R = 10 k, C = 5.0 pf)
fm
L
L
Power Bandwidth (V = 4.0 V , R = 2.0 k, THD = 1.0%, A = 1.0)
BW
P
kHz
%
O
pp
L
V
Total Harmonic Distortion (V = 4.0 V , R = 2.0 k, A = 1.0)
THD
SR
O
pp
L
V
f = 1.0 kHz
f = 10 kHz
−
−
0.008
0.08
−
−
Slew Rate (V = "2.5 V, V = −2.0 V to 2.0 V, R = 2.0 k, A = 1.0)
V/m s
S
O
L
V
Positive Slope
Negative Slope
1.0
1.0
1.6
1.6
6.0
6.0
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NCS2001
0
−0.1
−0.2
−0.3
0
−0.2
−0.4
−0.6
0.6
V
V
CC
CC
V
V
= 2.5 V
= −2.5 V
CC
EE
V
V
= 2.5 V
= −2.5 V
CC
EE
High State Output
Sourcing Current
R to GND
T = 25°C
A
L
High State Output
Sourcing Current
I to GND
L
T = 25°C
A
Low State Output
Sinking Current
0.3
0.2
0.4
Low State Output
Sinking Current
0.2
0
0.1
0
V
V
EE
EE
0
2.0
4.0
6.0
8.0
10
12
100
1.0 k
10 k
100 k
1.0 M
R , Load Resistance (W)
L
I , Load Current (mA)
L
Figure 2. Split Supply Output Saturation vs.
Load Resistance
Figure 3. Split Supply Output Saturation vs.
Load Current
1000
100
V
V
= 2.5 V
= −2.5 V
0
CC
EE
Gain
80
60
R = 10 k to GND
T = 25°C
A
100
10
1.0
0
L
45
Phase
90
Phase
Margin = 60°
40
20
0
135
180
V
CC
V
EE
= 2.5 V
= −2.5 V
1.0
10
100
1.0 k
10 k 100 k 1.0 M 10 M
0
25
50
75
100
125
T , Ambient Temperature (°C)
A
f, Frequency (Hz)
Figure 4. Input Bias Current vs. Temperature
Figure 5. Gain and Phase vs. Frequency
V
S
= ±2.5 V
V
S
= ±2.5 V
A = 1.0
V
R = 10 k
L
R = 10 k
L
C = 10 pf
L
C = 10 pF
L
A = 1.0
V
T = 25°C
A
T = 25°C
A
t, time (500 ns/Div)
t, time (1.0 m s/Div)
Figure 6. Transient Response
Figure 7. Slew Rate
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5
NCS2001
80
6
5
4
3
2
1
0
V
V
= ±2.5 V
S
70
60
50
40
30
20
10
0
V
CC
V
EE
= 2.5 V
= −2.5 V
A = 1.0
V
R = 10 k
L
T = 25°C
A
T = 25°C
A
= ±1.5 V
= ±0.5 V
S
V
S
1.0 k
10 k
100 k
1.0 M
10
100
1.0 k
10 k
100 k 1.0 M
10 M
f, Frequency (Hz)
f, Frequency (Hz)
Figure 8. Output Voltage vs. Frequency
Figure 9. Common Mode Rejection
vs. Frequency
100
80
60
40
20
0
200
160
120
80
Output Pulsed Test
at 3% Duty Cycle
V
V
= 2.5 V
= −2.5 V
CC
EE
−40°C
PSR +
PSR −
T = 25°C
A
25°C
85°C
40
0
0
±0.5
±1.0
±1.5
±2.0
±2.5
±3.0
±3.5
10
100
1.0 k
10 k
100 k
1.0 M
10 M
f, Frequency (Hz)
V
S,
Supply Voltage (V)
Figure 10. Power Supply Rejection
vs. Frequency
Figure 11. Output Short Circuit Sinking
Current vs. Supply Voltage
1.2
200
160
120
80
Output Pulsed Test
at 3% Duty Cycle
T = 125°C
A
−40°C
1.0
0.8
0.6
0.4
0.2
0
T = 25°C
A
T = −55°C
A
25°C
85°C
40
0
0
±0.5
±1.0
±1.5
±2.0
±2.5
±3.0
±3.5
0
±0.5
±1.0
±1.5
±2.0
±2.5
V
S,
Supply Voltage (V)
V , Supply Voltage (V)
S
Figure 12. Output Short Circuit Sourcing
Current vs. Supply Voltage
Figure 13. Supply Current vs. Supply Voltage
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NCS2001
10
1.0
0.1
10
A = 1000
V
A = 1000
V
1.0
0.1
A = 100
V
A = 100
V
A = 10
V
A = 10
V
A = 1.0
V
A = 1.0
V
V
V
= ±0.5 V
R = 2.0 k
T = 25°C
A
V
V
= ±0.5 V
R = 10 k
T = 25°C
A
S
L
S
L
= 0.4 V
= 0.4 V
out
pp
out
pp
0.01
10
0.01
10
100
1.0 k
10 k
100 k
100
1.0 k
10 k
100 k
f, Frequency (Hz)
f, Frequency (Hz)
Figure 14. Total Harmonic Distortion vs.
Frequency with 1.0 V Supply
Figure 15. Total Harmonic Distortion vs.
Frequency with 1.0 V Supply
10
1.0
0.1
10
A = 1000
V
1.0
0.1
A = 1000
V
A = 100
V
A = 100
V
A = 10
V
A = 10
V
V
V
= ±2.5 V
V
V
= ±2.5 V
S
S
0.01
0.01
A = 1.0
V
= 4.0 V
= 4.0 V
out
pp
A = 1.0
V
out
pp
R = 2.0 k
L
R = 10 k
L
T = 25°C
T = 25°C
A
A
0.001
0.001
10
100
1.0 k
10 k
100 k
10
100
1.0 k
10 k
100 k
f, Frequency (Hz)
f, Frequency (Hz)
Figure 16. Total Harmonic Distortion vs.
Frequency with 5.0 V Supply
Figure 17. Total Harmonic Distortion vs.
Frequency with 5.0 V Supply
2.0
2.0
1.5
1.0
+Slew Rate, V = ±2.5 V
S
1.5
1.0
−Slew Rate, V = ±2.5 V
S
−Slew Rate, V = ±0.45 V
V
V
= 2.5 V
= −2.5 V
S
CC
EE
0.5
0
0.5
0
R = 10 k
+Slew Rate, V = ±0.45 V
L
S
R = 10 k
C = 10 pF
L
C = 10 pF
L
L
T = 25°C
A
−50
−25
0
25
50
75
100
125
−50
−25
0
25
50
75
100
125
T , Ambient Temperature (°C)
A
T , Ambient Temperature (°C)
A
Figure 18. Slew Rate vs. Temperature
Figure 19. Gain Bandwidth Product vs.
Temperature
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NCS2001
80
60
80
60
V
S
= ±2.5 V
100
60
40
20
0
60
40
20
0
V
= ±0.5 V
Phase Margin
S
V
V
= 2.5 V
= −2.5 V
CC
EE
140
40
R = 10 k
C = 10 pF
L
V
= ±0.5 V
S
180
L
V
= ±2.5 V
S
20
Gain Margin
220
−20
−40
R = 10 k
T = 25°C
L
A
0
−50
260
100 M
−25
0
25
50
75
100
125
10 k
100 k
1.0 M
f, Frequency (Hz)
10 M
T , Ambient Temperature (°C)
A
Figure 20. Voltage Gain and Phase vs.
Frequency
Figure 21. Gain and Phase Margin vs.
Temperature
80
70
60
50
40
30
20
10
0
70
60
80
60
40
Phase Margin
Phase Margin
60
40
50
40
30
20
10
0
A = 100
V
V
= 2.5 V
= −2.5 V
V
CC
V
V
= 2.5 V
= −2.5 V
CC
EE
R = 10 k
C = 10 pF
T = 25°C
A
EE
L
R = 10 k to GND
T = 25°C
A
L
L
Gain Margin
20
0
20
0
Gain Margin
10
100
1.0 k
10 k
100 k
1.0
10
100
1000
C , Output Load Capacitance (pF)
L
R , Differential Source Resistance (W)
t
Figure 22. Gain and Phase Margin vs.
Differential Source Resistance
Figure 23. Gain and Phase Margin vs.
Output Load Capacitance
80
60
40
20
80
60
40
20
8.0
6.0
4.0
Phase Margin
R = 10 k
L
C = 10 pF
L
T = 25°C
A
Gain Margin
R = 10 k
2.0
0
L
T = 25°C
A
Split Supplies
0
±3.5
0
0
±0.5 ±1.0
±1.5
±2.0
±2.5
±3.0
0
±0.5 ±1.0
±1.5
±2.0
±2.5
±3.0
±3.5
V , Supply Voltage (V)
S
V , Supply Voltage (V)
S
Figure 24. Output Voltage Swing vs.
Supply Voltage
Figure 25. Gain and Phase Margin vs.
Supply Voltage
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8
NCS2001
100
80
60
40
20
0
20
15
V
= ±2.5 V
S
R = ∞
C = 0
L
L
R = 2.0 k
R = 10 k
10
L
L
A = 1.0
V
T = 25°C
A
5
0
−5
−10
−15
−20
T = 25°C
A
0
±0.5
±1.0
±1.5
±2.0
±2.5
−3.0
−2.0
−1.0
0
1.0
2.0
3.0
V , Supply Voltage (V)
S
V
CM
, Common Mode Input Voltage Range (V)
Figure 26. Open Loop Voltage Gain vs.
Supply Voltage
Figure 27. Input Offset Voltage vs. Common
Mode Input Voltage Range VS = + 2.5 V
20
15
3.0
2.0
V
= ±0.45 V
S
R = ∞
C = 0
L
L
10
A = 1.0
V
1.0
T = 25°C
A
D
V
=
5
.
0
m
V
5
io
R = ∞
C = 0
L
L
0
0
A = 1.0
T = 25°C
A
V
−5
−10
−15
−20
−1.0
−2.0
−3.0
±0.35 ±0.5
−0.5 −0.4 −0.3 −0.2 −0.1
0
0.1 0.2 0.3 0.4 0.5
±1.0
±1.5
±2.0
±2.5
±3.0
V
CM
, Common Mode Input Voltage Range (V)
V , Supply Voltage (V)
S
Figure 28. Input Offset Voltage vs. Common
Mode Input Voltage Range, VS = + 0.45 V
Figure 29. Common−Mode Input Voltage Range
vs. Power Supply Voltage
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9
NCS2001
APPLICATION INFORMATION AND OPERATING DESCRIPTION
C
GENERAL INFORMATION
fb
The NCS2001 is an industry first rail−to−rail input,
rail−to−rail output amplifier that features guaranteed
sub−one voltage operation. This unique feature set is
achieved with the use of a modified analog CMOS process
that allows the implementation of depletion MOSFET
devices. The amplifier has a 1.0 MHz gain bandwidth
product, 2.2 V/m s slew rate and is operational over a power
supply range less than 0.9 V to as high as 7.0 V.
R
fb
R
in
−
+
Input
Output
C
in
C
= Input and printed circuit board capacitance
in
Figure 30. Input Capacitance Pole Cancellation
Inputs
The input topology chosen for this device series is
unconventional when compared to most low voltage
operational amplifiers. It consists of an N−Channel
depletion mode differential transistor pair that drives a
folded cascade stage and current mirror. This configuration
extends the input common mode voltage range to
Output
The output stage consists of complimentary P and
N−Channel devices connected to provide rail−to−rail output
drive. With a 2.0 k load, the output can swing within 50 mV
of either rail. It is also capable of supplying over 75 mA
when powered from 5.0 V and 1.0 mA when powered from
0.9 V.
encompass the V and V power supply rails, even when
EE
CC
powered from a combined total of less than 0.9 V. Figures 27
and 28 show the input common mode voltage range versus
power supply voltage.
The differential input stage is laser trimmed in order to
minimize offset voltage. The N−Channel depletion mode
MOSFET input stage exhibits an extremely low input bias
current of less than 10 pA. The input bias current versus
temperature is shown in Figure 4. Either one or both inputs
When connected as a unity gain follower, the NCS2001 can
directly drive capacitive loads in excess of 820 pF at room
temperature without oscillating but with significantly
reduced phase margin. The unity gain follower configuration
exhibits the highest bandwidth and is most prone to
oscillations when driving a high value capacitive load. The
capacitive load in combination with the amplifier’s output
impedance, creates a phase lag that can result in an
under−damped pulse response or a continuous oscillation.
Figure 32 shows the effect of driving a large capacitive load
in a voltage follower type of setup. When driving capacitive
loads exceeding 820 pF, it is recommended to place a low
value isolation resistor between the output of the op amp and
the load, as shown in Figure 31. The series resistor isolates the
capacitive load from the output and enhances the phase
margin. Refer to Figure 33. Larger values of R will result in
a cleaner output waveform but excessively large values will
degrade the large signal rise and fall time and reduce the
output amplitude. Depending upon the capacitor
characteristics, the isolation resistor value will typically be
between 50 to 500 W. The output drive capability for resistive
and capacitive loads is shown in Figures 2, 3, and 23.
can be biased as low as V minus 300 mV to as high as
EE
7.0 V without causing damage to the device. If the input
common mode voltage range is exceeded, the output will not
display a phase reversal. If the maximum input positive or
negative voltage ratings are to be exceeded, a series resistor
must be used to limit the input current to less than 2.0 mA.
The ultra low input bias current of the NCS2001 allows
the use of extremely high value source and feedback resistor
without reducing the amplifier’s gain accuracy. These high
value resistors, in conjunction with the device input and
printed circuit board parasitic capacitances C , will add an
in
additional pole to the single pole amplifier in Figure 30. If
low enough in frequency, this additional pole can reduce the
phase margin and significantly increase the output settling
time. The effects of C , can be canceled by placing a zero
in
into the feedback loop. This is accomplished with the
R
+
−
Input
Output
addition of capacitor C . An approximate value for C can
fb
fb
C
be calculated by:
L
R
C
in
in
C
+
fb
R
fb
Isolation resistor R = 50 to 500
Figure 31. Capacitance Load Isolation
Note that the lowest phase margin is observed at cold
temperature and low supply voltage.
http://onsemi.com
10
NCS2001
V
in
V
V
= ±0.45 V
S
= 0.8 V
in
pp
R = 0
C = 820 pF
L
A = 1.0
V
T = 25°C
A
V
out
Figure 32. Small Signal Transient Response with Large Capacitive Load
V
in
V
V
= ±0.45 V
S
= 0.8 V
in
pp
R = 51
C = 820 pF
L
A = 1.0
V
T = 25°C
A
V
out
Figure 33. Small Signal Transient Response with Large
Capacitive Load and Isolation Resistor
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11
NCS2001
R
T
470 k
V
CC
Output Voltage
0
0.9 V
0.67 V
C
1.0 nF
CC
CC
Timing Capacitor
Voltage
T
0.33 V
−
+
f
O
= 1.5 kHz
The non−inverting input threshold levels are set so that
the capacitor voltage oscillates between 1/3 and 2/3 of
R
470 k
1a
V
CC
. This requires the resistors R , R and R to be of
1a 1b 2
equal value. The following formula can be used to
approximate the output frequency.
0.9 V
R
470 k
2
R
1b
470 k
1
f
+
O
1.39 RTCT
Figure 34. 0.9 V Square Wave Oscillator
D
1
1N4148
V
10 k
CC
cww
cw
Output Voltage
0
CC
CC
1.0 M
D
2
0.67 V
0.33 V
Timing Capacitor
Voltage
1N4148
10 k
Clock−wise, Low Duty Cycle
V
CC
C
T
V
CC
1.0 nF
Output Voltage
−
+
0
CC
CC
f
O
Timing Capacitor
Voltage
0.67 V
0.33 V
R
1a
470 k
Counter−Clock−wise, High Duty Cycle
V
CC
R
470 k
2
The timing capacitor C will charge through diode D and discharge
T
2
R
through diode D , allowing a variable duty cycle. The pulse width of the
1b
1
470 k
signal can be programmed by adjusting the value of the trimpot. The ca-
pacitor voltage will oscillate between 1/3 and 2/3 of V , since all the
CC
resistors at the non−inverting input are of equal value.
Figure 35. Variable Duty Cycle Pulse Generator
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12
NCS2001
R
1
1.0 M
2.5 V
R
3
1.0 k
+
−
≈
10,000 m F
C
in
10 m F
−2.5 V
R
R
1
3
C
+
C
in
eff.
R
2
1.0 M
Figure 36. Positive Capacitance Multiplier
A
f
C
f
400 pF
R
f
100 k
f
L
f
H
0.5 V
1
R
10 k
2
f +
[ 200 Hz
[ 4.0 kHz
L
2 p R C
1 1
+
V
O
1
f
+
V
in
−
H
2 p R C
f f
C
1
R
10 k
1
80 nF
−0.5 V
R
f
R
A + 1 )
+ 11
f
2
Figure 37. 1.0 V Voiceband Filter
http://onsemi.com
13
NCS2001
V
supply
V
CC
V
in
V
+
−
in
I
+
sink
R
sense
R
sense
Figure 38. High Compliance Current Sink
I
s
V
L
1.0 V
R
sense
R
3
1.0 k
R
R
1
4
I
V
O
R
s
L
1.0 k
1.0 k
R
+
−
5
435 mA
212 mA
34.7 mV
36.9 mV
V
O
2.4 k
75
R
6
For best performance, use low
tolerance resistors.
R
2
3.3 k
Figure 39. High Side Current Sense
ORDERING INFORMATION
Device
†
Package
Shipping
NCS2001SN1T1
SOT23−5
3000 / Tape & 7” Reel
3000 / Tape & 7” Reel
NCS2001SN1T1G
SOT23−5
(Pb−Free)
NCS2001SN2T1
NCS2001SQ1T1
NCS2001SQ1T1G
SOT23−5
SC70−5
3000 / Tape & 7” Reel
3000 / Tape & 7” Reel
3000 / Tape & 7” Reel
SC70−5
(Pb−Free)
NCS2001SQ2T1
NCS2001SQ1T2
NCS2001SQ2T2
SC70−5
SC70−5
SC70−5
3000 / Tape & 7” Reel
3000 / Tape & 7” Reel
3000 / Tape & 7” Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
http://onsemi.com
14
NCS2001
PACKAGE DIMENSIONS
SOT23−5
N SUFFIX
PLASTIC PACKAGE
CASE 483−02
ISSUE C
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
D
2. CONTROLLING DIMENSION: MILLIMETER.
3. MAXIMUM LEAD THICKNESS INCLUDES
LEAD FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS
OF BASE MATERIAL.
4. A AND B DIMENSIONS DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
5
4
3
B
S
1
2
L
G
MILLIMETERS
DIM MIN MAX
INCHES
MIN MAX
A
A
B
C
D
G
H
J
K
L
M
S
2.90
1.30
0.90
0.25
0.85
3.10 0.1142 0.1220
1.70 0.0512 0.0669
1.10 0.0354 0.0433
0.50 0.0098 0.0197
1.05 0.0335 0.0413
J
C
0.013 0.100 0.0005 0.0040
0.05 (0.002)
0.10
0.20
1.25
0
0.26 0.0040 0.0102
0.60 0.0079 0.0236
1.55 0.0493 0.0610
H
M
K
10
0
10
_
_
_
_
2.50
3.00 0.0985 0.1181
SOLDERING FOOTPRINT*
1.9
0.074
0.95
0.037
2.4
0.094
1.0
0.039
0.7
0.028
mm
inches
ǒ
Ǔ
SCALE 10:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
15
NCS2001
PACKAGE DIMENSIONS
SC70−5
Q SUFFIX
CASE 419A−02
ISSUE G
A
G
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 419A−01 OBSOLETE. NEW STANDARD
419A−02.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
5
4
3
−B−
S
1
2
INCHES
DIM MIN MAX
MILLIMETERS
MIN
1.80
1.15
0.80
0.10
MAX
2.20
1.35
1.10
0.30
A
B
C
D
G
H
J
0.071
0.045
0.031
0.004
0.087
0.053
0.043
0.012
M
M
0.2 (0.008)
B
D 5 PL
N
0.026 BSC
0.65 BSC
−−−
0.004
0.004
0.004
0.010
0.012
−−−
0.10
0.10
0.10
0.25
0.30
K
N
S
J
0.008 REF
0.20 REF
C
0.079
0.087
2.00
2.20
K
H
SOLDERING FOOTPRINT*
0.50
0.0197
0.65
0.025
0.65
0.025
0.40
0.0157
1.9
0.0748
mm
inches
ǒ
Ǔ
SCALE 20:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
Literature Distribution Center for ON Semiconductor
P.O. Box 61312, Phoenix, Arizona 85082−1312 USA
Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada
Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
Japan: ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Phone: 81−3−5773−3850
For additional information, please contact your
local Sales Representative.
NCS2001/D
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