NCV7327MW0R2G [ONSEMI]

LIN Transceiver, Stand-alone;
NCV7327MW0R2G
型号: NCV7327MW0R2G
厂家: ONSEMI    ONSEMI
描述:

LIN Transceiver, Stand-alone

文件: 总12页 (文件大小:183K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
NCV7327  
LIN Transceiver,  
Stand-alone  
Description  
The NCV7327 is a fully featured local interconnect network (LIN)  
transceiver designed to interface between a LIN protocol controller  
and the physical bus.  
www.onsemi.com  
The LIN bus is designed to communicate low rate data from control  
devices such as door locks, mirrors, car seats, and sunroofs at the  
lowest possible cost. The bus is designed to eliminate as much wiring  
as possible and is implemented using a single wire in each node. Each  
node has a slave MCUstate machine that recognizes and translates  
the instructions specific to that function.  
MARKING  
DIAGRAMS  
8
SOIC8  
CASE 751AZ  
NV73270  
ALYW  
8
The main attraction of the LIN bus is that all the functions are not  
time critical and usually relate to passenger comfort.  
1
G
1
1
Features  
LINBus Transceiver  
NV73  
270  
ALYWG  
G
DFNW8  
CASE 507AB  
Compliant to ISO 179874 (Backwards Compatible to LIN  
Specification rev. 2.x, 1.3) and SAE J2602  
Bus Voltage $42 V  
1
Transmission Rate up to 20 kbps (No low limit due to absence of  
TxD Timeout function)  
A
L
Y
W
G
= Assembly Location  
= Wafer Lot  
= Year  
Integrated Slope Control  
= Work Week  
= PbFree Package  
Protection  
Thermal Shutdown  
(Note: Microdot may be in either location)  
Undervoltage Protection  
Bus Pins Protected Against Transients in an Automotive  
Environment  
PIN CONNECTIONS  
1
2
3
4
8
7
6
5
Modes  
RxD  
EN  
NC  
V
Normal Mode: LIN Transceiver Enabled, Communication via the  
Bus is Possible  
BB  
NC  
LIN  
Sleep Mode: LIN Transceiver Disabled, the Consumption from  
TxD  
GND  
V
BB  
is Minimized  
SOIC8 (Top View)  
Standby Mode: Transition Mode Reached after Wakeup Event on  
the LIN Bus  
Compatibility  
RxD  
EN  
1
2
3
4
8 NC  
V
BB  
PinCompatible Subset with NCV7321  
Kline Compatible  
7
6
5
EP  
NC  
LIN  
NCV7327 differs from NCV7329 only by absence of TxD  
Timeout function  
TxD  
GND  
DFNW8 (Top View)  
Quality  
Wettable Flank Package for Enhanced Optical Inspection  
AECQ100 Qualified and PPAP Capable  
ORDERING INFORMATION  
See detailed ordering and shipping information on page 10 of  
this data sheet.  
These Devices are PbFree, Halogen Free/BFR Free and are RoHS  
Compliant  
© Semiconductor Components Industries, LLC, 2017  
1
Publication Order Number:  
March, 2019 Rev. 0  
NCV7327/D  
NCV7327  
BLOCK DIAGRAM  
V
BB  
POR  
I
sleep  
EN  
State  
Thermal  
shutdown  
Control  
D
S
Osc  
R
SLAVE  
+
RxD  
TxD  
COMP  
Filter  
LIN  
Slope Control  
NCV7327  
GND  
Figure 1. Block Diagram  
TYPICAL APPLICATION  
Slave Node  
Master Node  
bat  
bat  
VBAT  
VBAT  
3.3/5V  
3.3/5V  
VBB  
VBB  
VCC  
VCC  
RxD  
TxD  
EN  
RxD  
TxD  
EN  
7
7
8
6
3
8
1
4
2
1
4
2
LIN  
LIN  
LIN  
LIN  
6
3
5
5
GND  
GND  
GND  
GND  
GND  
GND  
LB20140619.0  
LB20140619.0  
KL30  
KL30  
LINBUS  
LINBUS  
KL31  
KL31  
Figure 2. Typical Application Diagram for a Master Node  
Table 1. PIN DESCRIPTION  
Pin  
1
Name  
RxD  
EN  
Description  
Receive Data Output; Low in Dominant State; OpenDrain Output  
2
Enable Input, Transceiver in Normal Operation Mode when High, Pulldown Resistor to GND  
3
NC  
Not Connected  
4
TxD  
GND  
LIN  
Transmit Data Input, Low for Dominant State, Pulldown to GND  
5
Ground  
6
LIN Bus Output/Input  
Battery Supply Input  
Not Connected  
7
V
BB  
8
NC  
EP  
Exposed Pad. Recommended to connect to GND or left floating in application (DFNW8 package only).  
www.onsemi.com  
2
 
NCV7327  
Table 2. ABSOLUTE MAXIMUM RATINGS  
Symbol  
Parameter  
Min  
0.3  
42  
42  
0.3  
8  
Max  
+42  
+42  
+42  
+7  
Unit  
V
V
BB  
Voltage on Pin V  
BB  
V
LIN  
LIN Bus Voltage with respect to GND  
LIN Bus Voltage with respect to V  
V
V
BB  
V_Dig_IO  
DC Input Voltage on Pins (EN, RxD, TxD)  
Human Body Model (LIN Pin) (Note 1)  
Human Body Model (All pins) (Note 1)  
Charged Device Model (All Pins) (Note 2)  
Machine Model (All Pins) (Note 3)  
V
V
ESD  
+8  
kV  
kV  
V
4  
+4  
750  
200  
8  
+750  
+200  
+8  
V
V
Electrostatic Discharge Voltage (LIN Pin) System Human Body  
Model (Note 4) Conform to IEC 6100042  
kV  
ESDIEC  
T
Junction Temperature Range  
40  
55  
+150  
+150  
°C  
°C  
J
T
Storage Temperature Range  
STG  
MSL  
Moisture sensitivity level for SOIC8  
Moisture sensitivity level for DFNW8  
2
1
SOIC  
MSL  
DFN  
T
SLD  
Lead Temperature Soldering Reflow (SMD Styles Only),  
PbFree Versions (Note 5)  
260  
°C  
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality  
should not be assumed, damage may occur and reliability may be affected.  
1. Standardized human body model electrostatic discharge (ESD) pulses in accordance to EIAJESD22. Equivalent to discharging a 100 pF  
capacitor through a 1.5 kW resistor.  
2. Standardized charged device model ESD pulses when tested according to AECQ100011.  
3. In accordance to JEDEC JESD22A115. Equivalent to discharging a 200 pF capacitor through a 10 W resistor and 0.75 mH coil.  
4. Equivalent to discharging a 150 pF capacitor through a 330 W resistor. System HBM levels are verified by an external testhouse.  
5. For information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D  
Table 3. THERMAL CHARACTERISTICS  
Parameter  
Symbol  
Value  
Unit  
Thermal characteristics, SOIC8 (Note 6)  
Thermal Resistance JunctiontoAir, Free air, 1S0P PCB (Note 7)  
Thermal Resistance JunctiontoAir, Free air, 2S2P PCB (Note 8)  
R
R
131  
81  
°C/W  
°C/W  
q
JA  
JA  
q
Thermal characteristics, DFNW8 (Note 6)  
Thermal Resistance JunctiontoAir, Free air, 1S0P PCB (Note 7)  
Thermal Resistance JunctiontoAir, Free air, 2S2P PCB (Note 8)  
R
R
125  
58  
°C/W  
°C/W  
q
JA  
JA  
q
6. Refer to ELECTRICAL CHARACTERISTICS, RECOMMENDED OPERATING RANGES and/or APPLICATION INFORMATION for Safe  
Operating parameters.  
7. Values based on test board according to EIA/JEDEC Standard JESD513, signal layer with 10% trace coverage.  
8. Values based on test board according to EIA/JEDEC Standard JESD517, signal layers with 10% trace coverage.  
www.onsemi.com  
3
 
NCV7327  
ELECTRICAL CHARACTERISTICS  
Definitions  
All voltages are referenced to GND (pin 5) unless otherwise specified. Positive currents flow into the IC. Sinking current means  
the current is flowing into the pin; sourcing current means the current is flowing out of the pin.  
Table 4. DC CHARACTERISTICS (V = 5 V to 18 V; T = 40°C to +150°C; Bus Load = 500 W (V to LIN); unless otherwise  
BB  
J
BB  
specified. Typical values are given at V = 12 V and T = 25°C, unless otherwise specified.)  
BB  
J
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
SUPPY PIN (V  
)
BB  
V
Battery Supply Voltage  
Battery Supply Current  
Battery Supply Current  
Battery Supply Current  
5.0  
0.2  
2.0  
18  
1.2  
6.5  
10  
V
BB  
BB  
BB  
BB  
I
I
I
Normal Mode; LIN Recessive  
Normal Mode; LIN Dominant  
Sleep and Standby Mode;  
0.55  
3.9  
6.0  
mA  
mA  
mA  
V
= V  
LIN Recessive; LIN  
BB; T <85°C  
J
I
BB  
Battery Supply Current  
Sleep and Standby Mode;  
6.0  
15  
mA  
V
= V  
BB  
LIN Recessive; LIN  
POR AND V MONITOR  
BB  
PORH_V  
Poweron Reset; High Level on V  
V
BB  
V
BB  
V
BB  
V
BB  
Rising  
Falling  
Rising  
Falling  
2.7  
1.3  
3.2  
3.0  
3.5  
2.1  
4.2  
4.0  
4.4  
2.7  
5.0  
4.8  
V
V
V
V
BB  
BB  
BB  
PORL_V  
Poweron Reset; Low Level on V  
Battery Monitoring High Level  
Battery Monitoring Low Level  
BB  
MONH_V  
BB  
MONL_V  
BB  
TRANSMITTER DATA INPUT (PIN TxD)  
V
Low Level Input Voltage  
0.3  
2.0  
50  
+0.8  
7.0  
V
V
IL_TxD  
IH_TxD  
PD_TxD  
V
High Level Input Voltage  
Pulldown Resistor on TxD Pin  
R
125  
325  
kW  
RECEIVER DATA OUTPUT (PIN RxD)  
I
Low Level Output Current  
High Level Output Current  
V
RxD  
= 0.4 V  
2.0  
mA  
OL_RxD  
OH_RxD  
I
5  
+5  
mA  
ENABLE INPUT (PIN EN)  
V
Low Level Input Voltage  
High Level Input Voltage  
Pulldown Resistor to Ground  
0.3  
2.0  
+0.8  
7.0  
V
V
IL_EN  
IH_EN  
PD_EN  
V
R
100  
250  
650  
kW  
LIN BUS LINE (PIN LIN)  
V
Bus Voltage for Dominant State  
Bus Voltage for Recessive State  
Receiver Threshold  
0.6  
0.4  
0.4  
0.475  
0.050  
0.4  
V
V
V
V
V
V
BUS_DOM  
BB  
BB  
BB  
BB  
BB  
BB  
V
BUS_REC  
REC_DOM  
V
LIN Bus Recessive Dominant  
0.6  
V
V
V
Receiver Threshold  
LIN Bus Dominant – Recessive  
0.6  
REC_REC  
REC_CNT  
REC_HYS  
Receiver Centre Voltage  
Receiver Hysteresis  
(V  
(V  
+ V  
) / 2  
)
0.500  
0.525  
0.175  
1.2  
REC_DOM  
REC_REC  
REC_REC  
V  
REC_DOM  
V
Dominant Output Voltage  
Normal mode; V = 7 V  
V
LIN_DOM  
BB  
Normal mode; V = 18 V  
2.0  
V
BB  
I
_
Communication not Affected  
LIN Bus Remains Operational  
Current Limitation for Driver  
V
BB  
V
BB  
= GND = 12 V; 0 < V < 18 V  
1.0  
+1.0  
5.0  
mA  
mA  
mA  
mA  
BUS no_GND  
LIN  
I
_
= GND = 0 V; 0 < V < 18 V  
LIN  
BUS no_VBB  
I
Dominant State; V  
= V  
BB_MAX  
40  
200  
BUS_LIM  
BUS_PAS_dom  
LIN  
I
Receiver Leakage Current; Driver OFF  
TxD = High; V  
= 0 V; V = 12 V  
1.0  
LIN  
BB  
www.onsemi.com  
4
 
NCV7327  
Table 4. DC CHARACTERISTICS (V = 5 V to 18 V; T = 40°C to +150°C; Bus Load = 500 W (V to LIN); unless otherwise  
BB  
J
BB  
specified. Typical values are given at V = 12 V and T = 25°C, unless otherwise specified.)  
BB  
J
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
LIN BUS LINE (PIN LIN)  
I
Receiver Leakage Current;  
see Figure 1  
Sleep Mode; V  
= 0 V; V = 12 V  
16  
8.0  
3.0  
mA  
mA  
sleep  
LIN  
BB  
I
Receiver Leakage Current; Driver  
OFF; (Note 9)  
TxD = High; 8 V < V < 18 V;  
20  
BUS_PAS_rec  
BB  
8 V < V < 18 V; V V  
LIN  
LIN  
BB  
V
Voltage Drop on Serial Diode  
Internal Pullup Resistance  
Capacitance on Pin LIN, (Note 9)  
Voltage drop on D see Figure 1  
0.4  
20  
0.7  
30  
20  
1.0  
60  
30  
V
SEDiode  
S,  
R
See Figure 1  
kW  
pF  
SLAVE  
C
LIN  
THERMAL SHUTDOWN  
Shutdown Junction Temperature  
T
J(sd)  
Temperature Rising  
160  
180  
200  
°C  
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product  
performance may not be indicated by the Electrical Characteristics if operated under different conditions.  
9. Values based on design and characterization. Not tested in production.  
www.onsemi.com  
5
 
NCV7327  
Table 5. AC CHARACTERISTICS (V = 5 V to 18 V; T = 40°C to +150°C; unless otherwise specified. For the transmitter  
BB  
J
parameters, the following bus loads are considered: L1 = 1 kW / 1 nF; L2 = 660 W / 6.8 nF; L3 = 500 W / 10 nF)  
Symbol  
LIN TRANSMITTER  
D1  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Duty Cycle 1 = t  
/ (2xt  
/ (2xt  
/ (2xt  
/ (2xt  
)
TH  
TH  
= 0.744 x V  
BB  
0.396  
0.500  
BUS_REC(min)  
BUS_REC(max)  
BUS_REC(min)  
BUS_REC(max)  
BIT  
REC(max)  
DOM(max)  
= 0.581 x V  
BB  
t
= 50 ms  
BIT  
V
BB  
= 5 V to 18 V  
D2  
D3  
D4  
Duty Cycle 2 = t  
Duty Cycle 3 = t  
Duty Cycle 4 = t  
)
TH  
TH  
= 0.422 x V  
BB  
0.500  
0.417  
0.500  
0.581  
0.500  
0.590  
BIT  
BIT  
REC(min)  
DOM(min)  
= 0.284 x V  
BB  
t
= 50 ms  
BIT  
BB  
V
= 5 V to 18 V  
)
TH  
TH  
= 0.778 x V  
REC(max)  
DOM(max)  
BB  
BB  
= 0.616 x V  
t
= 96 ms  
BIT  
BB  
V
= 5 V to 18 V  
)
TH  
TH  
= 0.389 x V  
BB  
BIT  
REC(min)  
DOM(min)  
= 0.251 x V  
BB  
t
= 96 ms  
BIT  
BB  
V
= 5 V to 18 V  
t
Propagation Delay of TxD to LIN. TxD  
High to Low  
14  
14  
ms  
ms  
TX_PROP_DOWN  
t
Propagation Delay of TxD to LIN. TxD  
Low to High  
TX_PROP_UP  
LIN RECEIVER  
t
Propagation Delay of Receiver, Rising  
and Falling Edge (See Figure 5)  
R
R
= 2.4 kW; C  
= 2.4 kW; C  
= 20 pF  
= 20 pF;  
0.1  
6.0  
ms  
ms  
RX_PD  
RxD  
RxD  
RxD  
t
Propagation Delay Symmetry  
2.0  
+2.0  
RX_SYM  
RxD  
Rising Edge with Respect to  
Falling Edge  
MODE TRANSITIONS AND TIMEOUTS  
t
Duration of LIN Dominant for Detection  
Sleep Mode  
40  
15  
70  
30  
150  
75  
ms  
ms  
LIN_WAKE  
of Wakeup via LIN Bus (See Figure 6)  
t
Time from Rising Edge of EN pin to the  
moment when the Transmitter is able to  
correctly transmit  
INIT_NORM  
t
Duration of EN pin in High Level State  
for transition to Normal Mode  
11  
11  
20  
20  
10  
55  
55  
ms  
ms  
ms  
ENABLE  
t
Duration of EN pin in Low Level State  
for transition to Sleep Mode  
DISABLE  
t
Delay from LIN Bus Dominant to  
Recessive Edge to Entering of Standby  
Mode after Valid LIN Wakeup  
Sleep Mode  
TO_STB  
10.Values based on design and characterization. Not tested in production.  
www.onsemi.com  
6
NCV7327  
FUNCTIONAL DESCRIPTION  
Overall Functional Description  
level, the transmission can be enabled again. However, to  
avoid thermal oscillations, first a High logical level on TxD  
must be encountered before the transmitter is enabled.  
As required by SAE J2602, the transceiver must behave  
safely below its operating range – it shall either continue to  
transmit correctly (according its specification) or remain  
silent (transmit a recessive state regardless of the TxD  
signal). A battery monitoring circuit in NCV7327  
LIN is a serial communication protocol that efficiently  
supports the control of mechatronic nodes in distributed  
automotive applications.  
The NCV7327 contains the LIN transmitter, LIN receiver,  
poweronreset (POR) circuits and thermal shutdown  
(TSD). The LIN transmitter is optimized for a maximum  
specified transmission speed of 20 kbps.  
deactivates the transmitter in the Normal mode if the V  
BB  
level drops below MONL_V . Transmission is enabled  
BB  
Table 6. OPERATING MODES  
again when V reaches MONH_V . The internal logic  
BB  
BB  
Pin EN  
x
Mode  
Unpowered  
Sleep  
Pin RxD  
Floating  
LIN bus  
remains in the Normal mode and the reception from the LIN  
line is still possible even if the battery monitor disables the  
transmission. Although the specifications of the monitoring  
and poweronreset levels are overlapping, it’s ensured by  
the implementation that the monitoring level never falls  
below the poweronreset level.  
OFF; Floating  
OFF; Floating  
OFF; 30 kW  
Low  
Low  
Floating  
Standby  
Low indicates  
wakeup  
High  
Normal  
LOW: dominant  
HIGH: recessive  
ON; 30 kW  
The Normal mode can be entered from either Standby or  
Sleep mode when EN Pin is High for longer than t  
.
ENABLE  
When the transition is made from Standby mode, TxD  
pulldown is set to weak and RxD is put into  
a highimpedance immediately after EN becomes High  
Unpowered Mode  
As long as V remains below its poweronreset level,  
BB  
the chip is kept in a safe unpowered state. The LIN  
transmitter is inactive, the LIN pin is left floating and only  
a weak pulldown is connected on pin TxD. Pin RxD  
remains floating.  
(before the expiration of t  
filtering time). This  
ENABLE  
excludes signal conflicts between the Standby mode pin  
settings and the signals required to control the chip in the  
Normal mode after a local wakeup vs. High logical level on  
TxD required to send a recessive symbol to the LIN bus.  
The unpowered state will be entered from any other state  
when  
V
BB  
falls below its poweronreset level  
(PORL_V ). When V rises above the poweronreset  
BB  
BB  
Sleep Mode  
high threshold (PORH_V ), the NCV7327 switches to  
BB  
Sleep mode provides extremely low current consumption.  
The LIN transceiver is inactive and the battery consumption  
is minimized.  
a Sleep mode.  
Normal Mode  
This mode is entered in one of the following ways:  
In the Normal mode, the full functionality of the LIN  
transceiver is available. The transceiver can transmit and  
receive data via the LIN bus with speed up to 20 kbps. Data  
according the state of TxD input are sent to the LIN bus  
while pin RxD reflects the logical symbol received on the  
LIN bus highimpedant for recessive and Low for dominant.  
A 30 kW resistor in series with a reverseprotection diode is  
After the voltage level at V pin rises above its  
BB  
poweronreset level (PORH_V ). In this case, RxD  
BB  
Pin remains highimpedant and the pulldown applied  
on pin TxD remains weak.  
After assigning Low logical level to pin EN for longer  
than t  
while NCV7327 is in the Normal mode.  
DISABLE  
internally connected between LIN and V pins.  
BB  
Standby Mode  
In case the junction temperature increases above the  
Standby mode is entered from the Sleep mode when  
a remote wakeup event occurred. The Low level on RxD  
pin indicates interrupt flag for the microcontroller.  
thermal shutdown threshold (T  
), e.g. due to a short of the  
J(sd)  
LIN wiring to the battery, the transmitter is disabled and  
releases the LIN bus to recessive. Once the junction  
temperature decreases back below the thermal shutdown  
www.onsemi.com  
7
NCV7327  
OPERATING STATES  
V
Below Reset Level  
BB  
Unpowered  
(V Below Reset Level)  
BB  
LIN Transceiver: OFF  
LIN Term: Floating  
RxD: Floating  
V
Above Reset Level  
BB  
Sleep Mode  
LIN Transceiver: OFF  
LIN Term: Current Source  
RxD: Floating  
EN = High for t > t  
ENABLE  
LIN rising edge after LIN = 0 for t > t  
LIN_WAKE  
EN = Low for t > t  
DISABLE  
Standby Mode  
Normal Mode  
EN = High for t > t  
ENABLE  
LIN Transceiver: OFF  
LIN Term: 30 kW pullup  
RxD: Low  
LIN Transceiver: ON  
LIN Term: 30 kW pullup  
RxD Receives LIN Data  
Figure 3. State Diagram  
www.onsemi.com  
8
NCV7327  
MEASUREMENT SETUPS AND DEFINITIONS  
TxD  
LIN  
t
t
BIT  
BIT  
50%  
t
t
t
BUS_REC(min)  
BUS_DOM(max)  
THREC(max)  
THDOM(max)  
Thresholds of  
receiving node 1  
THREC(min)  
THDOM(min)  
Thresholds of  
receiving node 2  
t
t
t
BUS_REC(max)  
BUS_DOM(min)  
Figure 4. LIN Transmitter Duty Cycle  
LIN  
V
BB  
60% V  
BB  
40% V  
BB  
t
t
t
RX_PD  
RxD  
RX_PD  
50%  
t
Figure 5. LIN Receiver Timing  
LIN  
Detection of Remote WakeUp  
V
BB  
LIN recessive level  
t
LIN_WAKE  
60% V  
BB  
40% V  
BB  
LIN dominant level  
t
Sleep Mode  
Standby Mode  
Figure 6. Remote (LIN) Wakeup Detection  
www.onsemi.com  
9
NCV7327  
DEVICE ORDERING INFORMATION  
Part Number  
Description  
Temperature Range  
Package  
Shipping  
NCV7327D10R2G  
LIN Transceiver, Standalone  
40°C to +150°C  
SOIC8  
3000 / Tape & Reel  
3000 / Tape & Reel  
(PbFree)  
NCV7327MW0R2G  
LIN Transceiver, Standalone  
40°C to +150°C  
DFNW8  
(PbFree)  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging  
Specifications Brochure, BRD8011/D.  
www.onsemi.com  
10  
NCV7327  
PACKAGE DIMENSIONS  
SOIC8  
CASE 751AZ  
ISSUE B  
NOTES 4&5  
0.10 C  
D
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.  
2. CONTROLLING DIMENSION: MILLIMETERS.  
3. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION.  
ALLOWABLE PROTRUSION SHALL BE 0.004 mm IN EXCESS OF  
MAXIMUM MATERIAL CONDITION.  
455CHAMFER  
D
h
NOTE 6  
D
A
2X  
H
8
5
4. DIMENSION D DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS  
OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS  
SHALL NOT EXCEED 0.006 mm PER SIDE. DIMENSION E1 DOES  
NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD  
FLASH OR PROTRUSION SHALL NOT EXCEED 0.010 mm PER SIDE.  
5. THE PACKAGE TOP MAY BE SMALLER THAN THE PACKAGE BOT­  
TOM. DIMENSIONS D AND E1 ARE DETERMINED AT THE OUTER­  
MOST EXTREMES OF THE PLASTIC BODY AT DATUM H.  
6. DIMENSIONS A AND B ARE TO BE DETERMINED AT DATUM H.  
7. DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THE LEAD  
BETWEEN 0.10 TO 0.25 FROM THE LEAD TIP.  
0.10 C D  
NOTES 4&5  
E
E1  
L2  
SEATING  
L
C
PLANE  
DETAIL A  
1
4
0.20 C D  
8X b  
8. A1 IS DEFINED AS THE VERTICAL DISTANCE FROM THE SEATING  
PLANE TO THE LOWEST POINT ON THE PACKAGE BODY.  
B
M
0.25  
C A-B  
D
NOTE 6  
MILLIMETERS  
TOP VIEW  
NOTES 3&7  
DIM MIN  
MAX  
1.75  
0.25  
---  
DETAIL A  
A
A1  
A2  
b
---  
0.10  
1.25  
0.31  
0.10  
A2  
NOcTE 7  
0.10 C  
0.51  
0.25  
c
D
4.90 BSC  
A
E
6.00 BSC  
3.90 BSC  
1.27 BSC  
e
END VIEW  
SEATING  
PLANE  
E1  
e
C
A1  
SIDE VIEW  
NOTE 8  
h
0.25  
0.40  
0.41  
1.27  
L
RECOMMENDED  
0.25 BSC  
L2  
SOLDERING FOOTPRINT*  
8X  
0.76  
8X  
1.52  
7.00  
1
1.27  
PITCH  
DIMENSIONS: MILLIMETERS  
*For additional information on our PbFree strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
www.onsemi.com  
11  
NCV7327  
PACKAGE DIMENSIONS  
DFNW8 3x3, 0.65P  
CASE 507AB  
ISSUE D  
NOTES:  
A
B
D
1. DIMENSIONING AND TOLERANCING PER  
ASME Y14.5M, 1994.  
2. CONTROLLING DIMENSION: MILLIMETERS.  
3. DIMENSION b APPLIES TO PLATED TERMINAL  
AND IS MEASURED BETWEEN 0.10 AND  
0.20mm FROM THE TERMINAL TIP.  
4. COPLANARITY APPLIES TO THE EXPOSED  
PAD AS WELL AS THE TERMINALS.  
5. THIS DEVICE CONTAINS WETTABLE FLANK  
DESIGN FEATURES TO AID IN FILLET FORMA-  
TION ON THE LEADS DURING MOUNTING.  
L3  
L3  
L
L
ALTERNATE  
CONSTRUCTION  
DETAIL A  
E
A
PIN ONE  
REFERENCE  
EXPOSED  
COPPER  
MILLIMETERS  
DIM MIN  
NOM  
0.85  
−−−  
0.20 REF  
−−−  
0.30  
3.00  
2.40  
3.00  
1.60  
MAX  
0.90  
0.05  
A
A1  
A3  
A4  
b
D
D2  
E
0.80  
−−−  
TOP VIEW  
0.10  
0.25  
2.95  
2.30  
2.95  
1.50  
−−−  
0.35  
3.05  
2.50  
3.05  
1.70  
PLATING  
A1  
A4  
DETAIL B  
0.05  
0.05  
C
C
DETAIL B  
A3  
C
C
C
E2  
e
A4  
0.65 BSC  
0.30 REF  
0.40  
K
L
L3  
0.35  
0.00  
0.45  
0.10  
SEATING  
PLANE  
NOTE 4  
SIDE VIEW  
0.05  
L3  
PLATED  
SURFACES  
D2  
DETAIL A  
SECTION CC  
1
4
5
RECOMMENDED  
SOLDERING FOOTPRINT*  
2.55  
2.28  
8X  
L
8X  
0.75  
E2  
8
5
4
K
8
8X b  
3.30 1.76  
e/2  
e
0.10  
0.05  
C
C
A B  
PACKAGE  
OUTLINE  
NOTE 3  
BOTTOM VIEW  
1
0.65  
PITCH  
8X  
0.33  
DIMENSIONS: MILLIMETERS  
*For additional information on our PbFree strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
ON Semiconductor and  
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent  
coverage may be accessed at www.onsemi.com/site/pdf/PatentMarking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.  
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,  
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or  
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer  
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not  
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification  
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized  
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and  
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such  
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This  
literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMENT:  
N. American Technical Support: 8002829855 Toll Free  
USA/Canada  
Europe, Middle East and Africa Technical Support:  
Phone: 421 33 790 2910  
ON Semiconductor Website: www.onsemi.com  
Order Literature: http://www.onsemi.com/orderlit  
Literature Distribution Center for ON Semiconductor  
19521 E. 32nd Pkwy, Aurora, Colorado 80011 USA  
Phone: 3036752175 or 8003443860 Toll Free USA/Canada  
Fax: 3036752176 or 8003443867 Toll Free USA/Canada  
Email: orderlit@onsemi.com  
For additional information, please contact your local  
Sales Representative  
NCV7327/D  

相关型号:

SI9130DB

5- and 3.3-V Step-Down Synchronous Converters

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9135LG-T1

SMBus Multi-Output Power-Supply Controller

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9135LG-T1-E3

SMBus Multi-Output Power-Supply Controller

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9135_11

SMBus Multi-Output Power-Supply Controller

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9136_11

Multi-Output Power-Supply Controller

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9130CG-T1-E3

Pin-Programmable Dual Controller - Portable PCs

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9130LG-T1-E3

Pin-Programmable Dual Controller - Portable PCs

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9130_11

Pin-Programmable Dual Controller - Portable PCs

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9137

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9137DB

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9137LG

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9122E

500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification Drivers

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY