NCV8164ASN300T1G [ONSEMI]
LDO Regulator, 300mA, Low Dropout Voltage, Ultra Low Noise, High PSRR with Power Good;
| 型号： | NCV8164ASN300T1G |
| 厂家： | 
ONSEMI |
| 描述： | LDO Regulator, 300mA, Low Dropout Voltage, Ultra Low Noise, High PSRR with Power Good |
| 文件： | 总13页 (文件大小：423K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LDO Regulator, 300ꢀmA,
Low Dropout Voltage,
Ultra Low Noise, High PSRR
with Power Good
NCV8164
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The NCV8164 is a 300 mA LDO, next generation of high PSRR,
ultra−low noise and low dropout regulators with Power Good open
collector output. Designed to meet the requirements of RF and
sensitive analog circuits, the NCV8164 device provides ultra−low
noise, high PSRR and low quiescent current. The device also offer
excellent load/line transients. The NCV8164 is designed to work with
a 1 mF input and a 1 mF output ceramic capacitor. It is available in
industry standard TSOP−5, WDFNW6 0.65P, 2 mm x 2 mm and
DFNW8 0.65P, 3 mm x 3 mm.
MARKING
DIAGRAMS
5
TSOP−5
CASE 483
XXXAYWG
5
G
1
1
Features
WDFNW6 2x2, 0.65P
CASE 511DW
XXMG
• Operating Input Voltage Range: 1.6 V to 5.5 V
• Available in Fixed Voltage Option: 1.2 V to 5.0 V
• Adjustable Version Reference Voltage: 1.2 V
G
1
8164
XXX
ALYWG
G
DFNW8 3x3, 0.65P
CASE 507AD
•
2% Accuracy Over Load and Temperature
• Ultra Low Quiescent Current Typ. 30 mA
• Standby Current: Typ. 0.1 mA
1
XXX
A
L
M
Y
W
G
= Specific Device Code
= Assembly Location
= Wafer Lot
= Month Code
= Year
• Very Low Dropout: 110 mV at 300 mA for 3.3 V Variant
• Ultra High PSRR: Typ. 85 dB at 10 mA, f = 1 kHz
• Ultra Low Noise: 9 mV
(Fixed Version)
RMS
• Stable with a 1 mF Small Case Size Ceramic Capacitors
= Work Week
= Pb−Free Package
• Available in – TSOP−5 3 mm x 1.5 mm x 1 mm CASE 483
♦ WDFNW6 2 mm x 2 mm x 0.75 mm CASE 511DW
♦ DFNW8 3 mm x 3 mm x 0.9 mm CASE 507AD
• NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements
(Note: Microdot may be in either location)
PIN CONNECTONS
• AEC−Q100 Qualified and PPAP Capable
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
• Communication Systems
• In−Vehicle Networking
• Telematics, Infotainment and Clusters
• General Purpose Automotive
V
IN
IN
OUT
NCV8164
GND
C
1 mF
Ceramic
C
1 mF
Ceramic
OUT
IN
EN
PD
ON
ORDERING INFORMATION
See detailed ordering, marking and shipping information on
page 10 of this data sheet.
OFF
Figure 1. Typical Application Schematics
© Semiconductor Components Industries, LLC, 2015
1
Publication Order Number:
February, 2020 − Rev. 0
NCV8164/D
NCV8164
PIN FUNCTION DESCRIPTION
Pin No.
TSOP−5
Pin No.
WDFNW6
Pin No.
DFNW8
Pin
Name
Description
1
5
6
1
8
1
IN
Input voltage supply pin
OUT
Regulated output voltage. The output should be bypassed with small 1 mF
ceramic capacitor
3
4
3
7
3
EN
PG
Chip enable: Applying V < 0.2 V disables the regulator, Pulling V > 0.7 V
EN EN
enables the LDO
4 / −
Power Good, open collector. Use 10 kW to 100 kW pull−up resistor connected to
output or input voltage
2
− / 4
−
5
2
2
6
2
2
GND
ADJ
SNS
Common ground connection
Adjustable output feedback pin (for adjustable version only)
Sense feedback pin.
Must be connected to OUT pin on PCB (for fixed versions only)
−
−
−
4, 5
N/C
Not connected, pin can be tied to ground plane for better power dissipation
Expose pad should be tied to ground plane for better power dissipation
EPAD
EPAD
EPAD
ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
Unit
V
Input Voltage (Note 1)
Output Voltage
V
IN
*0.3 to 6
V
OUT
*0.3 to V +0.3, max. 6
IN
V
Chip Enable Input
V
*0.3 to 6
*0.3 to 6
30
V
CE
PG
PG
Power Good Voltage
Power Good Current
Output Short Circuit Duration
Maximum Junction Temperature
Storage Temperature
V
V
I
mA
s
t
unlimited
150
SC
T
°C
°C
V
J
TSTG
−55 to 150
2000
ESD Capability, Human Body Model (Note 2)
ESD Capability, Charged Device Model (Note 2)
ESDHBM
ESDCDM
1000
V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTIS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD Charged Device Model tested per EIA/JESD22−C101, Field Induced Charge Model
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2
NCV8164
THERMAL CHARACTERISTICS
Rating
Symbol
Value
Unit
THERMAL CHARACTERISTICS, TSOP−5 PACKAGE
Thermal Resistance, Junction−to−Ambient (Note 3)
Thermal Resistance, Junction−to−Case (top)
Thermal Resistance, Junction−to−Case (bottom) (Note 4)
Thermal Resistance, Junction−to−Board
RqJA
RqJC(top)
RqJC(bot)
RqJB
158
155
102
197
40
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
Characterization Parameter, Junction−to−Top
Characterization Parameter, Junction−to−Board
YJT
YJB
82
THERMAL CHARACTERISTICS, WDFNW6−2X2, 0.65 PITCH PACKAGE
Thermal Resistance, Junction−to−Ambient (Note 3)
Thermal Resistance, Junction−to−Case (top)
RqJA
RqJC(top)
RqJC(bot)
RqJB
51
142
2.0
117
1.9
7.7
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
Thermal Resistance, Junction−to−Case (bottom) (Note 4)
Thermal Resistance, Junction−to−Board
Characterization Parameter, Junction−to−Top
YJT
Characterization Parameter, Junction−to−Board
THERMAL CHARACTERISTICS, DFNW8−3X3, 0.65 PITCH PACKAGE
Thermal Resistance, Junction−to−Ambient (Note 3)
Thermal Resistance, Junction−to−Case (top)
YJB
RqJA
RqJC(top)
RqJC(bot)
RqJB
50
142
7.9
125
2.0
7.5
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
Thermal Resistance, Junction−to−Case (bottom) (Note 4)
Thermal Resistance, Junction−to−Board
Characterization Parameter, Junction−to−Top
YJT
Characterization Parameter, Junction−to−Board
YJB
3. The junction−to−ambient thermal resistance under natural convection is obtained in a simulation on a high−K board, following the
JEDEC51.7 guidelines with assumptions as above, in an environment described in JESD51−2a.
4. The junction−to−case (bottom) thermal resistance is obtained by simulating a cold plate test on the IC exposed pad. Test description can
be found in the ANSI SEMI standard G30−88.
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3
NCV8164
ELECTRICAL CHARACTERISTICS
(−40°C ≤ T ≤ 150°C; V = V
+ 0.5 V; I
= 1 mA, C = C
= 1 mF, V = V , unless otherwise noted.
OUT EN IN
J
IN
OUT(NOM)
OUT
IN
Typical values are at T = +25°C (Note 5))
J
Parameter
Operating Input Voltage
Output Voltage Accuracy
Test Conditions
Symbol
Min
Typ
Max
5.5
+2
Unit
V
V
IN
1.6
V
IN
= V
+ 0.5 V to 5.5 V,
V
OUT
−2
%
OUT(NOM)
0.1 mA ≤ IOUT ≤ 300 mA
Reference Voltage (Adjustable Ver.
ADJ pin connected to OUT)
V
= 1.6 V to 5.5 V,
V
ADJ
1.176
1.2
1.224
V
IN
0.1 mA ≤ IOUT ≤ 300 mA
Line Regulation
Load Regulation
VOUT(NOM) + 0.5 V ≤ VIN ≤ 5.5 V
IOUT = 1 mA to 300 mA
Line
0.5
2
mV/V
mV
Reg
Load
Reg
Dropout Voltage (Note 6)
TSOP−5, WDFNW6
IOUT = 300 mA
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
= 1.5 V
= 1.8 V
= 2.5 V
= 2.8 V
= 3.0 V
= 3.3 V
= 5.0 V
= 1.5 V
= 1.8 V
= 2.5 V
= 2.8 V
= 3.0 V
= 3.3 V
= 5.0 V
V
170
155
125
115
113
110
95
295
255
200
185
177
170
135
315
275
220
205
197
190
170
mV
(NOM)
(NOM)
(NOM)
(NOM)
(NOM)
(NOM)
(NOM)
(NOM)
(NOM)
(NOM)
(NOM)
(NOM)
(NOM)
(NOM)
DO
Dropout Voltage (Note 6)
DFNW8
IOUT = 300 mA
V
DO
180
165
140
130
127
125
112
mV
Output Current Limit
Short Circuit Current
Quiescent Current
V
= 90% VOUT
I
350
560
580
30
mA
OUT
(NOM)
CL
V
OUT
= 0 V
I
SC
IOUT = 0 mA
VEN ≤ 0.4 V
I
40
mA
mA
V
Q
Shutdown Current
I
0.01
1.5
DIS
EN Pin Threshold Voltage
EN Input Voltage “H”
EN Input Voltage “L”
VEN = 5.5 V
V
ENH
0.7
V
ENL
I
EN
0.2
0.6
EN Pull Down Current
0.2
95
90
mA
Power Good Threshold Voltage
Output Voltage Raising
Output Voltage Falling
IPG = 5 mA, Open drain
V
%
PGUP
PGDW
V
Power Good Output Voltage Low
V
0.3
V
PGLO
Turn−On Time (Note 7)
COUT = 1 mF, From assertion of VEN
to VOUT = 95% VOUT
120
ms
(NOM)
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NCV8164
ELECTRICAL CHARACTERISTICS (continued)
(−40°C ≤ T ≤ 150°C; V = V
+ 0.5 V; I
= 1 mA, C = C
= 1 mF, V = V , unless otherwise noted.
OUT EN IN
J
IN
OUT(NOM)
OUT
IN
Typical values are at T = +25°C (Note 5))
J
Parameter
Test Conditions
= 3.3 V,
Symbol
Min
Typ
Max
Unit
Power Supply Rejection Ratio
(Note 7)
V
P
SRR
83
85
80
61
dB
f = 100 Hz
OUT(NOM)
I
OUT = 10 mA
f = 1 kHz
f = 10 kHz
f = 100 kHz
IOUT = 10 mA
Output Voltage Noise (Fixed Ver.)
f = 10 Hz to 100 kHz
V
N
9
mV
RMS
Thermal Shutdown Threshold
(Note 7)
Temperature rising
T
165
°C
°C
W
SDH
Temperature hysteresis
T
HYST
15
Active output discharge resistance
VEN < 0.2 V, Version A only
R
260
DIS
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
5. Performance guaranteed over the indicated operating temperature range by design and/or characterization.
Production tested at T = T = 25°C.
J
A
6. Low duty cycle pulse techniques are used during the testing to maintain the junction temperature as close to ambient as possible. Dropout
voltage is characterized when V falls 3% below V
.
OUT(NOM)
OUT
7. Guaranteed by design and characterization.
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5
NCV8164
TYPICAL CHARACTERISTICS
1.220
1.215
1.210
1.205
1.200
1.195
1.190
1.185
1.180
1.830
1.825
1.820
1.815
1.810
1.805
V
= 1.7 V
= 1 mA
V
= 2.3 V
= 1 mA
= 1 mF
OUT
IN
IN
1.800
1.795
1.790
I
I
OUT
OUT
C
= 1 mF
C
OUT
−40 −20
0
20 40 60 80 100 120 140
−40 −20
0
20 40 60 80 100 120 140
Temperature (°C)
Temperature (°C)
Figure 2. Output Voltage vs. Temperature −
OUT = 1.2 V
Figure 3. Output Voltage vs. Temperature −
V
VOUT = 1.8 V
3.330
3.325
3.320
3.315
3.310
3.305
3.300
3.295
3.290
350
325
300
275
250
225
200
175
150
125
100
V
= 3.8 V
= 1 mA
V
= 1.2 V
= 0.3 A
= 1 mF
OUT
IN
OUT
I
I
OUT
OUT
C
= 1 mF
C
OUT
−40 −20
0
20 40 60 80 100 120 140
−40 −20
0
20 40 60 80 100 120 140
Temperature (°C)
Temperature (°C)
Figure 4. Output Voltage vs. Temperature −
OUT = 3.3 V
Figure 5. Dropout Voltage vs. Temperature −
V
VOUT = 1.2 V
270
250
230
210
190
170
150
130
110
90
170
160
150
140
130
120
110
100
90
V
= 1.8 V
= 0.3 A
= 1 mF
V
= 3.3 V
= 0.3 A
= 1 mF
OUT
OUT
OUT
I
I
OUT
OUT
C
C
80
OUT
70
−40 −20
70
−40 −20
0
20 40 60 80 100 120 140
0
20 40 60 80 100 120 140
Temperature (°C)
Temperature (°C)
Figure 6. Dropout Voltage vs. Temperature −
OUT = 1.8 V
Figure 7. Dropout Voltage vs. Temperature −
V
VOUT = 3.3 V
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NCV8164
TYPICAL CHARACTERISTICS (continued)
40
38
36
34
32
30
28
26
24
22
20
140
135
130
125
120
115
V
= 1.8 V
= 10 mA
= 1 mF
OUT
I
OUT
C
OUT
V
I
C
= nom.
= 0 mA
= 1 mF
OUT
110
105
100
OUT
OUT
−40 −20
0
20 40 60 80 100 120 140
−40 −20
0
20 40 60 80 100 120 140
Temperature (°C)
Temperature (°C)
Figure 8. Quiescent Current va Temperature
Figure 9. Turn−on Time vs. Temperature
0.65
0.60
0.55
0.50
0.45
0.40
0.35
0.30
0.25
580
570
560
550
540
530
520
510
500
Output ON
V
C
= nom.
= 1 mF
OUT
OUT
Output OFF
−40 −20
0
20 40 60 80 100 120 140
−40 −20
0
20 40 60 80 100 120 140
Temperature (°C)
Temperature (°C)
Figure 10. Current Limit vs. Temperature
Figure 11. Enable Thresholds vs Temperature
300
290
280
270
260
250
240
230
220
96,0
95,0
94,0
93,0
92,0
91,0
90,0
89,0
88,0
V
raising to nominal
OUT
EN = low
V
falling from nominal
OUT
C
= 1 mF
OUT
−40 −20
0
20 40 60 80 100 120 140
−40 −20
0
20 40 60 80 100 120 140
Temperature (°C)
Temperature (°C)
Figure 12. Power Good Threshold vs.
Temperature
Figure 13. Active Discharge Resistance vs.
Temperature
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NCV8164
TYPICAL CHARACTERISTICS (continued)
100
90
80
70
60
50
40
30
20
10
0
10000
-
I
= 10 mA
= 100 mA
= 200 mA
-
I
= 10 mA
= 100 mA
= 200 mA
OUT
OUT
- I
-
- I
- I
OUT
OUT
OUT
I
OUT
1000
100
10
V
V
= 3.2 V
IN
V
V
= 3.3 V
IN
= 2.8 V
OUT
= 2.8 V
OUT
T = 25°C
A
T = 25°C
A
C
= 1 mF
OUT
C
= 1 mF
OUT
1
0.01
0,1
1
10
100
1000
10000
0.01
0.1
1
10
100
1000
10000
Frequency (kHz)
Frequency (kHz)
Figure 14. Power Supply Rejection Ration
Figure 15. Output Voltage Noise Spectral Density
for VOUT = 2.8 V, COUT = 1 mF
for VOUT = 2.8 V, COUT = 1 mF
APPLICATIONS INFORMATION
The NCV8164 is the member of new family of high output
current and low dropout regulators which delivers low
quiescent and ground current consumption, good noise and
power supply ripple rejection ratio performance. The
NCV8164 incorporates EN pin and power good output for
simple controlling by MCU or logic. Standard features
include current limiting, soft*start feature and thermal
protection.
1 mA to obtain low saturation voltage. External pull−up
resistor can be connected to any voltage up to 5.5 V (please
see Absolute Maximum Ratings table above).
Power Dissipation and Heat Sinking
The maximum power dissipation supported by the device
is dependent upon board design and layout. Mounting pad
configuration on the PCB, the board material, and the
ambient temperature affect the rate of junction temperature
rise for the part. For reliable operation junction temperature
should be limited to +125°C, however device is capable to
work up to junction temperature +150°C. The maximum
power dissipation the NCV8164 can handle is given by:
Input Decoupling (CIN)
It is recommended to connect at least 1 mF ceramic X5R
or X7R capacitor between IN and GND pin of the device.
This capacitor will provide a low impedance path for any
unwanted AC signals or noise superimposed onto constant
input voltage. The good input capacitor will limit the
influence of input trace inductances and source resistance
during sudden load current changes. Higher capacitance and
lower ESR capacitors will improve the overall line transient
response.
ƪT
ƫ
J(MAX) * TA
(eq. 1)
PD(MAX)
+
RqJA
The power dissipated by the NCV8164 for given
application conditions can be calculated from the following
equations:
(eq. 2)
PD [ VIN(IGND(IOUT)) ) IOUT (VIN * VOUT
)
Output Decoupling (COUT
)
or
The NCV8164 does not require a minimum Equivalent
Series Resistance (ESR) for the output capacitor. The device
is designed to be stable with standard ceramics capacitors
with values of 1 mF or greater. The X5R and X7R types have
the lowest capacitance variations over temperature thus they
are recommended.
ǒ
Ǔ
PD(MAX) ) VOUT IOUT
(eq. 3)
VIN(MAX)
[
IOUT ) IGND
Hints
VIN and GND printed circuit board traces should be as
wide as possible. When the impedance of these traces is
high, there is a chance to pick up noise or cause the regulator
to malfunction. Place external components, especially the
output capacitor, as close as possible to the NCV8164, and
make traces as short as possible.
Power Good Output Connection
The NCV8164 include Power Good functionality for
better interfacing to MCU system. Power Good output is
open collector type, capable to sink up to 10 mA.
Recommended operating current is between 10 mA and
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NCV8164
Adjustable Version
VOUT + VFIX (1 ) R1ńR2)
(eq. 4)
Not only adjustable version, but also any fixed version can
be used to create adjustable voltage, where original fixed
voltage becomes reference voltage for resistor divider and
feedback loop. Output voltage can be equal or higher than
original fixed option, while possible range is from 1.2 V up
to 5.0 V. Figure 16 shows how to add external resistors to
increase output voltage above fixed value.
where V
is voltage of original fixed version (from
FIX
1.2 V up to 5.0 V) or adjustable version (1.2 V). Do not
operate the device at output voltage about 5.2 V, as device
can be damaged.
In order to avoid influence of current flowing into SNS pin
to output voltage accuracy (SNS current varies with voltage
option and temperature, typical value is 300 nA) it is
recommended to use values of R1 and R2 below 500 kW.
Output voltage is then given by equation
V
IN
V
OUT
IN
OUT
NCV8164
ADJ or FIX version
SNS
R1
R2
1 mF
10 mF
Ceramic
C
C
OUT
IN
EN
Ceramic
GND
ON
OFF
Figure 16. Adjustable Variant Application
Please note that output noise is amplified by V
/ V
recommended to use as high fixed variant as possible – for
example in case above it is better to use 3.3 V fixed variant
to create 3.6 V output voltage, as output noise will be
amplified only 3.6 / 3.3 = 1.09 × (9.8 mVrms).
OUT
FIX
ratio. For example, if original 1.2 V fixed variant is used to
create 3.6 V output voltage, output noise is increased
3.6 / 1.2 = 3 times and real value will be 3 × 9 mVrms
= 27ĂmVrms. For noise sensitive applications it is
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NCV8164
ORDERING INFORMATION
Device part no.
Voltage Option
Marking
Option
Package
Shipping †
NCV8164ASNADJT1G
ADJ
M2
MA
MN
MJ
MP
MK
MQ
ML
LA
With Active Output
Discharge
TSOP−5
3000 / Tape & Reel
(Pb−Free)
NCV8164ASN120T1G
NCV8164ASN150T1G
NCV8164ASN180T1G
NCV8164ASN250T1G
NCV8164ASN280T1G
NCV8164ASN300T1G
NCV8164ASN330T1G
NCV8164AMTW120TAG
NCV8164AMTW180TAG
NCV8164AMTW280TAG
NCV8164AMTW290TAG
NCV8164AMLADJTCG
NCV8164AML120TCG
NCV8164AML150TCG
NCV8164AML180TCG
NCV8164AML250TCG
NCV8164AML280TCG
NCV8164AML300TCG
NCV8164AML330TCG
1.2 V
1.5 V
1.8 V
2.5 V
2.8 V
3.0 V
3.3 V
1.2 V
1.8 V
2.8 V
2.9 V
ADJ
With Active Output
Discharge
TSOP−5
(Pb−Free)
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
With Active Output
Discharge
TSOP−5
(Pb−Free)
With Active Output
Discharge
TSOP−5
(Pb−Free)
With Active Output
Discharge
TSOP−5
(Pb−Free)
With Active Output
Discharge
TSOP−5
(Pb−Free)
With Active Output
Discharge
TSOP−5
(Pb−Free)
With Active Output
Discharge
TSOP−5
(Pb−Free)
With Active Output
Discharge
WDFNW6
(WF, Pb−Free)
LJ
With Active Output
Discharge
WDFNW6
(WF, Pb−Free)
LK
With Active Output
Discharge
WDFNW6
(WF, Pb−Free)
LH
K2
With Active Output
Discharge
WDFNW6
(WF, Pb−Free)
With Active Output
Discharge
DFNW8
(WF, Pb−Free)
1.2 V
1.5 V
1.8 V
2.5 V
2.8 V
3.0 V
3.3 V
KA
KN
KJ
With Active Output
Discharge
DFNW8
(WF, Pb−Free)
With Active Output
Discharge
DFNW8
(WF, Pb−Free)
With Active Output
Discharge
DFNW8
(WF, Pb−Free)
KP
KK
KQ
KL
With Active Output
Discharge
DFNW8
(WF, Pb−Free)
With Active Output
Discharge
DFNW8
(WF, Pb−Free)
With Active Output
Discharge
DFNW8
(WF, Pb−Free)
With Active Output
Discharge
DFNW8
(WF, Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
www.onsemi.com
10
NCV8164
PACKAGE DIMENSIONS
TSOP−5
CASE 483
ISSUE M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
NOTE 5
5X
D
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
THICKNESS. MINIMUM LEAD THICKNESS IS THE
MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT
EXCEED 0.15 PER SIDE. DIMENSION A.
5. OPTIONAL CONSTRUCTION: AN ADDITIONAL
TRIMMED LEAD IS ALLOWED IN THIS LOCATION.
TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2
FROM BODY.
0.20 C A B
2X
0.10
T
M
5
4
3
2X
0.20
T
B
S
1
2
K
B
A
DETAIL Z
G
A
MILLIMETERS
TOP VIEW
DIM
A
B
C
D
MIN
2.85
1.35
0.90
0.25
MAX
3.15
1.65
1.10
0.50
DETAIL Z
J
G
H
J
K
M
S
0.95 BSC
C
0.01
0.10
0.20
0
0.10
0.26
0.60
10
3.00
0.05
H
SEATING
PLANE
END VIEW
C
_
_
SIDE VIEW
2.50
SOLDERING FOOTPRINT*
1.9
0.074
0.95
0.037
2.4
0.094
1.0
0.039
0.7
0.028
mm
inches
ǒ
Ǔ
SCALE 10:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
11
NCV8164
PACKAGE DIMENSIONS
WDFNW6 2x2, 0.65P
CASE 511DW
ISSUE B
www.onsemi.com
12
NCV8164
PACKAGE DIMENSIONS
DFNW8 3x3, 0.65P
CASE 507AD
ISSUE A
NOTES:
A
B
D
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
L3
L3
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30mm FROM THE TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
5. THIS DEVICE CONTAINS WETTABLE FLANK
DESIGN FEATURE TO AID IN FILLET FORMA-
TION ON THE LEADS DURING MOUNTING.
L
L
ALTERNATE
CONSTRUCTION
DETAIL A
E
A
PIN ONE
REFERENCE
EXPOSED
COPPER
MILLIMETERS
DIM MIN
NOM
0.90
−−−
MAX
1.00
0.05
A4
A1
A
A1
A3
A4
b
0.80
−−−
0.20 REF
−−−
0.30
3.00
2.40
3.00
1.65
TOP VIEW
0.10
0.25
2.90
2.30
2.90
1.55
−−−
0.35
3.10
2.50
3.10
1.75
PLATING
A1
A4
ALTERNATE
CONSTRUCTION
DETAIL B
D
D2
E
E2
e
K
0.05
0.05
C
C
DETAIL B
A3
C
C
C
A4
0.65 BSC
0.28 REF
0.40
L
L3
0.30
0.50
SEATING
PLANE
NOTE 4
SIDE VIEW
0.05 REF
L3
PLATED
SURFACES
D2
DETAIL A
SECTION C−C
1
4
5
RECOMMENDED
SOLDERING FOOTPRINT*
8X
L
2.50
8X
0.58
2.35
E2
8
5
K
8
8X b
e/2
e
3.30 1.75
0.10
0.05
C
C
A B
NOTE 3
PACKAGE
OUTLINE
BOTTOM VIEW
1
4
8X
0.40
0.65
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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