NCV8560MN150R2G [ONSEMI]
High Performance Low-Power, LDO Regulator with Enable; 高性能低功耗， LDO稳压器启用
| 型号： | NCV8560MN150R2G |
| 厂家： | 
ONSEMI |
| 描述： | High Performance Low-Power, LDO Regulator with Enable |
| 文件： | 总15页 (文件大小：173K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NCV8560
High Performance
Low-Power, LDO Regulator
with Enable
The NCV8560 provides 150 mA of output current at fixed voltage
options, or an adjustable output voltage from 5.0 V down to 1.250 V. It
is designed for portable battery powered applications and offers high
performance features such as low power operation, fast enable
response time, and low dropout.
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MARKING
DIAGRAMS
The device is designed to be used with low cost ceramic capacitors
and is packaged in the DFN6, 3x3 and TSOP−5 packages.
DFN6, 3x3
MN SUFFIX
CASE 488AE
V8560
xxx
ALYWG
Features
• Output Voltage Options:
1
Adjustable, 1.3 V, 1.5 V, 1.8 V, 2.5 V, 2.8 V, 3.0 V, 3.3 V, 3.5 V, 5.0 V
• Ultra−Low Dropout Voltage of 150 mV at 150 mA
• Adjustable Output by External Resistors from 5.0 V down to 1.250 V
V8560 = Specific Device Code
xxx
= ADJ, 150, 180, 250, 280,
300, 330, 350 or 500
= Assembly Location
= Wafer Lot
= Year
= Work Week
• Fast Enable Turn−on Time of 15 ms
• Wide Supply Voltage Range Operating Range
• Excellent Line and Load Regulation
A
L
Y
W
G
• High Accuracy up to 1.5% Output Voltage Tolerance over All
= Pb−Free Package
Operating Conditions
• Typical Noise Voltage of 50 mV without a Bypass Capacitor
rms
• NCV Prefix for Automotive and Other Applications Requiring Site
5
TSOP−5
SN SUFFIX
CASE 483
and Control Changes
xxxAYWG
5
• Pb−Free Package is Available
Typical Applications
G
1
1
• SMPS Post−Regulation
xxx
= Specific Device Code
= Assembly Location
= Year
= Work Week
= Pb−Free Package
A
Y
W
G
• Hand−held Instrumentation
• Noise Sensitive Circuits – VCO, RF Stages, etc.
• Camcorders and Cameras
(Note: Microdot may be in either location)
V
OUT
V
IN
ORDERING INFORMATION
Fixed Voltage Only
See detailed ordering and shipping information in the
package dimensions section on page 13 of this data sheet.
Driver w/
+
Current Limit
-
+
1.25 V
−
GND
Thermal
Shutdown
ADJ
Adjustable Version Only
ENABLE
Figure 1. Simplified Block Diagram
© Semiconductor Components Industries, LLC, 2008
1
Publication Order Number:
May, 2008 − Rev. 1
NCV8560/D
NCV8560
PIN CONNECTIONS
ADJ/NC* 1
GND 2
6
5
4
V
out
V
V
1
2
5
4
out
in
GND
GND
GND
ENABLE
ENABLE
3
3
ADJ/NC*
V
in
(Top View)
(Top View)
* ADJ − Adjustable Version
* NC − Fixed Voltage Version
* ADJ − Adjustable Version
* NC − Fixed Voltage Version
Figure 2. Pin Connections − TSOP5
Figure 3. Pin Connections − DFN6
PIN FUNCTION DESCRIPTION
Pin No.
TSOP−5
DFN6
Pin Name
Description
1
4
ADJ/NC
Output Voltage Adjust Input (Adjustable Version), No Connection (Fixed Voltage Versions)
(Note 1)
2, 5, EPAD
3
2
3
GND
Power Supply Ground; Device Substrate
ENABLE
The Enable Input places the device into low−power standby when pulled to logic low
(< 0.4 V). Connect to V if the function is not used.
in
4
6
1
5
V
Positive Power Supply Input
Regulated Output Voltage
in
V
out
1. True no connect. Printed circuit board traces are allowable.
ABSOLUTE MAXIMUM RATINGS
Rating
Input Voltage (Note 2)
Symbol
Min
−0.3
−0.3
−
Max
6
Unit
V
V
in
Output, Enable, Adjustable Voltage
Maximum Junction Temperature
Storage Temperature
V
out
, ENABLE, ADJ
V
+ 0.3 V
150
150
−
V
in
T
°C
°C
V
J(max)
T
STG
−65
3500
400
ESD Capability, Human Body Model (Note 3)
ESD Capability, Machine Model (Note 3)
Moisture Sensitivity Level
ESD
HBM
ESD
−
V
MM
MSL
MSL1/260
−
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
2. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
3. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115)
Latchup Current Maximum Rating: v150 mA per JEDEC standard: JESD78.
THERMAL CHARACTERISTICS
Rating
Symbol
Value
107
Unit
Thermal Characteristics, DFN6, 3x3.3 mm (Note 4)
R
°C/W
q
JA
Thermal Resistance, Junction−to−Air (Note 5)
Thermal Characteristics, TSOP−5 (Note 4)
Thermal Resistance, Junction−to−Air (Note 5)
R
°C/W
q
JA
205
4. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
5. As measured using a copper heat spreading area of 650 mm2, 1 oz copper thickness.
OPERATING RANGES
Rating
Symbol
Min
Max
Unit
Operating Input Voltage (Note 6)
V
in
Vout + VDO
,
6
V
1.75 V (Note 7)
Adjustable Output Voltage Range (Adjustable Version Only)
Operating Ambient Temperature Range
V
1.25
5.0
V
out
T
−40
125
°C
A
6. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
7. Minimum Vin = 1.75 V or (V + VDO), whichever is higher.
out
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2
NCV8560
ELECTRICAL CHARACTERISTICS
(V = 1.750 V, V = 1.250 V, C = C =1.0 mF, −40°C ≤ T ≤ 125°C, Figure 4, unless otherwise specified.) (Note 8)
in
out
in
out
A
Characteristic
Symbol
Test Conditions
Min
Typ
Max
Unit
Regulator Output (Adjustable Voltage Version)
Output Voltage
V
out
1.231
(−1.5%)
1.250
1.269
(+1.5%)
V
I
V
V
= 1.0 mA to 150 mA
= 1.75 V to 6.0 V,
= ADJ
out
in
out
Ripple Rejection
RR
dB
I
= 1.0 mA to 150 mA
out
−
−
−
62
55
38
−
−
−
(V = V
in out
+ 1.0 V + 0.5 V
)
f = 120 Hz
f = 1.0 kHz
f = 10 kHz
p−p
Line Regulation
Load Regulation
−
1.0
10
mV
mV
Reg
V
= 1.750 V to 6.0 V,
= 1.0 mA
line
in
I
out
−
−
2.0
50
15
−
Reg
V
I
= 1.0 mA to 150 mA
load
out
Output Noise Voltage (Note 9)
Output Short Circuit Current
Dropout Voltage
f = 10 Hz to 100 kHz
mV
rms
n
300
550
800
mA
mV
I
sc
V
DO
Measured at: V
– 2.0%,
= 150 mA, Figure 5
out
V
out
= 1.25 V
= 1.3 V
= 1.5 V
= 1.8 V
= 2.5 V
≥ 2.8 V
−
−
−
−
−
−
175
175
150
125
100
75
250
250
225
175
150
125
out
I
out
V
V
out
out
V
V
out
out
V
Regulator Output (Fixed Voltage Version)
(V = V + 0.5 V, C = C =1.0 mF, −40°C ≤ T ≤ 125°C, Figure 6, unless otherwise specified.) (Note 8)
in
out
in
out
A
Output Voltage
V
V
I
V
= 1.0 mA to 150 mA
= (V + 0.5 V) to 6.0 V
out
out
in
out
1.3 V Option
1.5 V Option
1.8 V Option
2.5 V Option
2.8 V Option
3.0 V Option
3.3 V Option
3.5 V Option
5.0 V Option
1.274
1.470
1.764
2.450
2.744
2.940
3.234
3.430
4.900
(−2%)
1.326
1.530
1.836
2.550
2.856
3.060
3.366
3.570
5.100
(+2%)
Power Supply Ripple Rejection (Note 9)
(V = V + 1.0 V + 0.5 V
PSRR
dB
I
= 1.0 mA to 150 mA
out
−
−
−
62
55
38
−
−
−
)
f = 120 Hz
f = 1.0 kHz
f = 10 kHz
p−p
in out
Line Regulation
Load Regulation
Reg
−
1.0
10
mV
mV
V
= 1.750 V to 6.0 V,
= 1.0 mA
line
in
I
out
Reg
I
= 1.0 mA to 150 mA
load
out
1.3 V to 1.5 V Option
1.8 V Option
2.5 V to 5.0 V Option
−
−
−
2.0
2.0
2.0
20
25
30
Output Noise Voltage (Note 9)
Output Short Circuit Current
V
f = 10 Hz to 100 kHz
−
50
−
mV
rms
n
300
550
800
mA
mV
I
sc
Dropout Voltage
1.3 V Option
V
DO
Measured at: V – 2.0%
out
−
−
−
−
175
150
125
100
75
250
225
175
150
125
1.5 V Option
1.8 V Option
2.5 V Option
2.8 V to 5.0 V Option
8. Performance guaranteed over the indicated operating temperature range by design and/or characterization, production tested at
T = T = 25°C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
J
A
9. Values based on design and/or characterization.
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NCV8560
ELECTRICAL CHARACTERISTICS (V = 1.750 V, V = 1.250 V (adjustable version)), (V = V + 0.5 V (fixed version)),
in
out
in
out
C
= C =1.0 mF, −40°C ≤ T ≤ 125°C, Figure 4, unless otherwise specified.) (Note 10)
in
out
A
Characteristic
Symbol
Test Conditions
Min
Typ
Max
Unit
General
Disable Current
I
ENABLE = 0 V, Vin = 6 V
−
0.01
1.0
mA
mA
DIS
−40°C ≤ T ≤ 85°C
A
Ground Current
I
ENABLE = 0.9 V,
GND
Adjustable Option
−
−
−
−
−
100
135
135
140
145
135
150
170
175
180
I
= 1.0 mA to 150 mA
out
1.3 V Option
1.5 V Option
1.8 V to 3.0 V Option
3.3 V to 5.0 V Option
Thermal Shutdown Temperature (Note 11)
Thermal Shutdown Hysteresis
ADJ Input Bias Current
T
T
150
−
175
10
−
200
−
°C
°C
mA
SD
SH
I
−0.75
0.75
ADJ
Chip Enable
ENABLE Input Threshold Voltage
Voltage Increasing, Logic High
Voltage Decreasing, Logic Low
Enable Input Bias Current (Note 11)
Timing
V
V
th(EN)
0.9
−
−
−
−
0.4
100
I
t
−
3.0
nA
EN
Output Turn On Time
Adjustable Option
1.3 V to 3.5 V Option
5.0 V Option
ms
ENABLE = 0 V to V
in
EN
−
−
−
15
15
30
25
25
50
10.Performance guaranteed over the indicated operating temperature range by design and/or characterization, production tested at
T = T = 25°C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
J
A
11. Values based on design and/or characterization.
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4
NCV8560
V
IN
V
OUT
V
IN
V
OUT
NCV8560
(adjustable)
C
C
IN
OUT
EN
ADJ
GND
Figure 4. Typical Application Circuit for Vout = 1.25 V
(Adjustable Version)
V
IN
V
OUT
V
IN
V
OUT
NCV8560
(adjustable)
C
C
IN
OUT
EN
ADJ
GND
Figure 5. Typical Application Circuit for Adjustable Vout
V
IN
V
OUT
V
IN
V
OUT
NCV8560
(fixed)
C
C
IN
OUT
EN
GND
Figure 6. Typical Application Circuit
(Fixed Voltage Version)
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NCV8560
TYPICAL CHARACTERISTICS
1.260
1.256
1.252
1.248
1.260
1.256
I
= 1.0 mA
I
= 1.0 mA
out
out
1.252
1.248
I
= 150 mA
out
I
= 150 mA
out
V
= V + 0.5 V
out
= ADJ
in
V
= 6.0 V
= ADJ
1.244
1.240
1.244
1.240
in
V
out
V
out
−40 −20
0
20
40
60
80
100 120
−40
−15
10
35
60
85
110 125
T , AMBIENT TEMPERATURE (°C)
A
T , AMBIENT TEMPERATURE (°C)
A
Figure 7. Output Voltage vs. Temperature
(Vin = Vout + 0.5 V)
Figure 8. Output Voltage vs. Temperature
(Vin = 6.0 V)
1.500
1.495
1.490
1.485
1.500
1.495
1.490
1.485
I
= 1.0 mA
out
I
= 1.0 mA
out
I
= 150 mA
out
I
= 150 mA
out
1.480
1.475
1.480
1.475
−40
−15
10
35
60
85
110 125
−40
−15
10
35
60
85
110 125
T , AMBIENT TEMPERATURE (°C)
A
T , AMBIENT TEMPERATURE (°C)
A
Figure 9. Output Voltage vs. Temperature
(1.5 V Fixed Output, Vin = 2 V)
Figure 10. Output Voltage vs. Temperature
(1.5 V Fixed Output, Vin = 6 V)
3.005
3.000
2.995
2.990
3.005
3.000
I
= 1.0 mA
out
I
= 1.0 mA
= 150 mA
out
2.995
2.990
2.985
2.980
I
out
I
= 150 mA
out
2.985
2.980
2.975
2.975
2.970
−40
−15
10
35
60
85
110 125
−40
−15
10
35
60
85
110 125
T , AMBIENT TEMPERATURE (°C)
A
T , AMBIENT TEMPERATURE (°C)
A
Figure 11. Output Voltage vs. Temperature
(3.0 V Fixed Output, Vin = 3.5 V)
Figure 12. Output Voltage vs. Temperature
(3.0 V Fixed Output, Vin = 6 V)
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NCV8560
TYPICAL CHARACTERISTICS
5.000
4.995
4.990
4.985
4.980
4.975
5.000
I
= 1.0 mA
out
I
= 1.0 mA
out
4.995
4.990
4.985
4.980
4.975
I
= 150 mA
out
I
= 150 mA
out
4.970
4.965
4.970
4.965
−40
−15
10
35
60
85
110 125
−40
−15
10
35
60
85
110 125
T , AMBIENT TEMPERATURE (°C)
A
T , AMBIENT TEMPERATURE (°C)
A
Figure 13. Output Voltage vs. Temperature
(5.0 V Fixed Output, Vin = 5.5 V)
Figure 14. Output Voltage vs. Temperature
(5.0 V Fixed Output, Vin = 6 V)
250
200
150
100
250
200
150
100
V
out
= ADJ
I
= 150 mA
out
I
= 150 mA
out
V
out
= 1.25 V
1.50 V
1.80 V
2.80 V
I
= 50 mA
= 1.0 mA
out
3.00 V
5.00 V
50
0
50
0
I
out
−40 −20
0
20
40
60
80
100 120
−40 −20
0
20
40
60
80
100 120
T , AMBIENT TEMPERATURE (°C)
A
T , AMBIENT TEMPERATURE (°C)
A
Figure 15. Dropout Voltage vs. Temperature
(Over Current Range)
Figure 16. Dropout Voltage vs. Temperature
(Over Output Voltage)
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
800
750
700
I
C
T
= 0 mA
out
5.0 V
= 1.0 mF
out
= 25°C
A
ENABLE = V
in
Enable Increasing
Enable Decreasing
3.3 V
3.0 V
2.80 V
1.80 V
1.5 V
650
600
1.25 V
V
in
= 5.5 V
0.5
0
0
1.0
2.0
3.0
4.0
5.0
6.0
−40
−15
10
35
60
85
110 125
V , INPUT VOLTAGE (V)
in
T , AMBIENT TEMPERATURE (°C)
A
Figure 17. Output Voltage vs. Input Voltage
Figure 18. Enable Threshold vs. Temperature
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NCV8560
TYPICAL CHARACTERISTICS
6.0
5.0
4.0
3.0
2.0
154
146
I
= 1.0 mA
= 150 mA
out
I
out
V
= 5.0 V
out
138
130
122
114
106
V
out
= 1.25 V
I
= 1.0 mA
= 150 mA
out
ENABLE = 0 V
I
out
1.0
0
98
90
−40 −20
ENABLE = 0.9 V
−40
−15
10
35
60
85
110 125
0
20
40
60
80
100 120
T , AMBIENT TEMPERATURE (°C)
A
T , AMBIENT TEMPERATURE (°C)
A
Figure 19. Ground Current (Sleep Mode) vs.
Temperature
Figure 20. Ground Current (Run Mode) vs.
Temperature
160
140
120
100
80
106
105
104
103
102
101
100
3.0 V
2.8 V
1.5 V
5.0 V
3.3 V
1.8 V
1.25 V
60
40
V
= ADJ
= 1.75 V
out
20
0
99
98
V
in
0
1.0
2.0
3.0
4.0
5.0
6.0
0
25
50
, OUTPUT CURRENT (mA)
out
75
100
125
150
V , INPUT VOLTAGE (V)
in
I
Figure 21. Ground Current vs. Input Voltage
Figure 22. Ground Current vs. Output Current
400
300
200
100
0
−40 −20
0
20
40
60
80
100 120
T , AMBIENT TEMPERATURE (°C)
A
Figure 23. ADJ Input Bias Current vs. Temperature
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NCV8560
TYPICAL CHARACTERISTICS
650
600
700
600
500
400
300
200
550
500
450
100
0
−40 −20
0
20
40
60
80
100 120
0
1.0
2.0
3.0
4.0
5.0
6.0
T , AMBIENT TEMPERATURE (°C)
A
V , INPUT VOLTAGE (V)
in
Figure 24. Output Short Circuit Current vs.
Temperature
Figure 25. Current Limit vs. Input Voltage
4.0
3.0
2.0
5.0
4.0
3.0
2.0
1.0
0
1.0
0
V
I
= (V + 0.5 V) to 6.0 V
= 1.0 mA
in
out
I
= 1.0 mA to 150 mA
out
out
−40 −20
0
20
40
60
80
100 120
−40
−15
10
35
60
85
110 125
T , AMBIENT TEMPERATURE (°C)
A
T , AMBIENT TEMPERATURE (°C)
A
Figure 26. Line Regulation vs. Temperature
Figure 27. Load Regulation vs. Temperature
45
40
35
30
25
20
80
70
60
50
40
30
20
1.25 V
3.3 V
5.0 V
5.0 V
3.0 V
1.5 V
V
V
= V + 1.0 V
out
in
= 0.5 V
ripple
p−p
1.25 V (ADJ)
15
10
C
= 1.0 mF
out
10
0
I
= 1.0 mA to 150 mA
out
−40 −20
0
20
40
60
80
100
120
0.1
1.0
10
100
T , AMBIENT TEMPERATURE (°C)
A
f, FREQUENCY (kHz)
Figure 28. Output Turn On Time vs.
Temperature
Figure 29. Power Supply Ripple Rejection vs.
Frequency
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NCV8560
TYPICAL CHARACTERISTICS
10
V
out
= 5.0 V
Unstable Region
V
out
= 1.25 V
1.0
Stable Region
0.1
C
= 1.0 mF to 10 mF
out
T
V
= −40°C to 125°C
= up to 6.0 V
A
in
0.01
0
25
50
75
100
125
150
I
, OUTPUT CURRENT (mA)
out
Figure 30. Output Stability with Output
Capacitor ESR over Output Current
V
out
= 1.25 V
Figure 31. Load Transient Response (1.0 mF)
V
out
= 1.25 V
Figure 32. Load Transient Response (10 mF)
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NCV8560
DEFINITIONS
Load Regulation
Line Regulation
The change in output voltage for a change in output load
current at a constant temperature.
The change in output voltage for a change in input voltage.
The measurement is made under conditions of low
dissipation or by using pulse techniques such that the
average junction temperature is not significantly affected.
Dropout Voltage
The input/output differential at which the regulator output
no longer maintains regulation against further reductions in
input voltage. Measured when the output drops 2% below its
nominal. The junction temperature, load current, and
minimum input supply requirements affect the dropout level.
Line Transient Response
Typical output voltage overshoot and undershoot
response when the input voltage is excited with a given
slope.
Output Noise Voltage
Load Transient Response
This is the integrated value of the output noise over a
specified frequency range. Input voltage and output load
current are kept constant during the measurement. Results
Typical output voltage overshoot and undershoot
response when the output current is excited with a given
slope between no−load and full−load conditions.
are expressed in mV or nV/√Hz.
rms
Thermal Protection
Internal thermal shutdown circuitry is provided to protect
the integrated circuit in the event that the maximum junction
temperature is exceeded. When activated at typically 175°C,
the regulator turns off. This feature is provided to prevent
failures from accidental overheating.
Ground Current
Ground Current (I
) is the current that flows through
GND
the ground pin when the regulator operates with a load on its
output. This consists of internal IC operation, bias, etc. It is
actually the difference between the input current (measured
through the LDO input pin) and the output load current. If
the regulator has an input pin that reduces its internal bias
and shuts off the output (enable/disable function), this term
Maximum Package Power Dissipation
The power dissipation level at which the junction
temperature reaches its maximum operating value.
is called the disable current (I ).
DIS
APPLICATIONS INFORMATION
The NCV8560 series regulator is self−protected with
internal thermal shutdown and internal current limit. Typical
application circuits are shown in Figures 4 and 5.
V output, there is no resistor divider. If the part is enabled
under no−load conditions, leakage current through the pass
transistor at junction temperatures above 85°C can approach
several microamps, especially as junction temperature
approaches 150°C. If this leakage current is not directed into
a load, the output voltage will rise up to a level
approximately 20 mV above nominal.
The NCV8560 contains an overshoot clamp circuit to
improve transient response during a load current step
release. When output voltage exceeds the nominal by
approximately 20 mV, this circuit becomes active and
clamps the output from further voltage increase. Tying the
Input Decoupling (Cin)
A ceramic or tantalum 1.0 mF capacitor is recommended
and should be connected close to the NCV8560 package.
Higher capacitance and lower ESR will improve the overall
line transient response.
Output Decoupling (Cout
)
The NCV8560 is a stable component and does not require
a minimum Equivalent Series Resistance (ESR) for the
output capacitor. The minimum output decoupling value is
1.0 mF and can be augmented to fulfill stringent load
transient requirements. The regulator works with ceramic
chip capacitors as well as tantalum devices. Larger values
improve noise rejection and load regulation transient
response. Figure 30 shows the stability region for a range of
operating conditions and ESR values.
ENABLE pin to V will ensure that the part is active
in
whenever the supply voltage is present, thus guaranteeing
that the clamp circuit is active whenever leakage current is
present.
When the NCV8560 adjustable regulator is disabled, the
overshoot clamp circuit becomes inactive and the pass
transistor leakage will charge any capacitance on V . If no
out
load is present, the output can charge up to within a few
millivolts of V . In most applications, the load will present
No−Load Regulation Considerations
in
some impedance to V such that the output voltage will be
inherently clamped at a safe level. A minimum load of
10 mA is recommended.
The NCV8560 adjustable regulator will operate properly
under conditions where the only load current is through the
resistor divider that sets the output voltage. However, in the
case where the NCV8560 is configured to provide a 1.250
out
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11
NCV8560
Noise Decoupling
600 mW when the ambient temperature (T ) is 25°C, and
A
2
The NCV8560 is a low noise regulator and needs no
external noise reduction capacitor. Unlike other low noise
regulators which require an external capacitor and have slow
startup times, the NCV8560 operates without a noise
reduction capacitor, has a typical 15 ms start up delay and
PCB area is 150mm and larger, see Figure 33.
The power dissipated by the NCV8560 can be calculated
from the following equations:
inǒIGND outǓ) I ǒV
outǓ
(eq. 4)
P
[ V
@ I
* V
out
D
in
or
achieves a 50 mV overall noise level between 10 Hz and
rms
100 kHz.
) ǒV
outǓ
I
P
out
D(MAX)
I
(eq. 5)
V
[
in(MAX)
Enable Operation
) I
out
GND
The enable pin will turn the regulator on or off. The
threshold limits are covered in the electrical characteristics
table in this data sheet. The turn−on/turn−off transient
voltage being supplied to the enable pin should exceed a
slew rate of 10 mV/ms to ensure correct operation. If the
enable function is not to be used then the pin should be
If a 150 mA output current is needed, the quiescent current
is taken from the data sheet electrical characteristics
I
GND
table or extracted from Figure 20 and Figure 22. I
is
GND
approximately 108 mA when I = 150 mA. For an output
out
voltage of 1.250 V, the maximum input voltage will then be
3.9 V, good for a 1 Cell Li−ion battery.
connected to V .
in
Output Voltage Adjust
The output voltage can be adjusted from 1 times
(Figure 4) to 4 times (Figure 5) the typical 1.250 V
regulation voltage via the use of resistors between the output
and the ADJ input. The output voltage and resistors are
chosen using Equation 1 and Equation 2.
350
300
TSOP−5 (1 oz)
250
200
150
100
50
R
1
) ǒI
1Ǔ
R
(eq. 1)
+ 1.250 ǒ1 ) Ǔ
V
out
ADJ
R
2
DFN6 3x3.3 (1 oz)
R
1
R
^
2
V
(eq. 2)
out
* 1
1.25
Input bias current I
is typically less than 150 nA.
ADJ
Choose R2 arbitrarily to minimize errors due to the bias
current and to minimize noise contribution to the output
voltage. Use Equation 2 to find the required value for R1.
0
0
100
200
300
400
500
600
700
2
PCB COPPER AREA (mm )
Figure 33. RthJA vs. PCB Copper Area
Thermal
As power in the NCV8560 increases, it might become
necessary to provide some thermal relief. The maximum
power dissipation supported by the device is dependent
upon board design and layout. Mounting pad configuration
on the PCB, the board material, and the ambient temperature
affect the rate of junction temperature rise for the part. When
the NCV8560 has good thermal conductivity through the
PCB, the junction temperature will be relatively low with
high power applications. The maximum dissipation the
NCV8560 can handle is given by:
Hints
V and GND printed circuit board traces should be as
in
wide as possible. When the impedance of these traces is
high, there is a chance to pick up noise or cause the regulator
to malfunction. Place external components, especially the
output capacitor, as close as possible to the NCV8560, and
make traces as short as possible.
T
* T
A
J(MAX)
P
+
D(MAX)
(eq. 3)
R
qJA
Since T is not recommended to exceed 125°C (T
),
J
J(MAX)
then the NCV8560 in a DFN6 package can dissipate up to
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12
NCV8560
DEVICE ORDERING INFORMATION
Device
Marking Code
Version
Package
Shipping*
NCV8560MNADJR2G
1st Line: V8560
2nd Line: ADJ
ADJ
1.5 V
1.8 V
2.5 V
2.8 V
3.0 V
3.3 V
3.5 V
5.0 V
NCV8560MN150R2G
NCV8560MN180R2G
NCV8560MN250R2G
NCV8560MN280R2G
NCV8560MN300R2G
NCV8560MN330R2G
NCV8560MN350R2G
NCV8560MN500R2G
1st Line: V8560
2nd Line: 150
1st Line: V8560
2nd Line: 180
1st Line: V8560
2nd Line: 250
1st Line: V8560
2nd Line: 280
DFN6
(Pb−Free)
3000/Tape & Reel
1st Line: V8560
2nd Line: 300
1st Line: V8560
2nd Line: 330
1st Line: V8560
2nd Line: 350
1st Line: V8560
2nd Line: 500
NCV8560SNADJT1G
NCV8560SN130T1G
NCV8560SN150T1G
NCV8560SN180T1G
NCV8560SN250T1G
NCV8560SN280T1G
NCV8560SN300T1G
NCV8560SN330T1G
NCV8560SN350T1G
NCV8560SN500T1G
LJ9
LJ2
AAJ
LJ3
AAQ
AAR
LJ4
LJ5
LJ7
LJ8
ADJ
1.3 V
1.5 V
1.8 V
2.5 V
2.8 V
3.0 V
3.3 V
3.5 V
5.0 V
TSOP5
(Pb−Free)
3000/Tape & Reel
*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
13
NCV8560
PACKAGE DIMENSIONS
DFN6 3x3
CASE 488AE−01
ISSUE B
EDGE OF PACKAGE
NOTES:
A
B
D
1. DIMENSIONS AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.25 AND 0.30 MM FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
5. TERMINAL b MAY HAVE MOLD COMPOUND
MATERIAL ALONG SIDE EDGE. MOLD
FLASHING MAY NOT EXCEED 30 MICRONS
ONTO BOTTOM SURFACE OF TERMINAL b.
L1
E
DETAIL A
PIN ONE
REFERENCE
BOTTOM VIEW
2X
0.15
C
MILLIMETERS
EXPOSED Cu
DIM MIN
0.80
MAX
1.00
0.05
0.25
0.30
A
MOLD COMPOUND
A1 0.00
A3 0.20
TOP VIEW
2X
0.15
C
b
0.18
D
3.00 BSC
D2 2.25
2.55
DETAIL B
E
3.00 BSC
(A3)
E2 1.55
1.85
0.10
0.08
C
C
e
K
L
0.65 BSC
0.20
0.30
−−−
0.50
A
A1
L1 0.00 0.021
DETAIL B
SIDE VIEW
6X
(A3)
e
A1
SEATING
PLANE
C
SIDE VIEW
D2
1
3
DETAIL A
6X L
E2
6
4
6X K
6X b
NOTE 3
0.10
0.05
C
C
A B
BOTTOM VIEW
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14
NCV8560
PACKAGE DIMENSIONS
TSOP−5
CASE 483−02
ISSUE H
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES
LEAD FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS
OF BASE MATERIAL.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
5. OPTIONAL CONSTRUCTION: AN
ADDITIONAL TRIMMED LEAD IS ALLOWED
IN THIS LOCATION. TRIMMED LEAD NOT TO
EXTEND MORE THAN 0.2 FROM BODY.
NOTE 5
5X
D
0.20 C A B
2X
2X
0.10
T
T
M
5
4
3
0.20
B
S
1
2
K
L
DETAIL Z
G
A
MILLIMETERS
DIM
A
B
C
D
MIN
3.00 BSC
1.50 BSC
MAX
DETAIL Z
J
0.90
1.10
0.50
C
0.25
SEATING
PLANE
0.05
G
H
J
K
L
M
S
0.95 BSC
H
0.01
0.10
0.20
1.25
0
0.10
0.26
0.60
1.55
10
3.00
T
SOLDERING FOOTPRINT*
_
_
2.50
1.9
0.074
0.95
0.037
2.4
0.094
1.0
0.039
0.7
0.028
mm
inches
ǒ
Ǔ
SCALE 10:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5773−3850
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
For additional information, please contact your local
Sales Representative
NCV8560/D
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