NCV86602D50R2G [ONSEMI]
Very Low Iq LD0 150 mA Regulator with RESET and Delay Time Select; 非常低Iq LD0 150毫安稳压器,带有复位和延迟时间选择型号: | NCV86602D50R2G |
厂家: | ONSEMI |
描述: | Very Low Iq LD0 150 mA Regulator with RESET and Delay Time Select |
文件: | 总14页 (文件大小:172K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
NCV8660
Very Low Iq LD0 150 mA
Regulator with RESET and
Delay Time Select
The NCV8660 is a precision very low Iq low dropout voltage
regulator. Quiescent currents as low as 28 mA typical make it ideal for
automotive applications requiring low quiescent current with or
without a load. Integrated control features such as Reset and Delay
Time Select make it ideal for powering microprocessors.
It is available with a fixed output voltage of 5.0 V and 3.3 V and
regulates within 2.0%.
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MARKING
DIAGRAMS
8660yxG
ALYWW
DPAK 5−PIN
DT SUFFIX
Features
CASE 175AA
• Fixed Output Voltage of 5 V and 3.3 V
1
5
•
2.0% Output Voltage up to V
= 40 V
BAT
• Output Current up to 150 mA
1
• Microprocessor Compatible Control Functions:
8
♦ Delay Time Select
660yx
ALYWW
G
♦ RESET Output
SOIC−8 FUSED
8
CASE 751
• NCV Prefix for Automotive
♦ Site and Change Control
♦ AEC−Q100 Qualified
1
1
• Low Dropout Voltage
x
y
= 5 for 5 V Output, 3 for 3.3 V Output
= 1 for 8 ms, 128 ms Reset Delay,
= 3 for 16 ms, 64 ms Reset Delay
= Assembly Location
= Wafer Lot
• Low Quiescent Current of 28 mA Typical
• Stable Under No Load Conditions
A
L
Y
• Protection Features:
♦ Thermal Shutdown
♦ Short Circuit
• These are Pb−Free Devices
Applications
= Year
= Work Week
WW
G or G = Pb−Free Package
• Automotive:
♦ Body Control Module
♦ Instrument and Clusters
♦ Occupant Protection and Comfort
♦ Powertrain
ORDERING INFORMATION
See detailed ordering and shipping information in the
dimensions section on page 12 of this data sheet.
• Battery Powered Consumer Electronics
OUT
NCV8660
IN
OUT
V
BAT
C
C
OUT
IN
13.2 V
0.1 mF
2.2 mF
RO
DT
RO
DT
GND
Figure 1. Application Diagram
© Semiconductor Components Industries, LLC, 2009
1
Publication Order Number:
January, 2009 − Rev. 9
NCV8660/D
NCV8660
PIN DESCRIPTIONS
Pin
SOIC−8
FUSED
DPAK
Symbol
Function
Input Supply Voltage. 0.1 mF bypass capacitor to GND at the IC.
1
2
1
2
IN
R
Reset Output. CMOS compatible output. Goes low when V drops by more than 7%
OUT
O
from nominal.
3, Tab
5−8
3
GND
DT
Ground
4
5
Reset Delay Time Select. Short to GND or connect to OUT to select time.
4
OUT
Regulated Voltage Output. 2.2 mF to ground for typical applications.
IN
OUT
Current Limit
and Thermal
Shutdown
+
−
Vref1
GND
DT
−
Timing
Circuit
+
RO
Vref2
Figure 2. Block Diagram
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2
NCV8660
ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Min
−0.3
−1.0
Max
40
−
Unit
V
Input Voltage (IN)
Input Current
V
IN
IN
I
mA
V
Output Voltage (OUT)
DC
Transient, t < 10 s (Note 1)
V
OUT
−0.3
−0.3
5.5
16
Output Current (OUT)
I
−1.0
Current
Limited
mA
OUT
Storage Temperature Range
T
−55
−0.3
−1.0
150
16
°C
V
STG
DT (Reset Delay Time Select) Voltage (Note 2)
DT (Reset Delay Time Select) Current (Note 2)
V
DT
DT
I
1.0
mA
V
RO (Reset Output) Voltage
DC
Transient, t < 10 s
V
RO
−0.3
−0.3
5.5
16
RO (Reset Output) Current
I
−1.0
1.0
mA
RO
ESD CAPABILITY
ESD Capability, Human Body Model (Note 3)
ESD Capability, Machine Model (Note 3)
ESD Capability, Charged Device Model (Note 3)
THERMAL RESISTANCE
ESD
−2.0
−200
−1.0
2.0
200
1.0
kV
V
HB
ESD
MM
ESD
kV
CDM
Junction−to−Case (Note 4)
DPAK 5
DPAK 5
DPAK 5
15
66
°C/W
°C/W
°C/W
°C/W
°C/W
R
q
JC
JA
JT
JA
JT
Junction−to−Ambient (Note 4)
Junction−to−Tab (Note 4)
R
q
R
4.0
104
33
q
Junction−to−Ambient (Note 4)
Junction−to−Lead (pin 6) (Note 4)
LEAD SOLDERING TEMPERATURE AND MSL
Moisture Sensitivity Level
SOIC−8 FUSED
R
q
SOIC−8 FUSED
R
q
DPAK 5
SOIC−8 FUSED
MSL
SLD
1
3
−
Lead Temperature Soldering: SMD style only, Reflow (Note 5)
Pb−Free Part 60 − 150 sec above 217°C, 40 sec max at peak
−
265 peak
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. The output voltage must not exceed the input voltage.
2. External resistor required to minimize current to less than 1 mA when the control voltage is above 16 V.
3. This device series incorporates ESD protection and is tested by the following methods:
ESD HBM tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD MM tested per AEC−Q100−003 (EIA/JESD22−A115)
ESD CDM tested per EIA/JESD22/C101, Field Induced Charge Model
2
4. Values represented typical steady−state thermal performance on 1 oz. copper FR4 PCB with 1 in copper area.
5. Per IPC / JEDEC J−STD−020C.
OPERATING RANGE
Pin Symbol, Parameter
, Input Voltage Operating Range
Symbol
Min
4.5
Max
40
Unit
V
V
IN
V
IN
Junction Temperature Range
T
J
−40
150
°C
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3
NCV8660
ELECTRICAL CHARACTERISTICS 5.5 V < V < 40 V, −40°C ≤ T ≤ +150°C, unless otherwise specified
IN
J
Characteristic
GENERAL
Symbol
Conditions
Min
Typ
Max
Unit
Quiescent Current
I
mA
100mA < I
100mA < I
< 150mA, V = 13.2V, T = 25°C
−
−
25
−
30
40
195
−
q
OUT
IN
J
< 150mA, V = 13.2V, T ≤ 85°C
OUT
IN
J
Thermal Shutdown (Note 6)
Thermal Hysteresis (Note 6)
T
SD
150
−
175
25
°C
°C
T
HYS
OUT
Output Voltage
V
OUT
V
4.9
4.9
4.9
5.0
5.0
5.0
5.1
5.1
5.1
6 V ≤ V ≤ 16 V, 0.1 mA ≤ I
≤ 150 mA
≤ 100 mA
≤ 150 mA,
IN
OUT
OUT
OUT
6 V ≤ V ≤ 40 V, 0.1 mA ≤ I
IN
5.6 V ≤ V ≤ 16 V, 0 mA ≤ I
IN
−40°C ≤ T ≤ +125°C
J
Output Voltage
V
OUT
V
3.234
3.234
3.3
3.3
3.366
3.366
5.5 V ≤ V ≤ 16 V, 0.1 mA ≤ I
≤ 150 mA
≤ 100 mA
IN
OUT
5.5 V ≤ V ≤ 40 V, 0.1 mA ≤ I
IN
OUT
Output Current Limit
I
OUT = 96% x V
nominal
OUT
205
205
−
−
525
525
mA
mA
CL
Output Current Limit,
Short Circuit
I
SCKT
OUT = 0 V
Load Regulation
DV
DV
V
V
= 13.2 V, I = 0.1 mA to 150 mA
OUT
−40
−20
−
10
0
40
20
mV
mV
V
OUT
IN
Line Regulation
I
= 5 mA, V = 6 V to 28 V
OUT
OUT
IN
Dropout Voltage − 5.0 V Only
I
= 100 mA, (Note 7)
0.225
0.45
DR
OUT
DR
V
= V – V
, (DV
= −100 mV)
IN
OUT
OUT
I
= 150 mA, (Note 7)
−
0.30
0.60
OUT
DR
V
= V – V
, (DV
= −100 mV)
IN
OUT OUT
Output Load Capacitance
Output capacitance for stability
= 13.2 V, 0.5 V , 100 Hz
2.2
−
−
−
mF
C
O
Power Supply Ripple Rejection
PSRR
V
IN
−
60
dB
PP
DT (Reset Delay Time Select)
Threshold Voltage
High
Low
2
−
−
−
−
0.8
V
V
Input Current
DT = 5 V
−
−
1.0
mA
RO, Reset Output
RESET Threshold
V
V
decreasing
90
−
93
2.0
0.2
96
−
%V
Rf
OUT
OUT
RESET Threshold Hysteresis
RO Output Low
V
Rhys
%V
OUT
V
RL
10 kW RESET to OUT, V
= 4.5 V
OUT
−
0.4
V
RO Output High (OUT−RO)
V
RH
10 kW RESET to GND
V
V
V
OUT
V
OUT
OUT
−0.4
−0.2
Reset Reaction Time
t
V into UV to RESET Low
OUT
16
25
38
msec
RR
Input Voltage Reset Threshold
RESET Delay with DT Selection
V
IN_RT
V
IN
Decreasing, V
> V
RT
−
3.8
4.25
V
OUT
Delay Time Out of RESET
− 8 ms version
t
V
OUT
into regulation to RO High
msec
dRx
5.0
10
20
40
80
8.0
16
11.5
23
− 16 ms version
− 32 ms version
32
46
− 64 ms version
64
128
92
184
− 128 ms version
6. Not production tested, guaranteed by design.
7. Dropout at a given current level is defined as the voltage difference of V to V
with V decreasing until the output drops by 100 mV.
IN
IN
OUT
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NCV8660
TYPICAL OPERATING CHARACTERISTICS
5.0
4.995
4.99
3.315
3.310
3.305
3.300
4.985
4.98
3.295
3.290
3.285
3.280
3.275
3.270
4.975
4.97
4.965
4.96
3.265
3.260
I
= 0 mA, 150 mA
out
I
= 0 mA, 150 mA
out
−40 −20
0
20
40 60 80 100 120 140 160
−40 −20
0
20
40 60 80 100 120 140 160
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 3. Output Voltage vs. Temperature
(OUT = 5 V)
Figure 4. Output Voltage vs. Temperature
(OUT = 3.3 V)
5.0
4.995
4.99
3.310
3.305
3.300
3.295
3.290
3.285
3.280
3.275
3.270
3.265
25°C
25°C
−40°C
4.985
4.98
−40°C
4.975
4.97
4.965
4.96
150°C
150°C
3.260
3.255
4.955
0
20
40
60
80
100 120
140 160
0
20
40
60
80
100 120
140 160
OUTPUT CURRENT (mA)
OUTPUT CURRENT (mA)
Figure 5. Output Voltage vs. Output Current
(OUT = 5 V)
Figure 6. Output Voltage vs. Output Current
(OUT = 3.3 V)
6
5
4
3
2
1
3.5
3.0
2.5
2.0
1.5
1.0
0.5
−40°C
150°C 25°C
−40°C
25°C
150°C
0
0
0
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
6
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
6
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
Figure 7. Output Voltage vs. Input Voltage
Figure 8. Output Voltage vs. Input Voltage
(RLOAD = 51 k, Iout = 100 mA, OUT = 5 V)
(RLOAD = 51 k, Iout = 100 mA, OUT = 3.3 V)
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NCV8660
TYPICAL OPERATING CHARACTERISTICS
380
370
360
350
340
330
320
310
600
500
400
300
200
100
150°C
25°C
−40°C
V
= 13.2 V
in
0
−40 −20
0
20
40 60 80 100 120 140 160
0
25
50
75
100
125
150
TEMPERATURE (°C)
OUTPUT CURRENT (mA)
Figure 9. Current Limit vs. Temperature
Figure 10. Dropout Voltage vs. Output Current
600
500
400
300
200
100
0
40
35
30
25
20
15
10
150 mA
125 mA
100 mA
1 mA
75 mA
50 mA
25 mA
10 mA
5
0
I
= 0 mA
14
out
−40 −20
0
20
40 60 80 100 120 140 160
0
2
4
6
8
10
12
16
TEMPERATURE (°C)
INPUT VOLTAGE (V)
Figure 11. Dropout Voltage vs. Temperature
Figure 12. Quiescent Current vs. Input Voltage
35
30
25
20
15
10
5
29
28.5
28
150°C
25°C
27.5
27
−40°C
26.5
26
25.5
25
24.5
24
0
23.5
0
20
40
60
80
100 120
140 160
−40 −20
0
20
40 60 80 100 120 140 160
TEMPERATURE (°C)
OUTPUT CURRENT (mA)
Figure 13. Quiescent Current vs. Temperature
Figure 14. Quiescent Current vs. Output Current
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NCV8660
TYPICAL OPERATING CHARACTERISTICS
Figure 15. Load Transient
(VIN = 13.2 V, OUT = 5 V)
Figure 17. Load Transient
(VIN = 13.2 V, OUT = 3.3 V)
IN
OUT
C
= 2.2 mF
out
I
= 150 mA
out
Figure 16. Line Transient (OUT = 5 V)
Figure 18. Line Transient (OUT = 3.3 V)
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NCV8660
TYPICAL OPERATING CHARACTERISTICS
80
70
60
50
40
30
20
10
0
80
70
60
50
40
30
20
V
C
= 13.2 V
V
C
= 13.2 V
= 4.7 mF
OUT
IN
IN
10
0
= 4.7 mF
OUT
I
= 100 mA
I
= 150 mA
OUT
OUT
10
100
1 k
10 k
100 k
1 M
10 M
10
100
1 k
10 k
100 k
1 M
10 M
FREQUENCY
FREQUENCY
Figure 19. Ripple Rejection vs. Frequency
Figure 20. Ripple Rejection vs. Frequency
(VIN = 13.2 V, IOUT = 150 mA)
(VIN = 13.2 V, IOUT = 100 mA)
10000
1000
100
10
10000
1000
100
10
Unstable Region
Unstable Region
25°C
−40°C
125°C
25°C
−40°C
125°C
Stable Region
Stable Region
1
1
V
C
= 13.2 V
in
0.1
0.1
V
C
= 13.2 V
in
= 2.2 mF
LOAD
= 2.2 mF
LOAD
0.01
0.01
0
20
40
60
80
100 120
140 160
0
20
40
60
80
100 120
140 160
OUTPUT CURRENT (mA)
OUTPUT CURRENT (mA)
Figure 21. Output Capacitor ESR vs. Output
Current (OUT = 5 V)
Figure 22. Output Capacitor ESR vs. Output
Current (OUT = 3.3 V)
5.5
5.0
4.5
Temperature Increasing
Temperature Decreasing
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
25
50
75
100
125
150
175
TEMPERATURE (°C)
Figure 23. Thermal Shutdown vs. Temperature
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NCV8660
DETAILED OPERATING DESCRIPTION
Current Limit
General
The NCV8660 is a 5 V and 3.3 V linear regulator
Current limit is provided on OUT to protect the IC. The
minimum specification is 205 mA. Current limit is specified
under two conditions (OUT = 96% x OUT nominal) and
(OUT = 0 V). No fold−back circuitry exists. Any measured
differences can be attributed to change in die temperature.
The part may be operated up to 205 mA provided thermal die
temperature is considered and is kept below 150°C.
Degradation of electrical parameters at this current is
expected at these elevated levels. A reset (RO) will not occur
with a load less than 205 mA.
providing low drop−out voltage for 150 mA at low quiescent
current levels. Also featured in this part is a reset output with
selectable delay times. Delay times are selectable via part
selection and control through the Delay Time Select (DT)
pin. No pull−up resistor is needed on the reset output (RO).
Pull−up and pull−down capability are included. Only a small
bypass capacitor on the input (IN) supply pin and output
(OUT) voltage pin are required for normal operation.
Thermal shutdown functionality protects the IC from
damage caused from excessively high temperatures
appearing on the IC.
Reset Output
A reset signal is provided on the Reset Output (RO) pin to
provide feedback to the microprocessor of an out of
regulation condition. This is in the form of a logic signal on
RO. Output (OUT) voltage conditions below the RESET
threshold cause RO to go low. The RO integrity is
maintained down to OUT = 1.0 V.
The Reset Output (RO) circuitry includes an active
internal pullup to the output (OUT) as shown in Figure 24.
No external pullup is neccessary.
Output Voltage
Output stability is determined by the capacitor selected
from OUT to GND. The NCV8660 has been designed to
work with low ESR (equivalent series resistance) ceramic
capacitors. The device is extremely stable using virtually
any capacitor 2.2 mF and above. Reference the Output
Capacitor Stability graph in Figure 21.
The output capacitor value will affect overshoot during
power−up. A lower value capacitor will cause higher
overshoot on the output. System evaluation should be
performed with minimum loading for evaluation of
overshoot.
OUT
Selection of process technology for the NCV8660 allows
for low quiescent current independent of loading. Quiescent
current will remain flat across the entire range of loads
providing a low quiescent current condition in standby and
under heavy loads. This is highly beneficial to systems
requiring microprocessor interrupts during standby mode as
duty cycle and load changes have no impact on the standby
current. Reference Figure 14 for Quiescent Current vs
Output Current.
RO
Reset
Control
Signal
Figure 24. Reset Output Circuitry
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NCV8660
IN
t
Reset Delay Time
t < Reset Reaction Time
OUT Reset Threshold plus Hysteresis
OUT
RO
OUT Reset Threshold
t
t
Reset
Threshold
Plus
Thermal
Shutdown
Voltage Dip
at Input
Secondary Overload
Spike
at Output
Reset Delay Time
Reset Delay Time
Hysteresis
Thermal Shutdown
minus
Thermal Hysteresis
Reset
Reaction
Time
Figure 25. Reset Timing
During power−up (or restoring OUT voltage from a reset
event), the OUT voltage must be maintained above the Reset
threshold for the Reset Delay time before RO goes high. The
time for Reset Delay is determined by the choice of IC and
the state of the DT pin.
The Delay Time select (DT) pin is logic level controlled
and provides Reset Delay time per the chart. Note the DT pin
is sampled only when RO is low, and changes to the DT pin
when RO is high will not effect the reset delay time.
Thermal Shutdown
When the die temperature exceeds the Thermal Shutdown
threshold, a Thermal Shutdown event is detected OUT is
turned off, and RO goes low. The IC will remain in this state
until the die temperature moves below the shutdown
threshold (175°C typical) minus the hysteresis factor (25°C
typical). The output will then turn back on and RO will go
high after the RESET Delay time.
Reset Delay Time Select
Selection of the NCV8660 device and the state of the DT
pin determines the available Reset Delay times. The part is
designed for use with DT tied to ground or OUT, but may be
controlled by any logic signal which provides a threshold
between 0.8 V and 2 V. The default condition for an open DT
pin is the slower Reset time (DT = GND condition). Times
are in pairs and are highlighted in the chart below. Consult
factory for availability.
DT=GND
Reset Time
8 ms
DT=OUT
Reset Time
128 ms
NCV86601
NCV86602
NCV86603
NCV86604
8 ms
32 ms
16 ms
64 ms
32 ms
128 ms
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NCV8660
110
100
90
2.0 180
1.3
1.2
1.1
1.0
0.9
0.8
0.7
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
170
160
150
140
130
120
110
100
Power curve with PCB 1 oz cu
Power curve with PCB 1 oz cu
Theta JA curve
80
70
60
Theta JA curve
50
90
80
40
0
100
200
300
400
500
600
700
0
100
200
300
400
500
600
700
2
2
COPPER HEAT SPREADER AREA (mm )
COPPER HEAT SPREADER AREA (mm )
Figure 26. RqJA vs. PCB Copper Area (DPAK)
Figure 28. RqJA vs. PCB Copper Area
(SOIC−8 Fused)
100
10
1
0.5
0.2
0.1
0.05
0.02
0.01
Single Pulse
0.1
0.01
Psi Tab−A
0.001
0.000001 0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
PULSE TIME (sec)
Figure 27. Transient Thermal Response (DPAK)
Cu Area = 645 mm2
100
10
1
0.5
0.2
0.1
0.05
0.02
0.01
Single Pulse
0.1
0.01
Psi L−A
0.001
0.000001 0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
PULSE TIME (sec)
Figure 29. Transient Thermal Response (SOIC−8 Fused)
Cu Area = 645 mm2
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NCV8660
ORDERING INFORMATION
Reset Delay Time,
Reset Delay Time,
DT to OUT
†
DT to GND
Device
Output Voltage
Package
Shipping
NCV86601DT50RKG
NCV86602DT50RKG
NCV86603DT50RKG
NCV86604DT50RKG
NCV86601D50G
8 ms
128 ms
32 ms
8 ms
DPAK
2500 / Tape & Reel
98 Units / Rail
(Pb−Free)
16 ms
32 ms
8 ms
64 ms
128 ms
128 ms
128 ms
32 ms
5.0 V
NCV86601D50R2G
NCV86602D50R2G
NCV86603D50R2G
NCV86604D50R2G
NCV86601DT33RKG
NCV86602DT33RKG
NCV86603DT33RKG
NCV86604DT33RKG
NCV86601D33R2G
NCV86602D33R2G
NCV86603D33R2G
NCV86604D33R2G
8 ms
SOIC−8 FUSED
(Pb−Free)
8 ms
2500 / Tape & Reel
2500 / Tape & Reel
2500 / Tape & Reel
16 ms
32 ms
8 ms
64 ms
128 ms
128 ms
32 ms
8 ms
DPAK
(Pb−Free)
16 ms
32 ms
8 ms
64 ms
128 ms
128 ms
32 ms
3.3 V
8 ms
SOIC−8 FUSED
(Pb−Free)
16 ms
32 ms
64 ms
128 ms
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specification Brochure, BRD8011/D.
http://onsemi.com
12
NCV8660
PACKAGE DIMENSIONS
DPAK 5, CENTER LEAD CROP
DT SUFFIX
CASE 175AA−01
ISSUE A
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
SEATING
−T−
PLANE
C
B
R
INCHES
DIM MIN MAX
MILLIMETERS
MIN
5.97
6.35
2.19
0.51
0.46
0.61
MAX
6.22
6.73
2.38
0.71
0.58
0.81
E
V
A
B
C
D
E
F
G
H
J
0.235 0.245
0.250 0.265
0.086 0.094
0.020 0.028
0.018 0.023
0.024 0.032
0.180 BSC
0.034 0.040
0.018 0.023
0.102 0.114
0.045 BSC
R1
Z
A
K
S
4.56 BSC
1 2 3 4
5
0.87
0.46
2.60
1.01
0.58
2.89
U
K
L
1.14 BSC
R
0.170 0.190
4.32
4.70
0.63
0.51
0.89
3.93
4.83
5.33
1.01
−−−
1.27
4.32
F
R1 0.185 0.210
J
S
U
V
Z
0.025 0.040
0.020 −−−
0.035 0.050
0.155 0.170
L
H
D 5 PL
M
G
0.13 (0.005)
T
SOLDERING FOOTPRINT*
6.4
0.252
2.2
0.086
0.34
0.013
5.8
0.228
5.36
0.217
10.6
0.417
0.8
0.031
mm
inches
ǒ
Ǔ
SCALE 4:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
13
NCV8660
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
ISSUE AJ
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
−X−
A
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
8
5
4
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
S
M
M
B
0.25 (0.010)
Y
1
K
−Y−
MILLIMETERS
DIM MIN MAX
INCHES
G
MIN
MAX
0.197
0.157
0.069
0.020
A
B
C
D
G
H
J
K
M
N
S
4.80
3.80
1.35
0.33
5.00 0.189
4.00 0.150
1.75 0.053
0.51 0.013
C
N X 45
_
SEATING
PLANE
1.27 BSC
0.050 BSC
−Z−
0.10
0.19
0.40
0
0.25 0.004
0.25 0.007
1.27 0.016
0.010
0.010
0.050
8
0.020
0.244
0.10 (0.004)
M
J
H
D
8
0
_
_
_
_
0.25
5.80
0.50 0.010
6.20 0.228
M
S
S
X
0.25 (0.010)
Z
Y
SOLDERING FOOTPRINT*
1.52
0.060
7.0
4.0
0.275
0.155
0.6
0.024
1.270
0.050
mm
inches
ǒ
Ǔ
SCALE 6:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
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PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
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Phone: 421 33 790 2910
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For additional information, please contact your local
Sales Representative
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