NCV890100 [ONSEMI]
1.2A, 2MHz Automotive Buck Switching Regulator; 1.2A ， 2MHz的汽车降压型开关稳压器
| 型号： | NCV890100 |
| 厂家： | 
ONSEMI |
| 描述： | 1.2A, 2MHz Automotive Buck Switching Regulator |
| 文件： | 总16页 (文件大小：177K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NCV890100
1.2A, 2MHz Automotive
Buck Switching Regulator
The NCV890100 is a fixed−frequency, monolithic, Buck switching
regulator intended for Automotive, battery−connected applications
that must operate with up to a 36V input supply. The regulator is
suitable for systems with low noise and small form factor
requirements often encountered in automotive driver information
systems. The NCV890100 is capable of converting the typical 4.5 V to
18 V automotive input voltage range to outputs as low as 3.3 V at a
constant switching frequency above the sensitive AM band,
eliminating the need for costly filters and EMI countermeasures. The
NCV890100 also provides several protection features expected in
Automotive power supply systems such as current limit, short circuit
protection, and thermal shutdown. In addition, the high switching
frequency produces low output voltage ripple even when using small
inductor values and an all−ceramic output filter capacitor − forming a
space−efficient switching regulator solution.
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MARKING
DIAGRAMS
V8901
00
DFN8
CASE 506BY
ALYWG
1
G
8
1
NCV890100
ALYWX
SOIC−8 EP
CASE 751AC
8
G
1
Features
• Internal N−Channel Power Switch
A
L
Y
W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Device
• Low V Operation Down to 4.5 V
IN
• High V Operation to 36 V
IN
• Withstands Load Dump to 40 V
• 2 MHz Free−running Switching Frequency
(*Note: Microdot may be in either location)
• Logic level Enable Input Can be Directly Tied to Battery
• 1.4 A (min) Cycle−by−Cycle Peak Current Limit
• Short Circuit Protection enhanced by Frequency Foldback
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 14 of this data sheet.
•
1.75% Output Voltage Tolerance
• Output Voltage Adjustable Down to 0.8 V
• 1.4 Millisecond Internal Soft−Start
• Thermal Shutdown (TSD)
• These Devices are Pb−Free and are RoHS Compliant
• Low Shutdown Current
Applications
• Audio
• Wettable Flanks DFN
• NCV Prefix for Automotive and Other Applications
Requiring Unique Site and Control Change
Requirements; AEC−Q100 Qualified and PPAP
Capable
• Infotainment
• Safety − Vision Systems
• Instrumentation
© Semiconductor Components Industries, LLC, 2013
1
Publication Order Number:
February, 2013 − Rev. 2
NCV890100/D
NCV890100
CDRV
DBST
CBST
NCV890100
VIN SW
L1
VIN
EN
VOUT
COUT
1
2
3
4
8
7
6
5
CIN
DFW
DRV
GND
EN
BST
FB
RFB1
COMP
RFB2
RCOMP
CCOMP
Figure 1. Typical Application
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2
NCV890100
CDRV
SW
DBST
VIN
CIN
VIN
L1
VOUT
COUT
3.3 V
Reg
CBST
DFW
DRV
BST
Oscillator
PWM
LOGIC
ON
OFF
+
S
+
+
−
FB
GND
−
+
1.2 A
+
TSD
Soft−Start
RESET
COMP
VOLTAGES
MONITORS
RCOMP
EN
Enable
CCOMP
Figure 2. NCV890100 Block Diagram
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3
NCV890100
MAXIMUM RATINGS
Rating
Symbol
Value
−0.3 to 40
40
Unit
V
Min/Max Voltage VIN
Max Voltage VIN to SW
Min/Max Voltage SW
Min Voltage SW − 20ns
Min/Max Voltage BST
Min/Max Voltage BST to SW
Min/Max Voltage on EN
Min/Max Voltage COMP
Min/Max Voltage FB
V
−0.7 to 40
−3.0
V
V
−0.3 to 40
−0.3 to 3.6
−0.3 to 40
−0.3 to 2
−0.3 to 18
−0.3 to 3.6
50
V
V
V
V
Min/Max Voltage DRV
V
Thermal Resistance, 3x3 DFN Junction−to−Ambient*
Thermal Resistance, SOIC−8 EP Junction−to−Ambient*
Storage Temperature range
R
°C/W
°C/W
°C
q
JA
R
40
q
JA
−55 to +150
−40 to +150
Operating Junction Temperature Range
T
°C
J
ESD withstand Voltage
Human Body Model
V
ESD
2.0
200
>1.0
kV
V
kV
Machine Model
Charge Device Model
Moisture Sensitivity, DFN8
MSL
MSL
Level 1
Level 2
260
Moisture Sensitivity, SOIC−8 EP
Peak Reflow Soldering Temperature
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
*Mounted on 1 sq. in. of a 4−layer PCB with 1 oz. copper thickness.
RECOMMENDED OPERATING CONDITIONS:
Rating
Value
Unit
V
V
IN
Range
4.5 to 36
−40 to 105
Ambient Temperature Range
°C
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4
NCV890100
1
2
8
SW
SW
8
1
2
VIN
DRV
GND
VIN
DRV
GND
7
6
BST
FB
BST
FB
7
6
3
4
3
4
5
5
COMP
COMP
EN
EN
(Top View)
(Top View)
Figure 3. Pin Connections
PIN FUNCTION DESCRIPTIONS
Pin No.
Symbol
VIN
Description
1
2
3
4
Input voltage from battery. Place an input filter capacitor in close proximity to this pin.
Output voltage to provide a regulated voltage to the Power Switch gate driver.
Battery return, and output voltage ground reference.
DRV
GND
EN
This TTL compatible Enable input allows the direct connection of Battery as the enable signal. Grounding
this input stops switching and reduces quiescent current draw to a minimum.
5
6
7
COMP
FB
Error Amplifier output, for tailoring transient response with external compensation components.
Feedback input pin to program output voltage, and detect pre−charged or shorted output conditions.
Bootstrap input provides drive voltage higher than VIN to the N−channel Power Switch for optimum
BST
switch R
and highest efficiency.
DS(on)
8
SW
Switching node of the Regulator. Connect the output inductor and cathode of the freewheeling diode to
this pin.
Exposed
Pad
Connect to Pin 3 (electrical ground) and to a low thermal resistance path to the ambient temperature
environment.
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NCV890100
ELECTRICAL CHARACTERISTICS (V = 4.5 V to 28 V, V = 5 V, V
= V
+ 3.0 V, C
= 0.1 mF, Min/Max values are valid
IN
EN
BST
SW
DRV
for the temperature range −40°C ≤ T ≤ 150°C unless noted otherwise, and are guaranteed by test, design or statistical correlation.)
J
Parameter
QUIESCENT CURRENT
Symbol
Conditions
Min
Typ
Max
Unit
Quiescent Current, shutdown
Quiescent Current, enabled
UNDERVOLTAGE LOCKOUT − VIN (UVLO)
UVLO Start Threshold
UVLO Stop Threshold
UVLO Hysteresis
I
I
V
IN
= 13.2 V, V = 0 V, T = 25°C
5
3
mA
qSD
EN
J
V
IN
= 13.2 V
mA
qEN
V
V
V
rising
falling
4.1
3.9
0.1
4.5
4.4
0.2
V
V
V
UVLSTT
UVLSTP
UVLOHY
IN
V
IN
V
ENABLE (EN)
Logic Low
V
0.8
8
V
V
ENLO
Logic High
V
2
ENHI
Input Current
I
30
mA
EN
SOFT−START (SS)
Soft−Start Completion Time
VOLTAGE REFERENCE
FB Pin Voltage during regulation
ERROR AMPLIFIER
FB Bias Current
t
0.8
1.4
0.8
2.0
0.814
1
ms
V
SS
V
FBR
COMP shorted to FB
0.786
0.25
I
V
FB
= 0.8 V
mA
FBBIAS
Transconductance
V
= 1.3 V
IN
IN
mmho
COMP
g
4.5 V < V < 18 V
0.6
0.3
1
0.5
1.5
0.75
m
g
20 V < V < 28 V
m(HV)
Output Resistance
R
1.4
MW
mA
OUT
SOURCE
COMP Source Current Limit
I
V
FB
= 0.63 V, V
= 1.3 V
COMP
4.5 V < V < 18 V
75
40
IN
20 V < V < 28 V
IN
COMP Sink Current Limit
I
V
FB
= 0.97 V, V
= 1.3 V
mA
SINK
COMP
4.5 V < V < 18 V
75
40
IN
20 V < V < 28 V
IN
Minimum COMP voltage
OSCILLATOR
V
F
V
= 0.97 V
0.2
0.7
V
CMPMIN
FB
Frequency
F
4.5 < V < 18 V
20 V < V < 28 V
1.8
0.9
2.0
1.0
2.2
1.1
MHz
SW
SW(HV)
IN
IN
VIN FREQUENCY FOLDBACK MONITOR
Frequency Foldback Threshold
V
FB
= 0.63 V
V
V
IN
V
IN
rising
falling
V
18.4
18
20
19.8
FLDUP
FLDDN
V
Frequency Foldback Hysteresis
V
FLDHY
0.2
0.3
0.4
V
SLOPE COMPENSATION
Ramp Slope (Note 1)
(With respect to switch current)
S
4.5 < V < 18 V
0.7
0.25
1.3
0.6
A/ms
ramp
IN
S
20 V < V < 28 V
ramp(HV)
IN
1. Not tested in production. Limits are guaranteed by design.
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6
NCV890100
ELECTRICAL CHARACTERISTICS (V = 4.5 V to 28 V, V = 5 V, V
= V
+ 3.0 V, C
= 0.1 mF, Min/Max values are valid
IN
EN
BST
SW
DRV
for the temperature range −40°C ≤ T ≤ 150°C unless noted otherwise, and are guaranteed by test, design or statistical correlation.)
J
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
POWER SWITCH
ON Resistance
R
V
= V + 3.0 V
SW
650
10
mW
mA
ns
DSON
BST
Leakage current VIN to SW
Minimum ON Time
I
V
= 0 V, V
= 0, V = 18 V
SW IN
LKSW
EN
t
Measured at SW pin
Measured at SW pin
45
70
ONMIN
Minimum OFF Time
t
ns
OFFMIN
At F
= 2 MHz (normal)
30
50
SW
At F
= 500 kHz (max duty cycle)
30
70
SW
PEAK CURRENT LIMIT
Current Limit Threshold
I
1.4
1.55
1.7
A
LIM
SHORT CIRCUIT FREQUENCY FOLDBACK
Lowest Foldback Frequency
F
V
= 0 V, 4.5 V < V < 18 V
400
200
24
500
250
32
600
300
40
kHz
SWAF
FB
IN
Lowest Foldback Frequency − High V
F
V
= 0 V, 20 V < V < 28 V
in
SWAFHV
FB IN
Hiccup Mode
F
V
FB
= 0 V
SWHIC
GATE VOLTAGE SUPPLY (DRV pin)
Output Voltage
V
3.1
2.7
2.5
16
3.3
2.9
2.8
3.5
3.05
3.0
45
V
V
DRV
DRV POR Start Threshold
DRV POR Stop Threshold
DRV Current Limit
V
V
DRVSTT
DRVSTP
DRVLIM
V
I
V
DRV
= 0 V
mA
OUTPUT PRECHARGE DETECTOR
Threshold Voltage
V
SSEN
20
35
50
mV
THERMAL SHUTDOWN
Activation Temperature (Note 1)
Hysteresis (Note 1)
T
150
5
190
20
°C
°C
SD
T
HYS
1. Not tested in production. Limits are guaranteed by design.
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NCV890100
TYPICAL CHARACTERISTICS CURVES
8
7
6
5
4
3
2
1
2.6
V
= 13.2 V
IN
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0
−50 −25
0
25
50
75
100
125
150
−50 −25
0
25
50
75
100
125
150
T . JUNCTION TEMPERATURE (°C)
J
T . JUNCTION TEMPERATURE (°C)
J
Figure 4. Shutdown Quiescent Current vs.
Junction Temperature
Figure 5. Enabled Quiescent Current vs.
Junction Temperature
4.7
4.6
4.5
4.4
4.3
4.2
4.1
4.0
3.9
4.6
4.5
4.4
4.3
4.2
4.1
4.0
3.9
3.8
3.7
−50 −25
0
25
50
75
100
125
150
−50
−25
0
25
50
75
100
125
150
T . JUNCTION TEMPERATURE (°C)
J
T . JUNCTION TEMPERATURE (°C)
J
Figure 6. UVLO Start Threshold vs. Junction
Temperature
Figure 7. UVLO Stop Threshold vs. Junction
Temperature
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.85
0.84
0.83
0.82
0.81
0.80
0.79
0.78
0.77
0.76
0.75
−50 −25
0
25
50
75
100
125
150
−50 −25
0
25
50
75
100
125
150
T . JUNCTION TEMPERATURE (°C)
J
T . JUNCTION TEMPERATURE (°C)
J
Figure 8. Soft−Start Duration vs. Junction
Figure 9. FB Regulation Voltage vs. Junction
Temperature
Temperature
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NCV890100
TYPICAL CHARACTERISTICS CURVES
1.4
1.2
1.0
0.8
0.6
0.4
0.2
100
90
V
IN
= 4.5 V
80
V
= 4.5 V
IN
70
60
50
40
30
20
V
IN
= 28 V
V
IN
= 28 V
−50 −25
0
25
50
75
100
125
150
−50
−25
0
25
50
75
100
125
150
T . JUNCTION TEMPERATURE (°C)
J
T . JUNCTION TEMPERATURE (°C)
J
Figure 10. Error Amplifier Transconductance
vs. Junction Temperature
Figure 11. Error Amplifier Max Sourcing
Current vs. Junction Temperature
100
90
80
70
60
50
40
30
20
2.2
V
IN
= 13.2 V
2.0
1.8
1.6
1.4
1.2
1.0
0.8
V
= 4.5 V
IN
V
= 28 V
IN
V
IN
= 28 V
−50
−25
0
25
50
75
100
125
150
−50
−25
0
25
50
75
100
125
150
T . JUNCTION TEMPERATURE (°C)
J
T . JUNCTION TEMPERATURE (°C)
J
Figure 12. Error Amplifier Max Sinking Current
vs. Junction Temperature
Figure 13. Oscillator Frequency vs. Junction
Temperature
19.6
19.4
19.2
19.0
18.8
18.6
18.4
18.2
900
800
700
600
500
400
300
200
100
0
V
V
FLDUP
FLDDN
−50 −25
0
25
50
75
100
125
150
−50
−25
0
25
50
75
100
125
15
T . JUNCTION TEMPERATURE (°C)
J
T . JUNCTION TEMPERATURE (°C)
J
Figure 14. Rising Frequency Foldback
Threshold vs. Junction Temperature
Figure 15. Power Switch RDS(on) vs. Junction
Temperature
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NCV890100
TYPICAL CHARACTERISTICS CURVES
80
75
70
65
60
55
50
45
40
75
70
65
60
55
50
45
40
35
−50
−25
0
25
50
75
100
125
150
−50
−25
0
25
50
75
100
125
150
T . JUNCTION TEMPERATURE (°C)
J
T . JUNCTION TEMPERATURE (°C)
J
Figure 16. Minimum On Time vs. Junction
Temperature
Figure 17. Minimum Off Time vs. Junction
Temperature
1.70
1.65
1.60
1.55
1.50
1.45
1.40
600
V
= 4.5 V
IN
550
500
450
400
350
300
250
200
V
IN
= 28 V
−50
−25
0
25
50
75
100
125
150
−50
−25
0
25
50
75
100
125
150
T . JUNCTION TEMPERATURE (°C)
J
T . JUNCTION TEMPERATURE (°C)
J
Figure 18. Current Limit Threshold vs.
Junction Temperature
Figure 19. Short−Circuit Foldback Frequency
vs. Junction Temperature
40
38
36
34
32
30
28
26
24
3.50
3.45
3.40
3.35
3.30
3.25
3.20
3.15
3.10
I
= 0 mA
DRV
I
= 16 mA
DRV
−50
−25
0
25
50
75
100
125
150
−50 −25
0
25
50
75
100
125
150
T . JUNCTION TEMPERATURE (°C)
J
T . JUNCTION TEMPERATURE (°C)
J
Figure 20. Hiccup Mode Switching Frequency
vs. Junction Temperature
Figure 21. DRV Voltage vs. Junction
Temperature
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NCV890100
TYPICAL CHARACTERISTICS CURVES
3.1
3.0
2.9
2.8
2.7
2.6
2.5
30
29
28
27
V
V
DRVSTT
26
25
24
23
22
21
DRVSTP
−50
−25
0
25
50
75
100
125
150
−50
−25
0
25
50
75
100
125
150
T . JUNCTION TEMPERATURE (°C)
J
T . JUNCTION TEMPERATURE (°C)
J
Figure 22. DRV Reset Threshold vs. Junction
Temperature
Figure 23. DRV Current Limit vs. Junction
Temperature
55
50
45
40
35
30
25
20
−50 −25
0
25
50
75
100
125
150
T . JUNCTION TEMPERATURE (°C)
J
Figure 24. Output Precharge Detector
Threshold vs. Junction Temperature
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NCV890100
GENERAL INFORMATION
INPUT VOLTAGE
inductor current at which the power switch shuts off. The
Current Mode control method employed by the NCV890100
allows the use of a simple, Type II compensation to optimize
the dynamic response according to system requirements.
An Undervoltage Lockout (UVLO) circuit monitors the
input, and inhibits switching and resets the Soft−start circuit
if there is insufficient voltage for proper regulation. The
NCV890100 can regulate a 3.3 V output with input voltages
above 4.5 V and a 5.0 V output with an input above 6.5 V.
The NCV890100 withstands input voltages up to 40 V.
To limit the power lost in generating the drive voltage for
the Power Switch, the switching frequency is reduced by a
factor of 2 when the input voltage exceeds the V
Frequency Foldback threshold V
Frequency reduction is automatically terminated when the
input voltage drops back below the V Frequency Foldback
SLOPE COMPENSATION
A fixed slope compensation signal is generated internally
and added to the sensed current to avoid increased output
voltage ripple due to bifurcation of inductor ripple current
at duty cycles above 50%. The fixed amplitude of the slope
compensation signal requires the inductor to be greater than
a minimum value, depending on output voltage, in order to
avoid sub−harmonic oscillations. For 3.3 V and 5 V output
voltages, the recommended inductor value is 4.7 mH.
IN
(see Figure 25).
FLDUP
IN
threshold V
.
FLDDN
SHORT CIRCUIT FREQUENCY FOLDBACK
Fsw
During severe output overloads or short circuits, the
NCV890100 automatically reduces its switching frequency.
This creates duty cycles small enough to limit the peak
current in the power components, while maintaining the
ability to automatically reestablish the output voltage if the
overload is removed. If the current is still too high after the
switching frequency folds back to 500 kHz, the regulator
enters an auto−recovery burst mode that further reduces the
dissipated power.
(MHz)
2
1
CURRENT LIMITING
Due to the ripple on the inductor current, the average
output current of a buck converter is lower than the peak
current setpoint of the regulator. Figure 26 shows − for a
4.7 mH inductor − how the variation of inductor peak current
with input voltage affects the maximum DC current the
NCV890100 can deliver to a load.
4
18 20
36
VIN (V)
Figure 25. NCV890100 Switching Frequency
Reduction at High Input Voltage
1.4
1.3
ENABLE
The NCV890100 is designed to accept either a logic level
signal or battery voltage as an Enable signal. EN low induces
a ’sleep mode’ which shuts off the regulator and minimizes
(3.3 V
)
OUT
1.2
1.1
1.0
0.9
0.8
0.7
0.6
its supply current to a couple of mA typically (I ) by
qSD
disabling all functions. Upon enabling, voltage is
established at the DRV pin, followed by a soft−start of the
switching regulator output.
(5 V
)
OUT
SOFT−START
Upon being enabled or released from a fault condition,
and after the DRV voltage is established, a soft−start circuit
ramps the switching regulator error amplifier reference
voltage to the final value. During soft−start, the average
switching frequency is lower than its normal mode value
(typically 2 MHz) until the output voltage approaches
regulation.
0
5
10
15
20
25
30
35
40
INPUT VOLTAGE (V)
Figure 26. NCV890100 Load Current Capability
with 4.7 mH Inductor
ERROR AMPLIFIER
The error amplifier is a transconductance type amplifier.
The output voltage of the error amplifier controls the peak
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NCV890100
BOOTSTRAP
DESIGN METHODOLOGY
At the DRV pin an internal regulator provides a
ground−referenced voltage to an external capacitor (C ),
to allow fast recharge of the external bootstrap capacitor
The NCV890100 being a fixed−frequency regulator with
the switching element integrated, is optimized for one value
of inductor. This value is set to 4.7 mH, and the slope
compensation is adjusted for this inductor. The only
components left to be designed are the input and output
capacitor and the freewheeling diode.
DRV
(C ) used to supply power to the power switch gate driver.
BST
If the voltage at the DRV pin goes below the DRV UVLO
Threshold V , switching is inhibited and the
DRVSTP
Soft−start circuit is reset, until the DRV pin voltage goes
back up above V
Output capacitor:
The minimum output capacitor value can be calculated
based on the specification for output voltage ripple:
.
DRVSTT
In order for the bootstrap capacitor to stay charged, the
Switch node needs to be pulled down to ground regularly. In
very light load condition, the NCV890100 skips switching
cycles to ensure the output voltage stays regulated. When the
skip cycle repetition frequency gets too low, the bootstrap
voltage collapses and the regulator stops switching.
Practically, this means that the NCV890100 needs a
minimum load to operate correctly: to cover all conditions
of input voltage and temperature, this minimum load is 8
mA.
DIL
(eq. 1)
COUTmin
+
8 @ DVOUT @ FSW
With
− DI the inductor ripple current:
L
V
OUT
@ ǒ1 *
L @ FSW
Ǔ
VOUT
V
IN
(eq. 2)
DIL +
OUTPUT PRECHARGE DETECTION
Prior to Soft−start, the FB pin is monitored to ensure the
SW voltage is low enough to have charged the external
− DV
the desired voltage ripple.
OUT
However, the ESR of the output capacitor also contributes
to the output voltage ripple, so to comply with the
requirement, the ESR cannot exceed R
bootstrap capacitor (C ). If the FB pin is higher than
BST
:
ESRmax
V
SSEN
, restart is delayed until the output has discharged.
DVOUT @ L @ FSW
RESRmax
+
THERMAL SHUTDOWN
(eq. 3)
V
OUT
A thermal shutdown circuit inhibits switching, resets the
Soft−start circuit, and removes DRV voltage if internal
temperature exceeds a safe level. Switching is automatically
restored when temperature returns to a safe level.
ǒ1 *
Ǔ
VOUT
V
IN
Finally, the output capacitor must be able to sustain the ac
current (or RMS ripple current):
DIL
MINIMUM DROPOUT VOLTAGE
(eq. 4)
IOUTac
+
Ǹ
When operating at low input voltages, two parameters
play a major role in imposing a minimum voltage drop
across the regulator: the minimum off time (that sets the
maximum duty cycle), and the on state resistance.
When operating in continuous conduction mode (CCM),
the output voltage is equal to the input voltage multiplied by
the duty ratio. Because the NCV890100 needs a sufficient
bootstrap voltage to operate, its duty cycle cannot be 100%:
2 3
Typically, with the recommended 4.7 mH inductor, two
ceramic capacitors of 10 mF each in parallel give very good
results.
Freewheeling diode:
The diode must be chosen according to its maximum
current and voltage ratings, and to thermal considerations.
As far as max ratings are concerned, the maximum reverse
voltage the diode sees is the maximum input voltage (with
some margin in case of ringing on the Switch node), and the
maximum forward current the peak current limit of the
it needs a minimum off time (t
) to periodically re−fuel
OFFmin
the bootstrap capacitor C . This imposes a maximum duty
BST
ratio D
= 1 − t
.F
, with the switching
MAX
OFFmin SW(min)
frequency being folded back down to F
keep regulating at the lowest input voltage possible.
The drop due to the on−state resistance is simply the
voltage drop across the Switch resistance R
= 500 kHz to
SW(min)
NCV890100, I
.
LIM
The power dissipated in the diode is P
:
Dloss
at the
DSON
VOUT
given output current: V
= I
.R
.
SWdrop
OUT DSon
(eq. 5)
@ VF ) IDRMS @ RD
@ ǒ1 * Ǔ
P
Dloss + IOUT
Which leads to the maximum output voltage in low Vin
condition: V = D .V − V
VIN
OUT
MAX IN(min)
SWdrop
with:
− I
the average (dc) output current
EXPOSED PAD
OUT
− V the forward voltage of the diode
The exposed pad (EPAD) on the back of the package must
be electrically connected to the electrical ground (GND pin)
for proper, noise−free operation.
F
− I
the RMS current in the diode:
DRMS
http://onsemi.com
13
NCV890100
For example, using a 4.7 mH input capacitor, it is easy to
2
DIL
2
(
)
IOUT )
calculate that an inductor of 200 nH will ensure that the
input filter has a cut−off frequency below 200 kHz (low
enough to attenuate the 2 MHz ripple).
(eq. 6)
1 * D ǒ
Ǔ
IDRMS
+
Ǹ
12
− R the dynamic resistance of the diode (extracted from
D
the V/I curve of the diode in its datasheet).
PCB LAYOUT RECOMMENDATION
Then, knowing the thermal resistance of the package and
the amount of heatsinking on the PCB, the temperature rise
corresponding to this power dissipation can be estimated.
As with any switching power supplies, there are some
guidelines to follow to optimize the layout of the printed
circuit board for the NCV890100. However, because of the
high switching frequency extra care has to be taken.
− Minimize the area of the power current loops:
♦ Input capacitor ³ NCV890100 switch ³ Inductor
³ output capacitor ³ return through Ground
♦ Freewheeling diode ³ inductor ³ Output capacitor
³ return through ground
Input capacitor:
The input capacitor must sustain the RMS input ripple
current I
:
INac
DIL
D
(eq. 7)
Ǹ
IINac
+
2
3
− Minimize the length of high impedance signals, and
route them far away from the power loops:
♦ Feedback trace
It can be designed in combination with an inductor to build
an input filter to filter out the ripple current in the source, in
order to reduce EMI conducted emissions.
♦ Comp trace
ORDERING INFORMATION
†
Device
NCV890100MWTXG
Package
Shipping
DFN8 with wettable flanks
3000 / Tape & Reel
2500 / Tape & Reel
(Pb−Free)
NCV890100PDR2G
SOIC−8 EP
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
http://onsemi.com
14
NCV890100
PACKAGE DIMENSIONS
SOIC−8 EP
CASE 751AC
ISSUE B
2 X
NOTES:
1. DIMENSIONS AND TOLERANCING PER
ASME Y14.5M, 1994.
2. DIMENSIONS IN MILLIMETERS (ANGLES
IN DEGREES).
3. DIMENSION b DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE
0.08 MM TOTAL IN EXCESS OF THE “b”
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
0.10
C A-B
D
DETAIL A
D
A
8
EXPOSED
PAD
F
5
5
8
4. DATUMS A AND B TO BE DETERMINED
AT DATUM PLANE H.
G
E1
E
2 X
MILLIMETERS
DIM MIN
MAX
1.75
0.10
1.65
0.51
0.48
0.25
0.23
h
0.10 C D
2 X
A
A1
A2
b
b1
c
1.35
0.00
1.35
0.31
0.28
0.17
0.17
1
e
4
4
1
0.20
C
PIN ONE
LOCATION
BOTTOM VIEW
8 X b
A
A
B
0.25
C A-B D
END VIEW
c
c1
D
TOP VIEW
4.90 BSC
E
E1
e
6.00 BSC
3.90 BSC
1.27 BSC
H
A
0.10
C
A2
L
L1
F
0.40
1.04 REF
2.24
1.27
8 X
(b)
b1
GAUGE
PLANE
0.10
C
3.20
2.51
0.50
8
G
h
1.55
0.25
0
SEATING
PLANE
L
q
0.25
q
_
_
c1
SECTION A−A
(L1)
DETAIL A
A1
SIDE VIEW
C
SOLDERING FOOTPRINT*
2.72
0.107
1.52
0.060
Exposed
Pad
4.0
0.155
2.03
0.08
7.0
0.275
0.6
0.024
1.270
0.050
mm
inches
ǒ
Ǔ
SCALE 6:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
15
NCV890100
PACKAGE DIMENSIONS
DFN8, 3x3, 0.5P
CASE 506BY
ISSUE A
NOTES:
A
B
D
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
L
L
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30mm FROM THE TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
5. FOR DEVICE OPN CONTAINING W OPTION,
DETAIL B ALTERNATE CONSTRUCTION IS
NOT APPLICABLE.
L1
DETAIL A
ALTERNATE
CONSTRUCTIONS
E
PIN ONE
REFERENCE
2X
MILLIMETERS
A3
DIM MIN
0.80
A1 0.00
MAX
1.00
0.05
0.10
C
EXPOSED Cu
MOLD CMPD
A
2X
A3
b
D
D2 2.20
E
0.20 REF
0.10
C
C
TOP VIEW
0.25
0.35
3.00 BSC
2.40
3.00 BSC
1.60
0.65 BSC
A1
A
DETAIL B
(A3)
0.05
DETAIL B
E2 1.40
ALTERNATE
CONSTRUCTIONS
e
K
L
0.20
0.20
−−−
0.40
0.15
0.05
C
L1 0.00
NOTE 4
SEATING
PLANE
A1
C
SIDE VIEW
D2
RECOMMENDED
SOLDERING FOOTPRINT*
DETAIL A
1
4
8X
0.53
2.46
8X
L
E2
3.30
1.66
8X
K
8
5
8X b
e/2
0.10
0.05
C
C
A
B
1
08.4X0
e
NOTE 3
0.65
PITCH
BOTTOM VIEW
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where
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any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture
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NCV890100/D
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