NCV890430 [ONSEMI]
Duty Cycle Step-Down Synchronous Regulator;型号: | NCV890430 |
厂家: | ONSEMI |
描述: | Duty Cycle Step-Down Synchronous Regulator |
文件: | 总9页 (文件大小:160K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
NCV890430
Product Preview
0.6 A 2 MHz 100% Duty Cycle
Step‐Down Synchronous
Regulator for Automotive
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The NCV890430 is a fixed-frequency Synchronous Buck regulator
intended for Automotive, battery-connected applications that operate
with up to a 45 V input supply. It is suitable for automotive systems
with high efficiency, low noise and Low Shutdown Current
requirements that also need to operate at low input voltage close to the
output voltage. A reset pin (with adjustable delay) simplifies
interfacing with a microcontroller. This part also features an enable
input that can either be connected to a low voltage (such as
a micro-controller output) or high voltage (such as the battery input),
and a synchronization input.
1
DFN8, 3x3, 0.65P
CASE 506CS
PIN CONNECTIONS
The NCV890430 also provides several protection features expected
in automotive power supply systems such as current limit, short circuit
protection, and thermal shutdown. In addition, the high switching
frequency produces low output voltage ripple even when using small
inductor values and all-ceramic input output filter capacitors −
forming a space-efficient switching regulator solution
VIN
RSTB
GND
EN
1
2
3
4
8
7
6
5
SW
PGND
SYNC
VOUT
Features
• Internal 500 mW P-channel and 250 mW N-channel Power Switches
• Capable of 100% Duty Cycle Operation
(DFN8 Top View)
• V Operating Range 3.5 V to 37 V
IN
MARKING DIAGRAM
• Withstands Load Dump to 45 V
• 2 MHz Free-running Switching Frequency
• Low Shutdown Current < 10 mA
• High Voltage Enable Pin
1
XXXXXX
XXXXXX
ALYWG
G
• Synchronization Input Pin
XXXXX = Specific Device Code (TBD)
• DC Output Current of at Least 0.6 A
• Fixed Output Voltage (5 V, 3.3 V, 2.5 V Versions)
A
L
Y
W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
•
2% Output Voltage Accuracy
• DFN Package with Wettable Flanks
(Pin Edge Plating per JEDEC MO220)
(Note: Microdot may be in either location)
• NCV Prefix for Automotive Requiring Site and Control Changes
• These are Pb−Free Devices
ORDERING INFORMATION
See detailed ordering, marking and shipping information on
Typical Applications
• Automotive Infotainment and Instrumentation
• Automotive Body Applications
• Linear Regulator Replacement
• Rear View Camera
page 8 of this data sheet.
This document contains information on some products that are still under development. ON
Semiconductor reserves the right to change or discontinue these products without notice.
© Semiconductor Components Industries, LLC, 2015
1
Publication Order Number:
June, 2015 − Rev. P3
NCV890430/D
NCV890430
Figure 1. Typical Application Schematic
Figure 2. Simplified Block Diagram
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2
NCV890430
Table 1. PIN FUNCTION DESCRIPTIONS
Pin No.
Pin Name
VIN
Description
1
2
Input voltage from battery. Place an input filter capacitor in close proximity to this pin.
RSTB
Reset reporting flag. Open drain output, pulling down to ground when the output voltage is out
of regulation. The value of the external pull-up resistor determines the delay time that the
Reset is held low.
3
4
GND
EN
Analog ground reference − should be connected directly to the output capacitor ground and the
exposed pad.
Enable input. Connecting a “high” voltage (TTL compatible, battery voltage tolerant) to this pin
turns on the regulator. A low voltage forces the part into a very low Iq shutdown mode.
5
6
VOUT
SYNC
Output voltage sensing for regulation.
Synchronization input. Connecting an external clock to this pin synchronizes switching to the
rising edge of the SYNC signal.
7
PGND
SW
Power ground, connect directly to the input capacitor ground and to the exposed pad.
Switching node of the Regulator. Connect the output inductor to this pin.
8
Exposed Pad
EPAD
Must be connected to GND (pin 3, electrical ground) and to a low thermal resistance path to
the ambient temperature environment..
Table 2. ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
−0.3 to 45
45
Unit
V
Min/Max Voltage VIN
Max Voltage VIN to SW
V
Min/Max Voltage SW
−0.7 to 40 V
−3.0
V
Min Voltage SW − 20 ns
V
Min/Max Voltage EN
−0.3 to 40 V
−0.3 to 6
−0.3 to 18
40
V
Min/Max Voltage on SYNC, RSTB
Min/Max Voltage VOUT
V
V
Thermal Resistance, DFN8 Junction-to-Ambient (Note 1)
Storage Temperature Range
Operating Junction Temperature Range
ESD withstand Voltage (Human Body Model)
Moisture Sensitivity
R
°C/W
°C
°C
kV
θ
JA
J
−55 to +150
−40 to +150
2.0
T
V
ESD
MSL
Level 1
260
Peak Reflow Soldering Temperature (Note 1)
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Mounted on 1 sq. in. of a 4-layer PCB with 1 oz. copper thickness.
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3
NCV890430
Table 3. ELECTRICAL CHARACTERISTICS
(V = 4.5 V to 28 V, EN = 5 V. Min/Max values are valid for the temperature range −40°C ≤ T ≤ 150°C unless noted otherwise,
IN
J
and are guaranteed by test, design or statistical correlation.)
Parameter
QUIESCENT CURRENT
Test Conditions
Symbol
Min
Typ
Max
Unit
Quiescent Current, Enabled
Quiescent Current, Shutdown
UNDERVOLTAGE LOCKOUT − VIN
UVLO Start Threshold
V
V
= 13.2 V
I
I
3.0
8.0
mA
IN
qEN
= 13.2 V, V = 0 V, 25 °C
5.0
mA
IN
EN
qSD
V
V
Rising
Falling
V
V
4.1
3.2
4.5
3.5
V
V
IN
UVLSTT
UVLO Stop Threshold
IN
UVLSTP
SOFT-START
Soft-Start Completion Time
OUTPUT VOLTAGE
t
0.8
1.4
2.0
ms
V
SS
Output Voltage during Regulation
100 mA < I
< 0.6 A
V
OUT
OUTreg
5.0 V Option
3.3 V Option
2.5 V Option
4.9
3.234
2.45
5.0
3.3
2.5
5.1
3.366
2.55
OSCILLATOR
Frequency
4.5 V < V < 18 V
f
1.8
0.9
2.0
1.0
2.2
1.1
MHz
IN
SW
20 V < V < 28 V
f
IN
SW(HV)
VBAT OVERVOLTAGE SHUTDOWN MONITOR
Overvoltage Stop Threshold
V
V
37
34.5
0.9
40
V
V
V
OV1SP
OV1ST
OV1HY
Overvoltage Start Threshold
Overvoltage Hysteresis
V
1.7
0.3
2.5
VIN FREQUENCY FOLDBACK MONITOR
Frequency Foldback Threshold
V
V
Rising
Falling
V
FLDUP
V
FLDDN
18.4
18
20
19.8
V
V
IN
IN
Frequency Foldback Hysteresis
PEAK CURRENT LIMIT
V
0.2
0.4
FLDHY
Current Limit Threshold
I
1.5
1.2
1.7
1.6
1.9
2.0
A
A
LIM
Low-Side Current Limit Threshold
POWER SWITCHES
V
SW
= 13.2 V
I
LIMLS
High-Side Switch ON Resistance
Low-Side Switch ON Resistance
R
1000
550
10
mW
mW
mA
mA
ns
DSON−HS
R
DSON−LS
Leakage Current V to SW
V
V
= 0, −40_C ≤ T ≤ 85_C
I
LKSWH
IN
SW
J
Leakage Current SW to GND
Minimum ON Time
= V , −40_C ≤ T ≤ 85_C
I
LKSWL
10
SW
IN
J
Measured at SW Pin
t
45
70
ONMIN
Minimum OFF Time when Not 100% Duty
Cycle
Measured at SW Pin at f
= 2 MHz
t
30
10
50
ns
SW
OFFMIN
Non-Overlap Time
t
ns
NOVLP
SLOPE COMPENSATION
Ramp Slope (Note 2)
(With Respect to Switch Current)
4.5 V < V < 18 V
S
1.05
0.5
1.5
0.75
1.95
1.0
A/ms
IN
ramp
20 V < V < 28 V
S
IN
ramp(HV)
SHORT CIRCUIT FREQUENCY FOLDBACK
Switching Frequency in Short-Circuit
Condition
Lowest Foldback Frequency
kHz
V
OUT
V
OUT
= 0 V, 4.5 V < V < 18 V
f
SWAF
SWAFHV
450
225
550
275
650
325
IN
Lowest Foldback Frequency − High V
= 0 V, 20 V <V < 28V
f
IN
IN
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4
NCV890430
Table 3. ELECTRICAL CHARACTERISTICS (continued)
(V = 4.5 V to 28 V, EN = 5 V. Min/Max values are valid for the temperature range −40°C ≤ T ≤ 150°C unless noted otherwise,
IN
J
and are guaranteed by test, design or statistical correlation.)
Parameter
Test Conditions
Symbol
Min
Typ
Max
Unit
HICCUP MODE
Hiccup Mode
V
V
= 0 V
f
24
24
32
32
40
40
kHz
kHz
SW
SWHIC
Hiccup Mode 2 − SW Short to Battery
SYNCHRONIZATION
= 13.2 V
f
SWHICLS
SW
SYNC Input Resistance to Ground
SYNC Input High Threshold Voltage
SYNC Input Low Threshold Voltage
SYNC High Pulse Width
V
= 5.0 V
R
50
200
0.8
kW
V
SYNC
H(SYNC)
V
2.0
HSYNC
V
V
LSYNC
HSYNC
V
V
> max V
t
40
40
ns
SYNC
HSYNC
SYNC Low Pulse Width
< min V
t
ns
SYNC
LSYNC
LSYNC
External SYNC Frequency
f
1.8
2.5
MHz
ns
SYNC
Master Reassertion Time
Time from Last Rising SYNC Edge
to First Un-synchronized Turn-on.
t
650
93
I(SYNC)
RESET
Reset Threshold
V
OUT
V
OUT
Decreasing
Increasing
K
91
91.5
95
97
%
RES_LO
K
RES_HI
Reset Hysteresis (Ratio of VOUT)
Leakage Current into RSTB Pin
Noise-Filtering Delay
K
0.5
10
%
mA
ms
RES_HYS
1.0
25
From V
Going Low
< V
to RSTB Pin
t
OUT
RESET
RES_FILT
Reset Delay Time
I
I
I
= 1.1 mA
= 500 mA
= 100 mA
t
1.0
5.0
24
ms
ms
ms
RSTB
RSTB
RSTB
RESET
4.0
19
6.0
29
Reset Delay Modes
Power Good Mode (No Delay)
Delay Mode
1000
mA
600
0.4
Reset Output Low Level
ENABLE
I
= 1.2 mA
V
RESL
V
RSTB
Logic Low Threshold Voltage
Logic High Threshold Voltage
EN Pin Input Current
V
0.8
30
V
V
ENlow
ENhigh
ENbias
V
2.0
8.0
I
mA
THERMAL SHUTDOWN
Thermal Shutdown Activation Temperature
(Note 2)
T
155
5.0
190
20
°C
°C
SD
Hysteresis (Note 2)
T
HYS
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
2. Not tested in production. Limits are guaranteed by design.
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5
NCV890430
TYPICAL CURVES
TBD
Figure 3. Typical Efficiency vs. Output Current at VIN = 12 V
TBD
Figure 4. Typical Efficiency vs. Input Voltage at IOUT = 0.5 A
Figure 5. Worst Case Maximum Output Current vs. Input Voltage
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6
NCV890430
APPLICATION INFORMATION
General Description
input voltage drops low enough that the part cannot regulate
because it reaches its maximum duty cycle, the high-side
MOSFET can turn on permanently (100% duty cycle
operation), to help lower the minimum voltage at which the
regulator loses regulation.
An overvoltage monitoring circuit automatically
terminates switching if the input voltage exceeds 37 V (see
Figure 6), but the NCV890430 can withstand input voltages
up to 45 V.
The NCV890430 is a high-frequency synchronous
switch-mode regulator with current-mode control, fixed
output voltage and fixed internal closed-loop compensation,
accepting a wide input voltage range typical to automotive
applications.
The use of a P-channel high-side MOSFET simplifies the
driving scheme (no bootstrap circuitry needed), and enables
a duty cycle of 100% for low dropout operation at low input
voltage.
To avoid skipping switching pulses and enter an
uncontrolled mode of operation, the switching frequency is
reduced by a factor of 2 when the input voltage exceeds the
Input Voltage
An Undervoltage Lockout (UVLO) circuit monitors the
input, and can inhibit switching and reset the soft-start
circuit if there is insufficient voltage for proper regulation.
Depending on the output conditions (voltage option and
loading), the NCV890430 may lose regulation and run in
drop-out mode before reaching the UVLO threshold: refer
V
IN
Frequency Foldback threshold (see Figure 6 below).
Frequency reduction is automatically terminated when the
input voltage drops back below the V Frequency Foldback
IN
threshold. This also helps to limit the power lost in switching
and generating the drive voltage for the Power Switches at
high input voltage.
to the Minimum V calculation tool for details. When the
IN
f
(MHz)
SW
2
100% duty
cycle if
drop−out
mode
1
V
IN
(V)
3.5
18 20
34.5 40 45
Figure 6. NCV890430 Worst-Case Switching Frequency Profile vs. Input Voltage
Soft-Start
Current Limiting
Upon being enabled or released from a fault condition, a
soft-start circuit ramps the switching regulator error
amplifier reference voltage to the final value, forcing the
output to follow the same soft-start ramp. During soft-start,
the average switching frequency is lower until the output
voltage approaches regulation.
Due to the ripple on the inductor current, the average
output current of a buck converter is lower than the peak
current set point of the regulator. See “typical curves” for
how the variation of inductor peak current with input voltage
affects the maximum dc current the NCV890430 can deliver
to a load.
Slope Compensation
Short Circuit Protection
A fixed slope compensation signal is generated internally
and added to the sensed current to avoid increased output
voltage ripple due to bifurcation of inductor ripple current
at duty cycles above 50%. The fixed amplitude of the slope
compensation signal requires the inductor to be greater than
a minimum value, depending on output voltage, in order to
avoid sub-harmonic oscillations. The recommended
inductor value is between 1.8 and 3.3 mH, although other
values are possible.
During severe output overloads or short circuits, the
NCV890430 automatically reduces its switching frequency.
This creates duty cycles small enough to limit the peak
current in the power components, while maintaining the
ability to automatically reestablish the output voltage if the
overload is removed.
In more severe short-circuit conditions where the inductor
current reaches the peak current limit during the minimum
on time, the regulator enters a hiccup mode that further
reduces the power dissipation and protects the system.
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7
NCV890430
RESET Function
The RSTB pin is pulled low when the output voltage falls
below 8% of the nominal regulation level, and floats when
the output is properly regulated. A pull-up resistor tied to the
output is needed to generate a logic high signal on this
open-drain pin. The pin can be left unconnected when not
used.
Using I
= 1 mA removes the delay and allows the
RSTB
reset to act as a “power good” pin.
VOUT
R
RSTB
When the output voltage drops out of regulation, the pin
goes low after a short noise-filtering delay (K ). It
RES_FILT
stays low for a delay time (adjustable) after the output goes
back to regulation, simplifying the connection to
a micro-controller.
RSTB
RST
The RSTB signal can either be used as a reset with delay
or a power good (no delay). The delay is determined by the
current into the RSTB pin, set by a resistor, as shown in
Figure 7.
Use the following equation to determine the ideal reset
delay time using currents less than 500 mA:
Figure 7. Reset with Adjustable Delay
on a Single Pin
2500
tdelay
+
(eq. 1)
IRSTB
The RSTB resistor is commonly tied to VOUT.
Depending on the output voltage option, typical delay times
can be achieved with the following resistor values:
where: tdelay is the ideal reset delay time [ms]
is the current into the RSTB pin [mA]
I
RSTB
Table 4. TYPICAL DELAY TIMES
R
(kW)
t
(ms) − 5 V
t
(ms) − 3.3 V
t (ms) − 2.5 V
delay
RSTB
delay
delay
5
−
−
7.6
15
23
−
5
10
20
−
10
20
30
50
5
10
15
25
−
Enable
Thermal Shutdown
The NCV890430 is designed to accept either a logic-level
signal or battery voltage as an Enable signal. However, if
voltages above 40 V are expected, EN should be tied to VIN
through a 10 kW resistor in order to limit the current flowing
into the overvoltage protection of the pin.
A low signal on Enable induces a shutdown mode which
shuts off the regulator and minimizes its supply current to
less than 5 mA by disabling all functions.
A thermal shutdown circuit inhibits switching and resets
the soft-start circuit if internal temperature exceeds a safe
level. Switching is automatically restored when temperature
returns to a safe level.
Exposed Pad
The exposed pad (EPAD) on the back of the package must
be electrically connected to both the analog and the power
electrical ground GND and PGND pins for proper,
noise-free operation. It is recommended to connect these 2
pins directly to the EPAD with a PCB trace.
Once the switching regulator output is enabled, a soft-start
is always initiated.
DEVICE ORDERING INFORMATION
†
Device
Output
5.0 V
Marking
TBD
Package
Shipping
NCV890430MW50TXG
NCV890430MW33TXG
NCV890430MW25TXG
DFN8
(Pb−Free)
3.3 V
TBD
TBD / Tape & Reel
2.5 V
TBD
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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8
NCV890430
PACKAGE DIMENSIONS
DFN8, 3x3, 0.65P
CASE 506CS
ISSUE O
NOTES:
A
B
D
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
L
L
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30mm FROM THE TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
L1
DETAIL A
ALTERNATE TERMINAL
CONSTRUCTIONS
E
MILLIMETERS
PIN ONE
DIM MIN
0.80
A1 0.00
MAX
1.00
0.05
REFERENCE
A
2X
0.10
C
A3
A3
b
0.20 REF
0.25
EXPOSED Cu
MOLD CMPD
0.35
D
3.00 BSC
2.50
3.00 BSC
1.70
0.65 BSC
2X
0.10
C
C
D2 2.30
E
E2 1.50
e
L
TOP VIEW
A
A1
DETAIL B
(A3)
0.05
0.30
0.40
0.15
DETAIL B
L1 0.00
ALTERNATE
CONSTRUCTIONS
0.05
C
NOTE 4
SEATING
PLANE
A1
C
SIDE VIEW
D2
RECOMMENDED
SOLDERING FOOTPRINT*
DETAIL A
8X
0.60
2.56
1
4
8X
L
E2
3.30
1.76
8
5
8X b
e/2
1
0.10
0.05
C
C
A
B
08.4X0
e
0.65
PITCH
NOTE 3
DIMENSIONS: MILLIMETERS
BOTTOM VIEW
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and the
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed
at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation
or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended,
or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which
the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or
unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable
copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
For additional information, please contact your local
Sales Representative
NCV890430/D
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