NFVA25012NP2T [ONSEMI]
Intelligent Power Module (IPM), AEC-Q & AQG324, Automotive, Inverter 1200V, 50A;
| 型号： | NFVA25012NP2T |
| 厂家： | 
ONSEMI |
| 描述： | Intelligent Power Module (IPM), AEC-Q & AQG324, Automotive, Inverter 1200V, 50A |
| 文件： | 总16页 (文件大小：811K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ASPM34 Series
Automotive 3-Phase 1200 V
50 A IGBT Intelligent Power
Module
NFVA25012NP2T
General Description
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NFVA25012NP2T is an advanced Auto IPM module providing a
fully−featured, high−performance inverter output stage for hybrid and
electric vehicles. These modules integrate optimized gate drive of the
built−in IGBTs to minimize EMI and losses, while also providing
multiple on−module protection features including under−voltage
lockouts, over−current shutdown, thermal monitoring of drive IC, and
fault reporting. The built−in, high−speed HVIC requires only a single
supply voltage and translates the incoming logic−level gate inputs to
the high−voltage, high−current drive signals required to properly drive
the module’s internal IGBTs. Separate negative IGBT terminals are
available for each phase to support the widest variety of control
algorithms.
Features
®
• Automotive SPM in 34 Pin DIP Package
• AEC & AQG324 Qualified and PPAP Capable
• 1200 V − 50 A 3−Phase IGBT Inverter with Integral Gate Drivers
and Protection
3D Package Drawing
(Click to Activate 3D Content)
• Low−Loss, Short−Circuit Rated IGBTs
DIP34 80x33, AUTOMOTIVE MODULE
CASE MODGL
• Very Low Thermal Resistance Using AlN DBC Substrate
• Built−In Bootstrap Diodes and Dedicated Vs Pins Simplify PCB
MARKING DIAGRAM
Layout
• Separate Open−Emitter Pins from Low−Side IGBTs for Three−Phase
Current Sensing
• Single−Grounded Power Supply Supported
• Built−In NTC Thermistor for Temperature Monitoring and
Management
• Adjustable Over−Current Protection via Integrated Sense−IGBTs
• Isolation Rating of 2500 Vrms / 1 min
• This is a Pb−Free Device
XXXXXXXXXXXX = Specific Device Code
Applications
ZZZ
AT
Y
= Lot ID
= Assembly & Test Location
= Year
• Automotive High Voltage Auxiliary Motors
♦ Climate E−Compressors
♦ Oil / Water Pumps
W
NNN
= Work Week
= Serial Number
♦ Super / Turbo Chargers
♦ Variety Fans
ORDERING INFORMATION
See detailed ordering and shipping information on page 14 of
this data sheet.
• Motion Control
♦ Industrial Motor
© Semiconductor Components Industries, LLC, 2019
1
Publication Order Number:
May, 2020 − Rev. 0
NFVA25012NP2T/D
NFVA25012NP2T
Related Resources
Integrated Drive, Protection and System Control
Functions
• For inverter high−side IGBTs: gate drive circuit,
high−voltage isolated high−speed level shifting
control circuit Under−Voltage Lock−Out Protection
(UVLO)
®
• AN−9075 − Users Guide for 1200V SPM 2 Series
®
• AN−9076 − Mounting Guide for New SPM 2 Package
• AN−9079 − Thermal Performance of 1200 V Motion
®
SPM 2 Series by Mounting Torque
• Integrated Power Functions
• For inverter low−side IGBTs: gate drive circuit,
• Integrated Drive, Protection, and System Control
Short−Circuit Protection (SCP)
Functions
control supply circuit Under−Voltage Lock−Out
Protection (UVLO)
Integrated Power Functions
• Fault signaling: corresponding to UVLO (low−side
supply) and SC faults
• 1200 V - 50 A IGBT inverter for three−phase DC / AC
power conversion (Please refer to Figure 1)
• Input interface: active−HIGH interface, works with 3.3 /
5 V logic, Schmitt−trigger input
PIN CONFIGURATION
(34) VS(W)
(33) VB(W)
(32) VBD(W)
(31) VDD(WH)
(30) IN(WH)
(1) P
(29) VS(V)
(28) VB(V)
(2) W
(3) V
(27) VBD(V)
(26) VDD(VH)
(25) IN(VH)
(24) VS(U)
(23) VB(U)
Case Temperature (TC)
Detecting Point
(22) VBD(U)
(21) VDD(UH)
(20) COM(H)
(19) IN(UH)
(4) U
(18) RSC
(17) CSC
(5) N W
(6) N V
(7) N U
(16) CFOD
(15) VFO
(14) IN (WL)
(13) IN (VL)
(12) IN (UL)
(11) COM (L)
(10) VDD(L)
(8) RTH
(9) VTH
Figure 1. Pin Configuration − Top View
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NFVA25012NP2T
PIN DESCRIPTION
Pin Number
Pin Name
Pin Description
1
2
P
W
V
Positive DC−Link Input
Output for W Phase
3
Output for V Phase
4
U
Output for U Phase
5
N
Negative DC−Link Input for W Phase
Negative DC−Link Input for V Phase
Negative DC−Link Input for U Phase
W
6
N
N
V
U
7
8
R
TH
V
TH
Series Resistor for Thermistor (Temperature Detection)
Thermistor Bias Voltage
9
10
11
12
13
V
Low−Side Bias Voltage for IC and IGBTs Driving
Low−Side Common Supply Ground
Signal Input for Low−Side U Phase
DD(L)
COM
(L)
(UL)
IN
IN
Signal Input for Low−Side V Phase
(VL)
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
IN
Signal Input for Low−Side W Phase
(WL)
V
Fault Output
FO
C
Capacitor for Fault Output Duration Selection
Shut Down Input for Short−Circuit Current Detection Input
Resistor for Short−Circuit Current Detection
Signal Input for High−Side U Phase
FOD
C
SC
SC
R
IN
(UH)
COM
High−Side Common Supply Ground
(H)
V
High−Side Bias Voltage for U Phase IC
DD(UH)
V
BD(U)
Anode of Bootstrap Diode for U Phase High−Side Bootstrap Circuit
High−Side Bias Voltage for U Phase IGBT Driving
High−Side Bias Voltage Ground for U Phase IGBT Driving
Signal Input for High−Side V Phase
V
B(U)
V
S(U)
IN
(VH)
V
High−Side Bias Voltage for V Phase IC
DD(VH)
V
BD(V)
Anode of Bootstrap Diode for V Phase High−Side Bootstrap Circuit
High−Side Bias Voltage for V Phase IGBT Driving
High−Side Bias Voltage Ground for V Phase IGBT Driving
Signal Input for High−Side W Phase
V
B(V)
S(V)
(WH)
V
IN
V
High−Side Bias Voltage for W Phase IC
DD(WH)
V
BD(W)
Anode of Bootstrap Diode for W Phase High−Side Bootstrap Circuit
High−Side Bias Voltage for W Phase IGBT Driving
High−Side Bias Voltage Ground for W Phase IGBT Driving
V
B(W)
V
S(W)
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NFVA25012NP2T
INTERNAL EQUIVALENT CIRCUIT AND INPUT/OUTPUT PINS
P (1)
(33) VB(W)
VB
(32) VBD(W)
(31) VDD(WH)
OUT
VS
VDD
COM
IN
HVIC
HVIC
HVIC
(30) IN(WH)
(34) VS(W)
W (2)
(28) VB(V)
(27) VBD(V)
(26) VDD(VH)
VB
VDD
COM
IN
OUT
VS
(25) IN(VH)
(29) VS(V)
V (3)
(23) VB(U)
(22) VBD(U)
(21) VDD(UH)
(20) COM (H)
(19) IN(UH)
(24) VS(U)
VB
VDD
COM
IN
OUT
VS
U (4)
CSC
CFOD
VFO
IN
OUT
OUT
OUT
(17) CSC
(16) CFOD
(15) VFO
NW (5)
NV (6)
(14) IN(WL)
(13) IN(VL)
(12) IN(UL)
(11) COM (L)
(10) VDD(L)
LVIC
IN
IN
COM
VDD
NU (7)
RTH (8)
VTH (9)
Thermistor
(18) R
SC
NOTES:
1. nverter low−side is composed of three IGBTs, freewheeling diodes for each IGBT, and one control IC. It has gate drive and protection
functions.
2. nverter power side is composed of four inverter DC−link input terminals and three inverter output terminals.
3. Inverter high−side is composed of three IGBTs, freewheeling diodes, and three drive ICs for each IGBT.
Figure 2. Internal Block Diagram
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NFVA25012NP2T
ABSOLUTE MAXIMUM RATINGS (Tj = 25°C unless otherwise noted)
Symbol
Rating
Conditions
Rating
Unit
INVERTER PART
V
Supply Voltage
Applied between P − N , N , N
900
1000
1200
50
V
V
V
A
A
PN
PN(Surge)
U
V
W
V
Supply Voltage (Surge)
Applied between P − N , N , N
U V
W
V
CES
Collector − Emitter Voltage
Each IGBT Collector Current
Each IGBT Collector Current (Peak)
I
C
T
T
= 100°C, T ≤ 150°C, V ≥ 15 V (Note 4)
J DD
C
I
= 25°C, T ≤ 150°C, Under 1 ms Pulse Width
75
CP
C
J
(Note 4)
P
Collector Dissipation
T
= 25°C per One Chip (Note 4)
347
W
°C
°C
C
C
T
Operating Junction Temperature
V
= 960 V
−40~150
−40~125
J
CES
CES
V
= 1200 V
CONTROL PART
V
Control Supply Voltage
Applied between V
, V − COM
DD(H) DD(L)
20
20
V
V
DD
V
High−Side Control Bias Voltage
Applied between V
− V , V
S(U) B(V)
− V
,
BS
B(U)
S(V)
V
− V
S(W)
B(W)
V
IN
Input Signal Voltage
Applied between IN
, IN
, IN
, IN
,
−0.3~V + 0.3
V
(UH)
(VH)
(WH)
(UL)
DD
IN
, IN
− COM
(VL)
(WL)
V
Fault Output Supply Voltage
Fault Output Current
Applied between V − COM
−0.3~V + 0.3
V
mA
V
FO
FO
DD
I
Sink Current at V pin
2
FO
FO
V
SC
Current Sensing Input Voltage
Applied between C − COM
−0.3~V + 0.3
SC
DD
BOOSTSTRAP DIODE PART
V
Maximum Repetitive Reverse Voltage
Forward Current
1200
1.0
V
A
A
RRM
I
F
T
T
= 25°C, T ≤ 150°C (Note 4)
J
C
I
Forward Current (Peak)
= 25°C, T ≤ 150°C, Under 1 ms Pulse Width
2.0
FP
C
J
(Note 4)
T
Operating Junction Temperature (Note 6)
−40~150
°C
ms
J
TOTAL SYSTEM
t
Short Circuit Withstand Time
V
J
= V ≤ 16.5 V, V ≤ 800 V,
3
SC
DD
BS
PN
T = 150°C
Non−repetitive
T
Storage Temperature
Isolation Voltage
−40~150
°C
STG
V
60 Hz, Sinusoidal, AC 1 minute, Connection Pins
to Heat Sink Plate
2500
V
rms
ISO
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
4. These values had been made an acquisition by the calculation considered to design factor.
THERMAL RESISTANCE
Symbol
Parameter
Conditions
Min
−
Typ
−
Max
0.36
0.66
−
Unit
°C/W
°C/W
nH
R
Junction to Case Thermal
Resistance (Note 5)
Inverter IGBT part (per 1 / 6 module)
Inverter FWD part (per 1 / 6 module)
th(j−c)Q
R
−
−
th(j−c)F
L
s
Package Stray Inductance
P to N , N , N (Note 6)
−
32
U
V
W
5. For the measurement point of case temperature (T ), please refer to Figure 1. DBC discoloration and Picker Circle Printing allowed, please
C
ꢀ
refer to application note AN−9190 (Impact of DBC Oxidation on SPM Module Performance).
6. Stray inductance per phase measured per IEC 60747−15.
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NFVA25012NP2T
ELECTRICAL CHARACTERISTICS
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
INVERTER PART (Tj as specified)
V
Collector −Emitter Saturation V = V = 15 V, V = 5 V, I = 50 A, T = 25°C
−
−
2.20
2.75
2.40
2.25
1.40
0.50
1.10
0.15
0.20
1.00
0.50
1.10
0.15
0.25
−
2.80
3.25
3.00
2.85
2.00
0.95
1.70
0.55
−
V
V
CE(SAT)
DD
BS
IN
C
J
Voltage
V
V
V
= V = 15 V, V = 5 V, I = 50 A, T = 150°C
BS IN C J
DD
V
F
FWDi Forward Voltage
= 0 V, I = 50 A, T = 25°C
−
V
IN
F
J
= 0 V, I = 50 A, T = 150°C
−
V
IN
F
J
HS
t
High Side Switching Times
Low Side Switching Times
V
V
= 600 V, V = 15 V, I = 50 A, T = 25°C
0.90
−
ms
ms
ms
ms
ms
ms
ms
ms
ms
ms
mA
ON
PN
IN
DD
C
J
= 0 V ↔ 5 V, Inductive Load
t
C(ON)
See Figure 4
(Note 7)
t
−
OFF
t
−
C(OFF)
t
rr
−
LS
t
V
V
= 600 V, V = 15 V, I = 50 A, T = 25°C
0.50
−
1.60
0.95
1.70
0.55
−
ON
PN
IN
DD
C
J
= 0 V ↔ 5 V, Inductive Load
t
C(ON)
See Figure 4
(Note 7)
t
−
OFF
t
−
C(OFF)
t
rr
−
I
Collector − Emitter Leakage Tj = 25°C, V = V
CES
−
3
CES
CE
Current
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
7. t and t
include the propagation delay time of the internal drive IC. t
and t
are the switching time of IGBT itself under the given
ON
OFF
C(ON)
C(OFF)
gate driving condition internally. For the detailed information, please see Figure 3.
100% IC 100% IC
trr
VCE
IC
IC
VCE
VIN
VIN
tON
tOFF
tC(ON)
tC(OFF)
10% IC
VIN(ON)
VIN(OFF)
10% V
10% IC
CE
90% IC 10% V
CE
(a) turn-on
(b) turn-off
Figure 3. Switching Time Definition
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NFVA25012NP2T
One−Leg Diagram of ASPM34
IC
RBS
P
CBS
VDD
VB
OUT
VS
COM
LS Switching
IN
VPN
HS Switching
U,V,W
V
Inductor
600 V
IN
LS Switching
VDD
VDD
VFO
CFOD
V
IN
HS Switching
OUT
5 V
0 V
4.7 kΩ
CSC
V
COM
NU,V,W
15 V
V
RSC
5 V
Figure 4. Example Circuit of Switching Test
Inductive Load, V = 600 V, V = 15 V, T = 1505C
Inductive Load, V = 600 V, V = 15 V, T = 255C
PN
CC
j
PN
CC
j
Collector Current, I [A]
Collector Current, I [A]
C
C
Figure 5. Switching Loss Characteristics
R−T Curve
600
550
500
450
400
350
300
250
200
150
100
50
R−T Curve in 505C ~ 1255C
20
16
12
8
4
0
50
60
70
80
90 100 110 120
Temperature [°C]
0
−20 −10
0
10 20 30 40 50 60 70 80 90 100 110 120
Temperature [°C]
Figure 6. R−T Curve of Built−in Thermistor
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NFVA25012NP2T
ELECTRICAL CHARACTERISTICS
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
BOOTSTRAP DIODE PART (Tj as specified)
V
Forward Voltage
I = 1.0 A, T = 25°C
−
−
2.2
80
−
−
V
F
F
J
t
rr
Reverse−Recovery Time
I = 1.0 A, dI / dt = 50 A/ms, T = 25°C
ns
F
F
J
CONTROL PART (Tj = 25°C unless otherwise noted)
I
Quiescent V Supply
V
= 15 V,
V
V
V
− COM
− COM
,
−
−
0.15
mA
QDDH
DD
DD(UH,VH,WH)
(UH,VH,WH)
DD(UH)
DD(VH)
DD(WH)
(H)
(H)
− COM
Current
IN
= 0 V
,
(H)
I
V
V
= 15 V, IN
= 0 V
V
− COM
(L)
−
−
−
−
4.80
0.30
mA
mA
QDDL
DD(L)
(UL,VL, WL)
DD(L)
I
Operating V Supply
= 15 V,
V
V
V
− COM
(H)
− COM
,
,
PDDH
DD
DD(UH,VH,WH)
DD(UH)
DD(VH)
DD(WH)
(H)
Current
f
= 20 kHz, Duty = 50%,
− COM
PWM
Applied to one PWM Signal Input
(H)
for High−Side
I
V
= 15V, f
= 20 kHz,
V
− COM
(L)
−
−
−
−
−
−
15.5
0.30
12.0
mA
mA
mA
PDDL
DD(L)
PWM
DD(L)
Duty = 50%, Applied to one PWM
Signal Input for Low−Side
I
Quiescent V Supply
V
BS
= 15 V, IN
= 0 V
V
B(U)
V
B(V)
V
B(W)
− V
S(V)
− V
,
QBS
BS
(UH,VH,WH)
S(U)
Current
− V
,
S(W)
I
Operating V Supply
V
DD
= V = 15 V, f
= 20 kHz,
V
B(U)
V
B(V)
V
B(W)
− V
− V
,
PBS
BS
BS
PWM
S(U)
S(V)
− V
Current
Duty = 50%, Applied to one PWM
,
Signal Input for High−Side
S(W)
V
Fault Output Voltage
V
V
V
= 15 V, V = 0 V, V Circuit: 4.7 kW to 5 V Pull−up
4.5
−
−
−
−
0.5
−
V
V
FOH
DD
DD
DD
SC
FO
V
= 15 V, V = 1 V, V Circuit: 4.7 kW to 5 V Pull−up
SC FO
FOL
SEN
I
Sensing Current of Each
Sense IGBT
= 15 V, V = 5 V, R = 0 W,
I = 50 A
C
−
43
mA
IN
SC
No Connection of Shunt Resistor
at N Terminal
U,V,W
V
Short Circuit Trip Level
V
= 15 V (Note 8)
C
− COM
(L)
0.43
0.50
75
0.57
V
A
SC(ref)
DD
SC
I
Short Circuit Current Level
for Trip
R
at N
= 13 W ( 1%), No Connection of Shunt Resistor
−
−
SC
SC
Terminal (Note 8)
U,V,W
UV
UV
UV
UV
t
Supply Circuit
Detection Level
Reset Level
10.3
10.8
9.5
10.0
50
−
−
12.8
13.3
12.0
12.5
−
V
V
DDD
DDR
BSD
BSR
Under−Voltage Protection
Detection Level
Reset Level
−
V
−
V
Fault−Out Pulse Width
C
FOD
C
FOD
= Open
(Note 9)
−
ms
ms
V
FOD
= 2.2 nF
1.7
−
−
−
V
IN(ON)
ON Threshold Voltage
OFF Threshold Voltage
Resistance of Thermistor
Applied between IN
− COM ,
(H)
−
2.6
−
(UH,VH,WH)
− COM
(L)
IN
(UL,VL,WL)
V
0.8
−
−
V
IN(OFF)
R
TH
at T = 25°C
See Figure 6
(Note 10)
47
2.9
−
kW
kW
TH
at T = 100°C
−
−
TH
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
8. Short−circuit current protection functions only at the low−sides because the sense current is divided from main current at low−side IGBTs.
Inserting the shunt resistor for monitoring the phase current at N , N , N terminal, the trip level of the short−circuit current is changed.
U
V
W
FOD
9. The fault−out pulse width t
depends on the capacitance value of C
according to the following approximate equation:
FOD
[s].
6
t
= 0.8 x 10 x C
FOD
FOD
10.T is the temperature of thermistor itself. To know case temperature (T ), conduct experiments considering the application.
TH
C
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NFVA25012NP2T
RECOMMENDED OPERATING RANGES
Symbol
Parameter
Conditions
Min
300
14.0
Typ
600
15.0
Max
800
Unit
V
V
PN
DD
Supply Voltage
Applied between P − N , N , N
U V W
V
Control Supply Voltage
Applied between V
−
16.5
V
DD(UH,VH,WH)
COM , V
− COM
(H) DD(L)
(L)
V
High−Side Bias Voltage
Applied between V
− V , V −
S(U) B(V)
13.0
15.0
18.5
1
V
BS
B(U)
−
S(V) B(W) S(W)
V
V
, V
dV / dt, Control Supply Variation
−1
−
V/ms
DD
dV / dt
BS
t
Blanking Time for Preventing Arm − Short For Each Input Signal
2.0
−
−
−
−
−
20
5
ms
kHz
V
dead
f
PWM Input Signal
−40°C ≤ T ≤ 125°C, −40°C ≤ T ≤ 150°C
C J
PWM
V
Voltage for Current Sensing
Applied between N , N , N − COM
−5
SEN
U
V
W
(H, L)
(Including Surge Voltage)
PW
PW
Minimum Input Pulse Width
Junction Temperature
V
= V = 15 V, I ≤ 75 A, Wiring
2.5
2.5
−40
−
−
−
−
−
ms
IN(ON)
DD
BS
C
Inductance between N
N < 10 nH (Note 11)
and DC Link
U,V,W
IN(OFF)
T
150
°C
J
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
11. This product might not make output response if input pulse width is less than the recommended value.
MECHANICAL CHARACTERISTICS AND RATINGS
Parameter
Device Flatness
Conditions
Min
0
Typ
−
Max
+200
1.5
15.1
−
Unit
mm
See Figure 7
Mounting Torque
Mounting Screw: M4
See Figure 8
Recommended 1.0 N ⋅ m
Recommended 10.1 kg ⋅ cm
0.9
9.1
10
2
1.0
10.1
−
N ⋅ m
kg ⋅ cm
s
Terminal Pulling Strength
Terminal Bending Strength
Weight
Load 19.6 N
Load 9.8 N, 90 degrees Bend
−
−
times
g
−
50
−
(+)
(+)
Figure 7. Flatness Measurement Position
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9
NFVA25012NP2T
2
Pre − Screwing: 1 → 2
Final Screwing: 2 → 1
1
NOTES:
12.Do not over torque when mounting screws. Too much mounting torque may cause DBC cracks, as well as bolts and Al heat−sink
destruction.
13.Avoid one−sided tightening stress. Figure 8 shows the recommended torque order for the mounting screws. Uneven mounting can cause
the DBC substrate of package to be damaged. The pre−screwing torque is set to 20~30% of maximum torque rating.
Figure 8. Mounting Screws Torque Order
TIME CHARTS OF SPMs PROTECTIVE FUNCTION
Input Signal
Protection
RESET
a1
SET
RESET
Circuit State
UVDDR
a6
UV
Control
Supply Voltage
DDD
a3
a4
a2
a7
Output Current
a5
Fault Output Signal
a1: Control supply voltage rises: after the voltage rises UV
a2: Normal operation: IGBT ON and carrying current.
, the circuits start to operate when the next input is applied.
DDR
a3: Under-voltage detection (UV
).
DDD
a4: IGBT OFF in spite of control input condition.
a5: Fault output operation starts with a fixed pulse width according to the condition of the external capacitor C
.
FOD
a6: Under-voltage reset (UVDDR).
a7: Normal operation: IGBT ON and carrying current by triggering next signal from LOW to HIGH.
Figure 9. Under-Voltage Protection (Low-Side)
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10
NFVA25012NP2T
Input Signal
Protection
RESET
SET
RESET
Circuit State
UVBSR
b5
b1
UVBSD
b2
Control
b3
b4
Supply Voltage
b6
Output Current
High−level (no fault output)
Fault Output Signal
b1: Control supply voltage rises: after the voltage reaches UV
b2: Normal operation: IGBT ON and carrying current.
, the circuits start to operate when the next input is applied.
BSR
b3: Under-voltage detection (UV
).
BSD
b4: IGBT OFF in spite of control input condition, but there is no fault output signal.
b5: Under-voltage reset (UV ).
BSR
b6: Normal operation: IGBT ON and carrying current by triggering next signal from LOW to HIGH.
Figure 10. Under-Voltage Protection (High-Side)
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11
NFVA25012NP2T
Lower Arms
Control Input
c6
c7
Protection
SET
c2
Circuit state
RESET
c4
Internal IGBT
Gate−Emitter
Input Voltage
c3
Internal delay
at protection circuit
SC current trip level
c1
c8
Output Current
SC reference voltage
Sensing Voltage
of Sense Resistor
RC filter circuit
time constant
delay
c5
Fault Output Signal
(With the external sense resistance and RC filter connection)
c1: Normal operation: IGBT ON and carrying current.
c2: Short-circuit current detection (SC trigger).
c3: All low-side IGBTs gate are hard interrupted.
c4: All low-side IGBTs turn OFF.
c5: Fault output operation starts with a fixed pulse width according to the condition of the external capacitor C
c6: Input HIGH: IGBT ON state, but during the active period of fault output, the IGBT doesn’t turn ON.
.
FOD
c7: Fault output operation finishes, but IGBT doesn’t turn on until triggering the next signal from LOW to HIGH.
c8: Normal operation: IGBT ON and carrying current.
Figure 11. Short-Circuit Current Protection (Low-Side Operation Only)
INPUT/OUTPUT INTERFACE CIRCUIT
+5 V (MCU or control power)
ASPM
4.7 kW
IN
IN
, IN
, IN
(UH)
(VH)
(WH)
(WL)
, IN
, IN
(UL)
(VL)
MCU
VFO
COM
NOTE:
14.RC coupling at each input might change depending on the PWM control scheme used in the application and the wiring impedance of the
application’s printed circuit board. The input signal section of the Motion SPM 2 product integrates 5 kW (typ.) pull−down resistor. Therefore,
when using an external filtering resistor, please pay attention to the signal voltage drop at input terminal.
Figure 12. Recommended MCU I/O Interface Circuit
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12
NFVA25012NP2T
P (1)
R1
R1
R1
(30) IN
(WH)
IN
Gating WH
Gating VH
Gating UH
(31) V DD(WH)
VDD
COM
C4
C4
OUT
VS
R2
(32) V
HVIC
HVIC
BD(W)
(33) V
B(W)
VB
W (2)
(34) V
S(W)
C3
(25) IN
(VH)
IN
(26) V
DD(VH)
VDD
COM
C4
C4
R2
OUT
VS
(27) V
BD(V)
(28) V
B(V)
VB
V (3)
(29) V
S(V)
C3
M
(19) IN
(UH)
VDC
IN
VDD
C7
(21) V
DD(UH)
(20) COM
C4
(H)
COM
OUT
VS
R2
HVIC
(22) V
BD(U)
C1 C1 C1
M
C
U
(23) V B(U)
VB
U (4)
(24) V
S(U)
C3
C4
5V line
R3
C5
R1
(16) C
FOD
FO
OUT
CFOD
VFO
IN
Fault
A
R4
(15) V
NW (5)
NV (6)
NU (7)
C1
C1
(14) IN
(WL)
R1
R1
Gating WL
Gating VL
Gating UL
(13) IN
(12) IN
(10) V
(VL)
(UL)
IN
OUT
OUT
LVIC
R1
R4
IN
E
15V line
DD(L)
VDD
Shunt
Resistor
C1 C1
5V line
C1
Power
GND Line
(11) COM
C2
C4
(L)
COM
(9) V TH
(8) R TH
R4
CSC
Temp.
Monitoring
RSC (18)
Thermistor
R5
R7
(17) C
Sense
SC
Resistor
D
B
C
R6
Control
GND Line
C6
W−Phase Current
V−Phase Current
U−Phase Current
NOTES:
15.To avoid malfunction, the wiring of each input should be as short as possible (less than 2 − 3 cm).
16.V output is an open−drain type. This signal line should be pulled up to the positive side of the MCU or control power supply with a resistor
FO
that makes I up to 2 mA. Please refer to Figure 13.
FO
17.Fault out pulse width can be adjust by capacitor C connected to the C
terminal.
FOD
5
18.Input signal is active−HIGH type. There is a 5 kW resistor inside the IC to pull−down each input signal line to GND. RC coupling circuits
should be adopted for the prevention of input signal oscillation. R C time constant should be selected in the range 50~ 50 ns
1
1
(recommended R = 100 W, C = 1 nF).
1
1
19.Each wiring pattern inductance of point A should be minimized (recommend less than 10 nH). Use the shunt resistor R of surface mounted
4
(SMD) type to reduce wiring inductance. To prevent malfunction, wiring of point E should be connected to the terminal of the shunt resistor
R as close as possible.
4
20.To insert the shunt resistor to measure each phase current at N , N , N terminal, it makes to change the trip level I about the
U
V
W
SC
short−circuit current.
21.To prevent errors of the protection function, the wiring of points B, C, and D should be as short as possible. The wiring of B between C
SC
filter and R terminal should be divided at the point that is close to the terminal of sense resistor R .
SC
5
22.For stable protection function, use the sense resistor R with resistance variation within 1% and low inductance value.
5
23.In the short−circuit protection circuit, select the R C time constant in the range 1.0~1.5 ms. R should be selected with a minimum of
6
6
6
10 times larger resistance than sense resistor R . Do enough evaluaiton on the real system because short−circuit protection time may
5
vary wiring pattern layout and value of the R C time constant.
6
6
24.Each capacitor should be mounted as close to the pins of the ASPM34 product as possible.
25.To prevent surge destruction, the wiring between the smoothing capacitor C and the P & GND pins should be as short as possible. The
7
use of a high−frequency non−inductive capacitor of around 0.1~0.22 mF between the P & GND pins is recommended.
26.Relays are used in most systems of electrical equipments in industrial application. In these cases, there should be sufficient distance
between the MCU and the relays.
27.The Zener diode or transient voltage suppressor should be adapted for the protection of ICs from the surge destruction between each pair
of control supply terminals (recommended Zener diode is 22 V / 1 W, which has the lower Zener impedance characteristic than about 15 W).
28.C of around seven times larger than bootstrap capacitor C is recommended.
2
3
29.Please choose the electrolytic capacitor with good temperature characteristic in C . Choose 0.1~0.2 mF R−category ceramic capacitors
3
with good temperature and frequency characteristics in C .
4
Figure 13. Typical Application Circuit
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13
NFVA25012NP2T
PACKAGE MARKING AND ORDERING INFORMATION
Device
Device Marking
NFVA25012NP2T
Package
Shipping
NFVA25012NP2T
ASPM34−CAA
(Pb−Free)
6 Units/Tube
SPM is registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
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14
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DIP34 80x33, AUTOMOTIVE MODULE
CASE MODGL
ISSUE O
DATE 19 OCT 2018
GENERIC
MARKING DIAGRAM*
XXXX = Specific Device Code
ZZZ = Lot ID
*This information is generic. Please refer to
AT
Y
W
= Assembly & Test Location
= Year
= Work Week
XXXXXXXXXXX
ZZZ ATYWW
NNNNNNN
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
NNN = Serial Number
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON97156G
DIP34 80x33, AUTOMOTIVE MODULE
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
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