NJVMJD44E3T4G [ONSEMI]
10 A,80 V,NPN 达林顿双极功率晶体管;型号: | NJVMJD44E3T4G |
厂家: | ONSEMI |
描述: | 10 A,80 V,NPN 达林顿双极功率晶体管 晶体管 功率双极晶体管 |
文件: | 总3页 (文件大小:51K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
MJD44E3
Preferred Device
Darlington Power Transistor
DPAK For Surface Mount Applications
Designed for general purpose power and switching output or driver
stages in applications such as switching regulators, converters, and
power amplifiers.
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Features
NPN DARLINGTON SILICON
POWER TRANSISTORS
10 AMPERES
• Electrically Similar to Popular D44E3 Device
• High DC Gain − 1000 Min @ 5.0 Adc
• Low Sat. Voltage − 1.5 V @ 5.0 Adc
80 VOLTS, 20 WATTS
• Compatible With Existing Automatic Pick and Place Equipment
• Epoxy Meets UL 94 V−0 @ 0.125 in
• ESD Ratings: Human Body Model, 3B u 8000 V
4
Machine Model, C u 400 V
• Pb−Free Package is Available
1 2
3
MAXIMUM RATINGS
DPAK
CASE 369C
STYLE 1
Rating
Collector−Emitter Voltage
Emitter−Base Voltage
Symbol
Max
80
7
Unit
Vdc
Vdc
Adc
W
V
CEO
V
EB
Collector Current − Continuous
I
10
C
MARKING DIAGRAM
Total Power Dissipation
P
D
D
20
0.16
@ T = 25°C
C
W/°C
W
Derate above 25°C
Total Power Dissipation (Note 1)
P
1.75
0.014
YWW
J
44E3G
@ T = 25°C
A
W/°C
°C
Derate above 25°C
Operating and Storage Junction
Temperature Range
T , T
−55 to +150
J
stg
THERMAL CHARACTERISTICS
Characteristic
Y
WW
= Year
= Work Week
Symbol
Max
Unit
J44E3 = Device Code
G
Thermal Resistance,
Junction−to−Case
R
q
JC
6.25
°C/W
= Pb−Free Package
Thermal Resistance,
R
q
JA
71.4
°C/W
Junction−to−Ambient (Note 1)
ORDERING INFORMATION
Lead Temperature for Soldering
T
260
°C
L
†
Device
Package
Shipping
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
MJD44E3T4
DPAK
2500/Tape & Reel
2500/Tape & Reel
MJD44E3T4G
DPAK
(Pb−Free)
1. These ratings are applicable when surface mounted on the minimum pad
sizes recommended.
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Preferred devices are recommended choices for future use
and best overall value.
©
Semiconductor Components Industries, LLC, 2005
1
Publication Order Number:
December, 2005 − Rev. 4
MJD44E3/D
MJD44E3
ELECTRICAL CHARACTERISTICS (T = 25_C unless otherwise noted)
C
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
I
−
−
−
−
10
1
mA
mA
Collector Cutoff Current
CES
(V = Rated V
, V = 0)
CEO BE
CE
I
Emitter Cutoff Current
(V = 7 Vdc)
EBO
EB
ON CHARACTERISTICS
V
Vdc
Collector−Emitter Saturation Voltage
CE(sat)
(I = 5 Adc, I = 10 mAdc)
−
−
−
−
1.5
2
C
B
(I = 10 Adc, I = 20 mAdc)
C
B
V
−
−
2.5
Vdc
−
Base−Emitter Saturation Voltage
(I = 5 Adc, I = 10 mAdc)
BE(sat)
C
B
h
FE
1000
−
−
DC Current Gain
(V = 5 Vdc, I = 5 Adc)
CE
C
DYNAMIC CHARACTERISTICS
C
cb
−
−
130
pF
Collector Capacitance
(V = 10 Vdc, f
CB
= 1 MHz)
test
SWITCHING TIMES
t
+ t
−
−
−
0.6
2
−
−
−
ms
ms
ms
Delay and Rise Times
d
r
(I = 10 Adc, I = 20 mAdc)
C
B1
t
Storage Time
s
(I = 10 Adc, I = I = 20 mAdc)
C
B1
B2
t
0.5
Fall Time
f
(I = 10 Adc, I = I = 20 mAdc)
C
B1
B2
T
A
T
C
2.5 25
10
5
100 ms
2
20
1 ms
3
2
T
C
1.5 15
5 ms
1
T
A
1
0.5
0
10
5
BONDING WIRE LIMIT
THERMAL LIMIT
SECOND BREAKDOWN LIMIT
0.5
0.3
0.2
T = 25°C SINGLE PULSE
C
0.1
0
25
50
75
100
125
150
1
2
3
5
10
20 30
50
100
V
, COLLECTOR−EMITTER VOLTAGE (VOLTS)
T, TEMPERATURE (°C)
CE
Figure 1. Maximum Forward Bias
Safe Operating Area
Figure 2. Power Derating
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2
MJD44E3
PACKAGE DIMENSIONS
DPAK
CASE 369C−01
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
SEATING
PLANE
−T−
2. CONTROLLING DIMENSION: INCH.
C
B
R
INCHES
DIM MIN MAX
MILLIMETERS
E
V
MIN
5.97
6.35
2.19
0.69
0.46
0.94
MAX
6.22
6.73
2.38
0.88
0.58
1.14
A
B
C
D
E
F
G
H
J
0.235 0.245
0.250 0.265
0.086 0.094
0.027 0.035
0.018 0.023
0.037 0.045
0.180 BSC
4
2
Z
A
K
S
1
3
4.58 BSC
U
0.034 0.040
0.018 0.023
0.102 0.114
0.090 BSC
0.87
0.46
2.60
1.01
0.58
2.89
K
L
2.29 BSC
F
J
R
S
U
V
Z
0.180 0.215
0.025 0.040
4.57
0.63
0.51
0.89
3.93
5.45
1.01
−−−
1.27
−−−
L
H
0.020
0.035 0.050
0.155 −−−
−−−
D 2 PL
M
G
0.13 (0.005)
T
STYLE 1:
PIN 1. BASE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
SOLDERING FOOTPRINT*
6.20
3.0
0.244
0.118
2.58
0.101
5.80
0.228
1.6
0.063
6.172
0.243
mm
inches
ǒ
Ǔ
SCALE 3:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
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MJD44E3/D
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