NJVMJD44H11T4G [ONSEMI]
Complementary Power Transistors; 互补功率晶体管
| 型号： | NJVMJD44H11T4G |
| 厂家： | 
ONSEMI |
| 描述： | Complementary Power Transistors |
| 文件： | 总9页 (文件大小：132K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MJD44H11,
NJVMJD44H11 (NPN),
MJD45H11,
NJVMJD45H11 (PNP)
Complementary Power
Transistors
http://onsemi.com
DPAK For Surface Mount Applications
SILICON
POWER TRANSISTORS
8 AMPERES
Designed for general purpose power and switching such as output or
driver stages in applications such as switching regulators, converters,
and power amplifiers.
80 VOLTS, 20 WATTS
Features
MARKING
DIAGRAMS
• Lead Formed for Surface Mount Application in Plastic Sleeves
(No Suffix)
4
• Straight Lead Version in Plastic Sleeves (“−1” Suffix)
• Electrically Similar to Popular D44H/D45H Series
• Low Collector Emitter Saturation Voltage −
AYWW
J4
xH11G
2
1
3
DPAK
CASE 369C
STYLE 1
V
CE(sat)
= 1.0 Volt Max @ 8.0 A
• Fast Switching Speeds
• Complementary Pairs Simplifies Designs
• Epoxy Meets UL 94 V−0 @ 0.125 in
4
• ESD Ratings: Human Body Model, 3B u 8000 V
AYWW
J4
xH11G
Machine Model, C u 400 V
• NJV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
• These are Pb−Free Packages*
1
2
3
IPAK
CASE 369D
STYLE 1
A
Y
WW
J4xH11
G
=
=
=
=
Assembly Location
Year
Work Week
Device Code
x = 4 or 5
=
Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2012
1
Publication Order Number:
August, 2012 − Rev. 14
MJD44H11/D
MJD44H11, NJVMJD44H11 (NPN), MJD45H11, NJVMJD45H11 (PNP)
MAXIMUM RATINGS (T = 25_C, common for NPN and PNP, minus sign, “−”, for PNP omitted, unless otherwise noted)
A
Rating
Symbol
Max
80
5
Unit
Vdc
Vdc
Adc
Collector−Emitter Voltage
Emitter−Base Voltage
V
CEO
V
EB
Collector Current − Continuous
− Peak
I
C
8
16
Total Power Dissipation
P
D
W
@ T = 25°C
20
0.16
C
Derate above 25°C
W/°C
Total Power Dissipation (Note 1)
P
W
D
1.75
@ T = 25°C
A
0.014
W/°C
°C
Derate above 25°C
Operating and Storage Junction
Temperature Range
T , T
J
−55 to +150
stg
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
THERMAL CHARACTERISTICS
Characteristic
Thermal Resistance, Junction−to−Case
Symbol
Max
6.25
71.4
260
Unit
°C/W
°C/W
°C
R
q
JC
Thermal Resistance, Junction−to−Ambient (Note 1)
R
q
JA
Lead Temperature for Soldering
T
L
1. These ratings are applicable when surface mounted on the minimum pad sizes recommended.
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2
MJD44H11, NJVMJD44H11 (NPN), MJD45H11, NJVMJD45H11 (PNP)
ELECTRICAL CHARACTERISTICS
(T = 25_C, common for NPN and PNP, minus sign, “−”, for PNP omitted, unless otherwise noted)
A
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Collector−Emitter Sustaining Voltage
V
80
Vdc
mA
CEO(sus)
(I = 30 mA, I = 0)
C
B
Collector Cutoff Current
(V = Rated V , V = 0)
I
1.0
1.0
CES
CE
CEO BE
Emitter Cutoff Current
I
mA
EBO
(V = 5 Vdc)
EB
ON CHARACTERISTICS
Collector−Emitter Saturation Voltage
V
V
1
Vdc
Vdc
−
CE(sat)
(I = 8 Adc, I = 0.4 Adc)
C
B
Base−Emitter Saturation Voltage
(I = 8 Adc, I = 0.8 Adc)
1.5
BE(sat)
C
B
DC Current Gain
(V = 1 Vdc, I = 2 Adc)
h
FE
60
40
CE
C
DC Current Gain
(V = 1 Vdc, I = 4 Adc)
CE
C
DYNAMIC CHARACTERISTICS
Collector Capacitance
C
pF
cb
(V = 10 Vdc, f
= 1 MHz)
MJD44H11, NJVMJD44H11G,/T4G/RLG
MJD45H11, NJVMJD45H11T4G/RLG
CB
test
45
130
Gain Bandwidth Product
f
T
MHz
(I = 0.5 Adc, V = 10 Vdc, f = 20 MHz) MJD44H11, NJVMJD44H11G,/T4G/RLG
C
CE
85
90
MJD45H11, NJVMJD45H11T4G/RLG
SWITCHING TIMES
Delay and Rise Times
t + t
ns
ns
ns
d
r
(I = 5 Adc, I = 0.5 Adc)
MJD44H11, NJVMJD44H11G,/T4G/RLG
MJD45H11, NJVMJD45H11T4G/RLG
C
B1
300
135
Storage Time
t
s
(I = 5 Adc, I = I = 0.5 Adc)
MJD44H11, NJVMJD44H11G,/T4G/RLG
MJD45H11, NJVMJD45H11T4G/RLG
C
B1
B2
500
500
Fall Time
t
f
(I = 5 Adc, I = I = 0.5 Adc
MJD44H11, NJVMJD44H11G,/T4G/RLG
MJD45H11, NJVMJD45H11T4G/RLG
C
B1
B2
140
100
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3
MJD44H11, NJVMJD44H11 (NPN), MJD45H11, NJVMJD45H11 (PNP)
1
0.7
0.5
D = 0.5
0.3
0.2
0.2
0.1
P
(pk)
R
R
= r(t) R
q
JC
q
q
JC(t)
= 6.25°C/W MAX
JC
0.1
0.07
0.05
0.05
0.02
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
t
1
READ TIME AT t
t
1
2
0.01
T
- T = P q
C (pk) JC(t)
J(pk)
0.03
0.02
DUTY CYCLE, D = t /t
1 2
SINGLE PULSE
0.01
0.01
0.02 0.03 0.05
0.1
0.2 0.3 0.5
1
2
3
5
10
20 30
50
100
200 300 500
1 k
t, TIME (ms)
Figure 1. Thermal Response
20
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
100ꢀms
10
5
500ꢀms
breakdown. Safe operating area curves indicate I − V
C
CE
1ꢀms
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
3
2
5ꢀms
dc
1
The data of Figure 2 is based on T
variable depending on conditions. Second breakdown pulse
= 150_C; T is
J(pk)
C
0.5
0.3
THERMAL LIMIT @ T = 25°C
C
WIRE BOND LIMIT
limits are valid for duty cycles to 10% provided T
J(pk)
v 150_C.
T
may be calculated from the data in
0.1
J(pk)
Figure 1. At high case temperatures, thermal limitations will
reduce the power that can be handled to values less than the
limitations imposed by second breakdown.
0.05
0.02
1
3
5
7
10
20 30
50 70 100
V
CE
, COLLECTOR-EMITTER VOLTAGE (VOLTS)
Figure 2. Maximum Forward Bias
Safe Operating Area
T
A
T
C
2.5 25
2
20
T
C
1.5 15
T
1
0.5
0
10
5
A
SURFACE
MOUNT
0
25
50
75
100
125
150
T, TEMPERATURE (°C)
Figure 3. Power Derating
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4
MJD44H11, NJVMJD44H11 (NPN), MJD45H11, NJVMJD45H11 (PNP)
1000
100
1000
V
CE
= 1 V
V
CE
= 1 V
150°C
25°C
150°C
25°C
−55°C
−55°C
100
10
10
0.01
0.1
1
10
10
10
0.01
0.1
1
10
10
10
I , COLLECTOR CURRENT (A)
I , COLLECTOR CURRENT (A)
C
C
Figure 4. MJD44H11 DC Current Gain
Figure 5. MJD45H11 DC Current Gain
1000
1000
V
= 4 V
V
= 4 V
CE
CE
150°C
150°C
25°C
25°C
−55°C
−55°C
100
10
100
10
0.01
0.1
1
0.01
0.1
1
I , COLLECTOR CURRENT (A)
I , COLLECTOR CURRENT (A)
C
C
Figure 6. MJD44H11 DC Current Gain
Figure 7. MJD45H11 DC Current Gain
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.8
0.7
0.6
0.5
0.4
0.3
0.2
IC/IB = 20
IC/IB = 20
−55°C
150°C
25°C
25°C
150°C
−55°C
0.1
0
0.1
0
0.01
0.1
1
0.01
0.1
1
I , COLLECTOR CURRENT (A)
C
I , COLLECTOR CURRENT (A)
C
Figure 8. MJD44H11 Saturation Voltage
VCE(sat)
Figure 9. MJD45H11 Saturation Voltage
VCE(sat)
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5
MJD44H11, NJVMJD44H11 (NPN), MJD45H11, NJVMJD45H11 (PNP)
1.4
1.2
1.0
0.8
0.6
0.4
1.4
1.2
1.0
−55°C
25°C
−55°C
0.8
25°C
0.6
150°C
150°C
0.4
IC/IB = 20
IC/IB = 20
0.2
0
0.2
0
0.01
0.1
1
10
0.01
0.1
1
10
I , COLLECTOR CURRENT (A)
C
I , COLLECTOR CURRENT (A)
C
Figure 10. MJD44H11 Saturation Voltage
VBE(sat)
Figure 11. MJD45H11 Saturation Voltage
VBE(sat)
2.0
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
T = 25°C
T = 25°C
A
A
I
C
= 8 A
I
C
= 8 A
I
C
= 3 A
I
C
= 3 A
1 A
1 A
10
I
= 0.1 A 0.5 A
1
0.2
0
0.2
0
0.5 A
C
I
C
= 0.1 A
0.1
100
1000
10,000
0.1
1
10
100
1000 10,000
I , BASE CURRENT (mA)
B
I , BASE CURRENT (mA)
B
Figure 12. MJD44H11 Collector Saturation
Region
Figure 13. MJD45H11 Collector Saturation
Region
1000
1000
Cob
Cob
100
10
100
10
0.1
1
10
100
0.1
1
10
100
V , REVERSE VOLTAGE (V)
R
V , REVERSE VOLTAGE (V)
R
Figure 14. MJD44H11 Capacitance
Figure 15. MJD45H11 Capacitance
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6
MJD44H11, NJVMJD44H11 (NPN), MJD45H11, NJVMJD45H11 (PNP)
100
100
V
CE
= 2 V
V
CE
= 2 V
10
0.01
10
0.1
1
10
0.01
0.1
1
10
I , COLLECTOR CURRENT (A)
C
I , COLLECTOR CURRENT (A)
C
Figure 16. MJD44H11
Figure 17. MJD45H11
Current−Gain−Bandwidth Product
Current−Gain−Bandwidth Product
ORDERING INFORMATION
Device
†
Package Type
Package
Shipping
MJD44H11G
DPAK
(Pb−Free)
369C
NJVMJD44H11G
MJD44H11−1G
MJD44H11RLG
NJVMJD44H11RLG
MJD44H11T4G
NJVMJD44H11T4G
MJD44H11T5G
MJD45H11G
DPAK
75 Units / Rail
(Pb−Free)
DPAK−3
(Pb−Free)
369D
DPAK
(Pb−Free)
1,800 / Tape & Reel
2,500 / Tape & Reel
DPAK
(Pb−Free)
DPAK
(Pb−Free)
369C
DPAK
(Pb−Free)
DPAK
(Pb−Free)
DPAK
(Pb−Free)
75 Units / Rail
MJD45H11−1G
MJD45H11RLG
NJVMJD45H11RLG
MJD45H11T4G
NJVMJD45H11T4G
DPAK−3
369D
369C
(Pb−Free)
DPAK
(Pb−Free)
1,800 / Tape & Reel
2,500 / Tape & Reel
DPAK
(Pb−Free)
DPAK
(Pb−Free)
DPAK
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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7
MJD44H11, NJVMJD44H11 (NPN), MJD45H11, NJVMJD45H11 (PNP)
PACKAGE DIMENSIONS
DPAK
CASE 369C
ISSUE D
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
C
Y14.5M, 1994.
A
2. CONTROLLING DIMENSION: INCHES.
A
E
3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI-
MENSIONS b3, L3 and Z.
c2
H
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.
5. DIMENSIONS D AND E ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY.
6. DATUMS A AND B ARE DETERMINED AT DATUM
PLANE H.
b3
B
4
2
L3
L4
Z
D
DETAIL A
1
3
INCHES
DIM MIN MAX
0.086 0.094
A1 0.000 0.005
0.025 0.035
b2 0.030 0.045
b3 0.180 0.215
MILLIMETERS
MIN
2.18
0.00
0.63
0.76
4.57
0.46
0.46
5.97
6.35
MAX
2.38
0.13
0.89
1.14
5.46
0.61
0.61
6.22
6.73
A
b2
c
b
b
M
0.005 (0.13)
C
H
e
c
0.018 0.024
c2 0.018 0.024
GAUGE
PLANE
SEATING
PLANE
L2
C
D
E
e
0.235 0.245
0.250 0.265
0.090 BSC
2.29 BSC
9.40 10.41
1.40 1.78
2.74 REF
0.51 BSC
0.89 1.27
H
L
L1
L2
0.370 0.410
0.055 0.070
0.108 REF
L
A1
L1
0.020 BSC
DETAIL A
L3 0.035 0.050
ROTATED 905 CW
L4
Z
−−− 0.040
0.155 −−−
−−−
3.93
1.01
−−−
STYLE 1:
PIN 1. BASE
SOLDERING FOOTPRINT*
2. COLLECTOR
3. EMITTER
4. COLLECTOR
6.20
3.0
0.244
0.118
2.58
0.101
5.80
1.6
0.063
6.172
0.243
0.228
mm
inches
ǒ
Ǔ
SCALE 3:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
8
MJD44H11, NJVMJD44H11 (NPN), MJD45H11, NJVMJD45H11 (PNP)
PACKAGE DIMENSIONS
IPAK
CASE 369D
ISSUE C
C
B
R
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
V
S
E
2. CONTROLLING DIMENSION: INCH.
INCHES
DIM MIN MAX
MILLIMETERS
4
2
MIN
5.97
6.35
2.19
0.69
0.46
0.94
MAX
6.35
6.73
2.38
0.88
0.58
1.14
Z
A
B
C
D
E
F
G
H
J
K
R
S
V
Z
0.235 0.245
0.250 0.265
0.086 0.094
0.027 0.035
0.018 0.023
0.037 0.045
0.090 BSC
0.034 0.040
0.018 0.023
0.350 0.380
0.180 0.215
0.025 0.040
0.035 0.050
A
K
1
3
−T−
SEATING
PLANE
2.29 BSC
0.87
0.46
8.89
4.45
0.63
0.89
3.93
1.01
0.58
9.65
5.45
1.01
1.27
−−−
J
F
H
0.155
−−−
D 3 PL
STYLE 1:
PIN 1. BASE
G
M
T
0.13 (0.005)
2. COLLECTOR
3. EMITTER
4. COLLECTOR
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
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MJD44H11/D
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