NL17SZ08XV5T2G [ONSEMI]
Single 2−Input AND Gate; 单路2输入与门
| 型号： | NL17SZ08XV5T2G |
| 厂家： | 
ONSEMI |
| 描述： | Single 2−Input AND Gate |
| 文件： | 总6页 (文件大小：115K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NL17SZ08
Single 2−Input AND Gate
The NL17SZ08 is a single 2−input AND Gate in two tiny footprint
packages. The device performs much as LCX multi−gate products in
speed and drive. They should be used wherever the need for higher
speed and drive are needed.
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MARKING
DIAGRAMS
Features
• Tiny SOT−353 and SOT−553 Packages
• 2.7 ns T at 5.0 V (typ)
PD
5
SC−70/SC−88A/SOT−353
DF SUFFIX
• Source/Sink 24 mA at 3.0 V
L2 M G
• Over−Voltage Tolerant Inputs
G
5
CASE 419A
• Pin For Pin with NC7SZ08P5X, TC7SZ08FU and TC7SZ08AFE
• Chip Complexity: FETs = 20
1
5
1
• Designed for 1.65 V to 5.5 V V Operation
• Pb−Free Packages are Available
CC
SOT−553
XV5 SUFFIX
CASE 463B
L2 M G
5
G
1
1
L2
M
A
= Device Code
= Date Code*
= Assembly Location
= Year
= Work Week
= Pb−Free Package
5
IN B
IN A
V
CC
1
2
Y
W
G
(Note: Microdot may be in either location)
*Date Code orientation and/or position may
vary depending upon manufacturing location.
4
OUT Y
GND
3
PIN ASSIGNMENT
Figure 1. Pinout (Top View)
Pin
Function
1
In B
2
3
4
5
In A
GND
Out Y
IN A
IN B
&
OUT Y
V
CC
Figure 2. Logic Symbol
FUNCTION TABLE
Output
Input
Y = AB
A
L
B
L
Y
L
L
H
L
L
H
H
L
H
H
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
March, 2006 − Rev. 7
NL17SZ08/D
NL17SZ08
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
V
CC
DC Supply Voltage
*0.5 to )7.0
*0.5 to )7.0
V
IN
DC Input Voltage
V
V
OUT
DC Output Voltage
*0.5 to V )0.5
V
CC
I
DC Input Diode Current
DC Output Diode Current
DC Output Sink Current
DC Supply Current per Supply Pin
Storage Temperature Range
*50
*50
mA
mA
mA
mA
°C
IK
I
OK
I
$50
OUT
I
$100
CC
T
*65 to )150
260
STG
T
Lead Temperature, 1 mm from Case for 10 Seconds
Junction Temperature Under Bias
Thermal Resistance
°C
L
T
)150
°C
J
q
SOT−353 (Note 1)
SOT−553
350
496
°C/W
JA
P
D
Power Dissipation in Still Air at 85°C
SOT−353
SOT−553
186
135
mW
MSL
Moisture Sensitivity
Flammability Rating
ESD Classification
Level 1
F
R
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
ESD
Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
Class Z
Class A
N/A
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2−ounce copper trace with no air flow.
2. Tested to EIA/JESD22−A114−A, rated to EIA/JESD22−A114−B.
3. Tested to EIA/JESD22−A115−A, rated to EIA/JESD22−A115−A.
4. Tested to JESD22−C101−A.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
1.65
0
Max
5.5
Unit
V
V
CC
DC Supply Voltage
V
IN
DC Input Voltage
5.5
V
V
OUT
DC Output Voltage
0
V
CC
+ 0.5
V
T
Operating Temperature Range
Input Rise and Fall Time
−40
)85
°C
ns/V
A
t , t
r
V
CC
V
CC
= 3.0 V $0.3 V
= 5.0 V $0.5 V
0
0
100
20
f
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2
NL17SZ08
DC ELECTRICAL CHARACTERISTICS
T
A
= 255C
Typ
*405C v T v 855C
A
V
(V)
CC
Min
Max
Min
Max
Symbol
Parameter
Condition
Unit
V
IH
High−Level Input Voltage
1.65 to 1.95 0.75 V
0.75 V
0.7 V
V
CC
CC
CC
CC
2.3 to 5.5
0.7 V
V
Low−Level Input Voltage
1.65 to 1.95
2.3 to 5.5
0.25 V
0.3 V
0.25 V
0.3 V
V
V
IL
CC
CC
CC
CC
V
OH
High−Level Output Voltage
I
I
= 100 mA
= −3 mA
= −8 mA
= −12 mA
= −16 mA
= −24 mA
= −32 mA
1.65 to 5.5
1.65
2.3
V
CC
− 0.1
V
V
CC
− 0.1
OH
CC
OH
V
IN
= V or V
IH
1.29
1.52
2.1
2.4
2.7
2.5
4.0
1.29
IL
I
OH
1.9
2.2
2.4
2.3
3.8
1.9
2.2
2.4
2.3
3.8
I
OH
2.7
I
OH
3.0
I
OH
I
OH
3.0
4.5
V
OL
Low−Level Output Voltage
= V or V
I
= 100 mA
= 3 mA
= 8 mA
= 12 mA
= 16 mA
= 24 mA
= 32 mA
1.65 to 5.5
1.65
2.3
0.1
0.24
0.3
0.1
0.24
0.3
V
OL
I
OL
V
0.08
0.20
0.22
0.28
0.38
0.42
IN
IH
OH
I
OL
I
OL
2.7
0.4
0.4
I
OL
3.0
0.4
0.4
I
OL
I
OL
3.0
0.55
0.55
0.55
0.55
4.5
I
Input Leakage Current
V
= V or GND
0 to 5.5
5.5
$0.1
$1.0
mA
mA
IN
IN
CC
I
Quiescent Supply Current
V
IN
= V or GND
1
10
CC
CC
AC ELECTRICAL CHARACTERISTICS t = t = 3.0 ns
R
F
T
A
= 255C
*405C v T v 855C
A
V
CC
Min
Typ
6.3
6.2
3.4
2.6
3.3
2.2
2.7
Max
12
Min
2.0
2.0
0.8
0.5
1.5
0.5
0.8
Max
12.7
10.5
7.5
(V)
1.65
1.8
Symbol
Parameter
Condition
Unit
t
Propagation Delay
(Figure 3 and 4)
2.0
2.0
0.8
0.5
1.5
0.5
0.8
ns
R = 1 MW, C = 15 pF
PLH
L
L
t
PHL
R = 1 MW, C = 15 pF
10
L
L
R = 1 MW, C = 15 pF
2.5 $ 0.2
3.3 $ 0.3
7.0
4.7
5.2
4.1
4.5
L
L
R = 1 MW, C = 15 pF
5.0
L
L
R = 500 W, C = 50 pF
5.5
L
L
5.0 $ 0.5
4.4
R = 1 MW, C = 15 pF
L
L
R = 500 W, C = 50 pF
4.8
L
L
CAPACITIVE CHARACTERISTICS
Symbol
Parameter
Condition
= 5.5 V, V = 0 V or V
Typical
u4.0
25
Unit
pF
C
Input Capacitance
V
CC
IN
I
CC
C
Power Dissipation Capacitance
(Note 5)
10 MHz, V = 3.3 V, V = 0 V or V
pF
PD
CC
I
CC
10 MHz, V = 5.5 V, V = 0 V or V
30
CC
I
CC
5. C is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
PD
Average operating current can be obtained by the equation: I
) = C ꢀ V ꢀ f + I . C is used to determine the no−load dynamic
CC(OPR
PD CC in CC PD
2
power consumption; P = C ꢀ V
ꢀ f + I ꢀ V
.
D
PD
CC
in
CC
CC
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3
NL17SZ08
t = 3 ns
f
t = 3 ns
f
V
CC
V
CC
90%
50%
90%
50%
INPUT
A and B
10%
10%
OUTPUT
GND
INPUT
R
C
L
L
t
t
PHL
PLH
V
V
OH
OUTPUT Y
50%
50%
A 1−MHz square input wave is recommended for
OL
propagation delay tests.
Figure 3. Switching Waveform
Figure 4. Test Circuit
DEVICE ORDERING INFORMATION
†
Device Order Number
NL17SZ08DFT2
Package Type
Tape and Reel Size
SC70−5/SC−88A/SOT−353
4000 / Tape & Reel
4000 / Tape & Reel
NL17SZ08DFT2G
SC70−5/SC−88A/SOT−353
(Pb−Free)
NL17SZ08XV5T2
NL17SZ08XV5T2G
SOT−553*
SOT−553*
4000 / Tape & Reel
4000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*All Devices in Package SOT553 are Inherently Pb−Free.
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4
NL17SZ08
PACKAGE DIMENSIONS
SC−88A, SOT−353, SC−70
CASE 419A−02
ISSUE J
A
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
G
2. CONTROLLING DIMENSION: INCH.
3. 419A−01 OBSOLETE. NEW STANDARD
419A−02.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
5
4
3
−B−
S
INCHES
DIM MIN MAX
MILLIMETERS
MIN
1.80
1.15
0.80
0.10
MAX
2.20
1.35
1.10
0.30
1
2
A
B
C
D
G
H
J
0.071
0.045
0.031
0.004
0.087
0.053
0.043
0.012
0.026 BSC
0.65 BSC
M
M
D 5 PL
0.2 (0.008)
B
−−−
0.004
0.004
0.004
0.010
0.012
−−−
0.10
0.10
0.10
0.25
0.30
K
N
S
N
0.008 REF
0.20 REF
0.079
0.087
2.00
2.20
J
C
K
H
SOLDERING FOOTPRINT*
0.50
0.0197
0.65
0.025
0.65
0.025
0.40
0.0157
1.9
0.0748
mm
inches
ǒ
Ǔ
SCALE 20:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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5
NL17SZ08
PACKAGE DIMENSIONS
SOT−553
XV5 SUFFIX
5−LEAD PACKAGE
CASE 463B−01
ISSUE B
NOTES:
1. DIMENSIONING AND TOLERANCING PER
D
−X−
ANSI Y14.5M, 1982.
A
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES
LEAD FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS
OF BASE MATERIAL.
L
5
4
3
E
−Y−
MILLIMETERS
INCHES
H
E
DIM
A
b
c
D
E
MIN
0.50
0.17
0.08
1.50
1.10
NOM
0.55
0.22
0.13
1.60
MAX
MIN
NOM
0.022
0.009
0.005
0.063
MAX
0.024
0.011
0.007
0.067
0.051
1
2
0.60
0.27
0.18
1.70
1.30
0.020
0.007
0.003
0.059
0.043
b 5 PL
c
e
1.20
0.047
M
0.08 (0.003)
X Y
e
L
0.50 BSC
0.20
1.60
0.020 BSC
0.008
0.10
1.50
0.30
1.70
0.004
0.059
0.012
0.067
H
0.063
E
STYLE 1:
PIN 1. BASE 1
2. EMITTER 1/2
3. BASE 2
STYLE 2:
PIN 1. CATHODE
2. ANODE
3. CATHODE
4. CATHODE
5. CATHODE
4. COLLECTOR 2
5. COLLECTOR 1
SOLDERING FOOTPRINT*
0.3
0.0118
0.45
0.0177
1.0
0.0394
1.35
0.0531
0.5
0.5
0.0197 0.0197
mm
inches
ǒ
Ǔ
SCALE 20:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
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For additional information, please contact your
local Sales Representative.
NL17SZ08/D
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