NL17SZ125DFT2G [ONSEMI]
Non-Inverting 3-State Buffer; 非反相三态缓冲器
| 型号： | NL17SZ125DFT2G |
| 厂家： | 
ONSEMI |
| 描述： | Non-Inverting 3-State Buffer |
| 文件： | 总8页 (文件大小：112K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NL17SZ125
Non−Inverting 3−State Buffer
The NL17SZ125 is a high performance non−inverting buffer operating
from a 1.65 V to 5.5 V supply.
• Extremely High Speed: t 2.6 ns (typical) at V = 5.0 V
PD
CC
• Designed for 1.65 V to 5.5 V V Operation
CC
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• Overvoltage Tolerant Inputs and Outputs
• LVTTL Compatible − Interface Capability With 5.0 V TTL Logic
MARKING
DIAGRAM
5
with V = 3.0 V
CC
• LVCMOS Compatible
• 24 mA Balanced Output Sink and Source Capability
5
• Near Zero Static Supply Current Substantially Reduces System
d
M0
1
Power Requirements
SC−88A (SOT−353)
DF SUFFIX
• 3−State OE Input is Active−Low
• Replacement for NC7SZ125
• Chip Complexity = 36 FETs
• Pb−Free Package is Available
1
CASE 419A
d = Date Code
PIN ASSIGNMENT
1
2
3
4
5
OE
IN A
GND
1
2
3
5
4
V
CC
OE
IN A
GND
OUT Y
V
CC
FUNCTION TABLE
A Input
OUT Y
OE Input
Y Output
L
L
L
H
X
L
H
Z
Figure 1. Pinout (Top View)
H
X = Don’t Care
OE
IN A
EN
OUT Y
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
Figure 2. Logic Symbol
Semiconductor Components Industries, LLC, 2005
1
Publication Order Number:
January, 2005 − Rev. 4
NL17SZ125/D
NL17SZ125
MAXIMUM RATINGS
Symbol
Parameter
Value
−0.5 to )7.0
−0.5 to )7.0
−0.5 to )7.0
−50
Unit
V
V
V
V
DC Supply Voltage
CC
IN
DC Input Voltage
V
DC Output Voltage
V
OUT
I
I
I
I
DC Input Diode Current
DC Output Diode Current
DC Output Sink Current
DC Supply Current per Supply Pin
Storage Temperature Range
mA
mA
mA
mA
°C
IK
−50
OK
$50
OUT
CC
$100
T
T
T
−65 to )150
260
STG
L
Lead Temperature, 1 mm from Case for 10 Seconds
Junction Temperature Under Bias
Thermal Resistance (Note 1)
°C
)150
°C
J
q
350
°C/W
mW
JA
P
Power Dissipation in Still Air at 85°C
Moisture Sensitivity
150
D
MSL
Level 1
F
Flammability Rating
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
R
V
ESD Withstand Voltage
Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
u2000
u200
N/A
V
ESD
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2 ounce copper trace with no air flow.
2. Tested to EIA/JESD22−A114−A.
3. Tested to EIA/JESD22−A115−A.
4. Tested to JESD22−C101−A.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
1.65
0
Max
5.5
Unit
V
V
V
V
DC Supply Voltage
CC
IN
DC Input Voltage
5.5
V
DC Output Voltage
0
5.5
V
OUT
T
Operating Temperature Range
Input Rise and Fall Time
−40
+125
°C
ns/V
A
t , t
r
V
CC
= 1.8 V $0.15 V
= 2.5 V $0.2 V
= 3.0 V $0.3 V
= 5.0 V $0.5 V
0
0
0
0
20
20
10
5.0
f
V
V
V
CC
CC
CC
DEVICE JUNCTION TEMPERATURE VERSUS
TIME TO 0.1% BOND FAILURES
FAILURE RATE OF PLASTIC = CERAMIC
UNTIL INTERMETALLICS OCCUR
Junction
Temperature °C
Time, Hours
1,032,200
419,300
178,700
79,600
Time, Years
117.8
47.9
80
90
1
100
110
120
130
140
20.4
9.4
1
10
100
1000
37,000
4.2
TIME, YEARS
17,800
2.0
Figure 3. Failure Rate vs. Time Junction Temperature
8,900
1.0
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2
NL17SZ125
DC ELECTRICAL CHARACTERISTICS
T
A
= 255C
Typ
−405C v T v 1255C
A
V
(V)
CC
Min
Max
Min
Max
Symbol
Parameter
Unit
Condition
V
V
V
High−Level Input
1.65 to 1.95 0.75 V
0.75 V
V
IH
CC
CC
CC
Voltage
2.3 to 5.5
0.7 V
0.7 V
CC
Low−Level Input
Voltage
1.65 to 1.95
2.3 to 5.5
0.25 V
0.25 V
V
V
IL
CC
CC
CC
CC
0.3 V
0.3 V
High−Level Output
1.65
1.8
2.3
3.0
4.5
1.55
1.7
2.2
2.9
4.4
1.65
1.8
2.3
3.0
4.5
1.55
1.7
2.2
2.9
4.4
I
= −100 mA
OH
OH
Voltage
V
= V
IN
IH
1.65
2.3
3.0
3.0
4.5
1.29
1.9
2.4
2.3
3.8
1.52
2.15
2.80
2.68
4.20
1.29
1.9
2.4
2.3
3.8
V
V
V
I
= −4 mA
= −8 mA
= −16 mA
= −24 mA
= −32 mA
OH
I
OH
I
OH
I
OH
I
OH
V
Low−Level Output
1.65
1.8
2.3
3.0
4.5
0.0
0.0
0.0
0.0
0.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
I
= 100 mA
OL
OL
Voltage
V
= V
IN
IL
1.65
2.3
3.0
3.0
4.5
0.08
0.10
0.15
0.22
0.22
0.24
0.30
0.40
0.55
0.55
0.24
0.30
0.40
0.55
0.55
I
OL
= 4 mA
= 8 mA
= 16 mA
= 24 mA
= 32 mA
OL
I
I
OL
I
OL
I
OL
I
I
Input Leakage Current
0 to 5.5
$1.0
$0.5
$1.0
$5.0
mA
mA
0 V v V v 5.5 V
IN
IN
3−State Output
Leakage
1.65 to 5.5
V
= V or V
OZ
IN IH
IL
0 V v V
v 5.5 V
OUT
I
I
Power Off Leakage
Current
0.0
1.0
1.0
10
10
mA
mA
V
or V
= 5.5 V
OFF
CC
IN
OUT
Quiescent Supply
Current
1.65 to 5.5
V
= 5.5 V, GND
IN
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3
NL17SZ125
AC ELECTRICAL CHARACTERISTICS (t = t = 3.0 ns)
R
F
T
= 255C
−405C v T v 1255C
A
A
V
(V)
CC
Min Typ Max
Min
2.0
1.0
Max
10.5
8.0
Symbol
Parameter
Condition
Unit
t
t
Propagation Delay
AN to YN
(Figures 4 and 5, Table 1)
ns
R = 1 MW
C = 15 pF
L
1.8 $ 0.15 2.0
9.0
10
PLH
L
PHL
R = 1 MW
C = 15 pF 2.5 $ 0.2
1.0
7.5
L
L
R = 1 MW
L
C = 15 pF 3.3 $ 0.3
L
0.8
1.2
5.2
5.7
0.8
1.2
5.5
6.0
L
L
R = 500 W
C = 50 pF
R = 1 MW
L
C = 15 pF 5.0 $ 0.5
L
0.5
0.8
4.5
5.0
0.5
0.8
4.8
5.3
L
L
R = 500 W
C = 50 pF
t
t
Output Enable Time
R = 250 W
C = 50 pF 1.8 $ 0.15 2.0
7.6
8.0
9.5
8.5
6.2
5.5
10
2.0
1.8
1.2
0.8
2.0
1.5
0.8
0.3
10
9.0
6.5
5.8
10.5
8.5
6.0
5.0
ns
ns
PZH
PZL
L
L
(Figures 6, 7and 8, Table 1)
2.5 $ 0.2
3.3 $ 0.3
5.0 $ 0.5
1.8
1.2
0.8
t
t
Output Disable Time
(Figures 6, 7and 8, Table 1)
R and R = 500 W C = 50 pF 1.8 $ 0.15 2.0
L 1 L
PHZ
PLZ
2.5 $ 0.2
3.3 $ 0.3
5.0 $ 0.5
1.5
0.8
0.3
8.0
5.7
4.7
CAPACITIVE CHARACTERISTICS
Symbol
Parameter
Condition
Typical
2.5
Unit
pF
C
C
C
Input Capacitance
Output Capacitance
V
V
= 5.5 V, V = 0 V or V
I
IN
CC
CC
CC
CC
= 5.5 V, V = 0 V or V
2.5
pF
OUT
PD
I
Power Dissipation Capacitance
(Note 5)
10 MHz, V = 3.3 V, V = 0 V or V
9
11
pF
CC
CC
I
CC
CC
10 MHz, V = 5.5 V, V = 0 V or V
I
5. C is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
PD
Average operating current can be obtained by the equation: I
) = C ꢀ V ꢀ f + I . C is used to determine the no−load dynamic
CC(OPR
PD CC in CC PD
2
power consumption; P = C ꢀ V
ꢀ f + I ꢀ V
.
D
PD
CC
in
CC
CC
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4
NL17SZ125
t = 3 ns
f
t = 3 ns
f
OE = GND
V
CC
90%
mi
90%
INPUT
OUTPUT
INPUT
A and B
V
V
mi
10%
10%
C *
L
R
L
GND
t
t
PHL
PLH
V
V
OH
OL
V
V
mo
OUTPUT Y
mo
*Includes all probe and jig capacitance.
A 1 MHz square input wave is recommended for
propagation delay tests.
Figure 4. Switching Waveform
Figure 5. TPLH or TPHL
2 V
CC
INPUT
INPUT
R = 500 W
1
V
CC
OUTPUT
R = 500 W
OUTPUT
C = 50 pF
L
C = 50 pF
L
R = 250 W
L
L
A 1 MHz square input wave is recommended for
propagation delay tests.
A 1 MHz square input wave is recommended for
propagation delay tests.
Figure 6. TPZL or TPL
Figure 7. TPZH or TPHZ
2.7 V
V
V
mi
mi
OE
0 V
t
t
PHZ
PZH
V
CC
V
− 0.3 V
OH
V
V
On
mo
mo
≈ 0 V
t
t
PLZ
PZL
≈ 3.0 V
+ 0.3 V
On
V
OL
GND
Figure 8. AC Output Enable and Disable Waveform
Table 1. Output Enable and Disable Times
tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns
V
CC
3.3 V $ 0.3 V
1.5 V
2.7 V
1.5 V
1.5 V
2.5 V $ 0.2 V
Symbol
V
V
2
mi
CC/
V
1.5 V
V
2
CC/
mo
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5
NL17SZ125
DEVICE ORDERING INFORMATION
Device Nomenclature
Logic
Circuit
Indicator Package
No. of
Gates per
Temp
Range
Tape and
Reel
Suffix
Device
Package
Suffix
†
Identifier Technology Function
Device
Package
Shipping
NL17SZ125DFT2
NL
1
7
SZ
125
DF
T2
SC−88A (SOT−353)
3000 / Tape & Reel
178 mm (7”)
NL17SZ125DFT2G
NL
1
7
SZ
125
DF
T2G
SC−88A (SOT−353)
(Pb−Free)
3000 / Tape & Reel
178 mm (7”)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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6
NL17SZ125
PACKAGE DIMENSIONS
SC−88A (SOT−353)
DF SUFFIX
CASE 419A−02
ISSUE G
A
NOTES:
G
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 419A−01 OBSOLETE. NEW STANDARD
419A−02.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
5
4
3
−B−
S
1
2
INCHES
DIM MIN MAX
MILLIMETERS
MIN
1.80
1.15
0.80
0.10
MAX
2.20
1.35
1.10
0.30
A
B
C
D
G
H
J
0.071
0.045
0.031
0.004
0.087
0.053
0.043
0.012
M
M
B
D 5 PL
0.2 (0.008)
0.026 BSC
0.65 BSC
N
−−−
0.004
0.004
0.004
0.010
0.012
−−−
0.10
0.10
0.10
0.25
0.30
K
N
S
0.008 REF
0.20 REF
J
0.079
0.087
2.00
2.20
C
K
H
SOLDERING FOOTPRINT*
0.50
0.0197
0.65
0.025
0.65
0.025
0.40
0.0157
1.9
0.0748
mm
inches
ǒ
Ǔ
SCALE 20:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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7
NL17SZ125
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
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Order Literature: http://www.onsemi.com/litorder
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For additional information, please contact your
local Sales Representative.
NL17SZ125/D
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