NL27WZ126US [ONSEMI]

Dual Buffer with 3−State Outputs; 双缓冲器,具有三态输出
NL27WZ126US
型号: NL27WZ126US
厂家: ONSEMI    ONSEMI
描述:

Dual Buffer with 3−State Outputs
双缓冲器,具有三态输出

总线驱动器 总线收发器 逻辑集成电路 光电二极管
文件: 总6页 (文件大小:73K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
NL27WZ126  
Dual Buffer with 3−State  
Outputs  
The NL27WZ126 is a high performance dual noninverting buffer  
operating from a 1.65 V to 5.5 V supply.  
Features  
http://onsemi.com  
Extremely High Speed: t 2.6 ns (typical) at V = 5.0 V  
PD  
CC  
MARKING  
DIAGRAM  
Designed for 1.65 V to 5.5 V V Operation  
CC  
Over Voltage Tolerant Inputs and Outputs  
8
LVTTL Compatible − Interface Capability With 5.0 V TTL Logic  
with V = 3.0 V  
CC  
US8  
US SUFFIX  
CASE 493  
M2 M G  
LVCMOS Compatible  
8
G
24 mA Balanced Output Sink and Source Capability  
1
Near Zero Static Supply Current Substantially Reduces System  
Power Requirements  
1
3−State OE Input is Active−High  
M2  
M
G
= Device Code  
= Date Code*  
= Pb−Free Package  
Replacement for NC7WZ126  
Chip Complexity = 72 FETs  
Pb−Free Package is Available  
(Note: Microdot may be in either location)  
*Date Code orientation may vary depending upon  
manufacturing location.  
PIN ASSIGNMENT  
8
7
6
OE  
A
V
CC  
1
2
1
Pin  
Function  
1
OE  
OE  
1
2
2
3
4
5
6
7
8
A
Y
1
2
Y
1
Y
2
3
4
GND  
A
2
Y
1
5
A
2
GND  
OE  
2
V
CC  
Figure 1. Pinout (Top View)  
FUNCTION TABLE  
Input  
Output  
A
1
OE  
H
A
Y
n
n
n
1
Y
Y
1
OE  
EN  
1
H
H
A
2
H
L
L
Z
2
OE  
2
L
X
Figure 2. Logic Symbol  
X = Don’t Care  
n = 1, 2  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 5 of this data sheet.  
© Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
April, 2006 − Rev. 6  
NL27WZ126/D  
NL27WZ126  
MAXIMUM RATINGS  
Symbol  
Parameter  
Value  
*0.5 to )7.0  
*0.5 to )7.0  
*0.5 to )7.0  
*50  
Unit  
V
V
V
V
DC Supply Voltage  
CC  
I
DC Input Voltage  
V
DC Output Voltage  
V
O
I
I
I
I
I
DC Input Diode Current  
DC Output Diode Current  
DC Output Sink Current  
DC Supply Current per Supply Pin  
DC Ground Current per Ground Pin  
Storage Temperature Range  
V < GND  
mA  
mA  
mA  
mA  
mA  
°C  
IK  
I
V
< GND  
O
*50  
OK  
O
$50  
$100  
CC  
GND  
$100  
T
T
T
q
*65 to )150  
260  
STG  
Lead Temperature, 1 mm from Case for 10 Seconds  
Junction Temperature under Bias  
Thermal Resistance (Note 1)  
Power Dissipation in Still Air at 85°C  
Moisture Sensitivity  
°C  
L
J
)150  
°C  
250  
°C/W  
mW  
JA  
P
250  
D
MSL  
Level 1  
F
R
Flammability Rating  
Oxygen Index: 28 to 34  
UL 94 V−0 @ 0.125 in  
V
ESD  
ESD Withstand Voltage  
Human Body Model (Note 2)  
Machine Model (Note 3)  
> 2000  
> 200  
N/A  
V
Charged Device Model (Note 4)  
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the  
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect  
device reliability.  
1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2−ounce copper trace with no air flow.  
2. Tested to EIA/JESD22−A114−A.  
3. Tested to EIA/JESD22−A115−A.  
4. Tested to JESD22−C101−A.  
RECOMMENDED OPERATING CONDITIONS  
Symbol  
Parameter  
Min  
Max  
Unit  
V
CC  
Supply Voltage  
Operating  
Data Retention Only  
1.65  
1.5  
5.5  
5.5  
V
V
Input Voltage  
(Note 5)  
0
0
5.5  
5.5  
V
V
I
V
O
Output Voltage  
(HIGH or LOW State)  
T
Operating Free−Air Temperature  
Input Transition Rise or Fall Rate  
*40  
)85  
°C  
A
Dt/DV  
V
CC  
V
CC  
V
CC  
= 2.5 V $0.2 V  
= 3.0 V $0.3 V  
= 5.0 V $0.5 V  
0
0
0
20  
10  
5
ns/V  
5. Unused inputs may not be left open. All inputs must be tied to a high− or low−logic input voltage level.  
http://onsemi.com  
2
 
NL27WZ126  
DC ELECTRICAL CHARACTERISTICS  
V
T
= 255C  
Typ  
*405C v T v 855C  
CC  
A
A
Symbol  
Parameter  
Condition  
(V)  
Min  
0.7 V  
Max  
Min  
Max  
Unit  
V
V
IH  
High−Level Input Voltage  
Low−Level Input Voltage  
High−Level Output Voltage  
1.65 to 5.5  
1.65 to 5.5  
0.7 V  
CC  
CC  
V
IL  
0.3 V  
0.3 V  
CC  
V
CC  
V
OH  
I
= 100 mA  
I = −8 mA  
OH  
1.65 to 5.5  
1.65  
2.7  
V
CC  
− 0.1  
1.9  
2.2  
2.4  
2.3  
3.8  
V
V − 0.1  
CC  
V
OH  
CC  
V
IN  
= V  
2.1  
2.4  
2.7  
2.5  
4.0  
1.9  
IH  
I
= −12 mA  
= −16 mA  
= −24 mA  
= −32 mA  
2.2  
2.4  
2.3  
3.8  
OH  
I
3.0  
3.0  
4.5  
OH  
I
OH  
I
OH  
V
OL  
Low−Level Output Voltage  
= V or V  
I
= 100 mA  
I = 8 mA  
OL  
1.65 to 5.5  
1.65  
2.7  
0.1  
0.3  
0.4  
0.4  
0.55  
0.1  
0.3  
0.4  
0.4  
0.55  
V
OL  
V
0.20  
0.22  
0.28  
0.38  
0.42  
IN  
IH  
IL  
I
OL  
= 12 mA  
= 16 mA  
= 24 mA  
= 32 mA  
I
OL  
3.0  
3.0  
4.5  
I
OL  
I
OL  
0.55  
0.55  
I
Input Leakage Current  
V
= V or GND  
0 to 5.5  
0
$0.1  
$1.0  
mA  
mA  
IN  
IN  
CC  
I
Power Off−Output  
Leakage Current  
V
OUT  
= 5.5 V  
1
10  
OFF  
I
Quiescent Supply Current  
3−State Output Leakage  
V
V
= V or GND  
5.5  
1
10  
mA  
mA  
CC  
IN  
CC  
I
= V or V  
1.65 to 5.5  
$0.5  
$5  
OZ  
IN  
IL  
IH  
0 V v V  
v 5.5 V  
OUT  
AC ELECTRICAL CHARACTERISTICS (t = t = 3.0 ns)  
R
F
V
T
A
= 255C  
*405C v T v 855C  
CC  
A
Symbol  
Parameter  
Condition  
C = 15 pF  
(V)  
Min  
Typ Max  
Min  
Max  
Unit  
t
Propagation Delay  
AN to YN  
(Figures 3 and 4,  
Table 1)  
1.8 $ 0.15  
2.5 $ 0.2  
2.0  
1.0  
12  
7.5  
2.0  
1.0  
13  
8
ns  
R = 1 MW  
PLH  
L
L
t
PHL  
R = 1 MW  
C = 15 pF 3.3 $ 0.3  
0.8  
1.2  
0.5  
0.8  
5.2  
5.7  
4.5  
5.0  
1.0  
0.8  
0.8  
1.2  
0.5  
0.8  
5.5  
6.0  
4.8  
5.3  
1.0  
0.8  
L
L
R = 500 W  
C = 50 pF  
L
L
R = 1 MW  
C = 15 pF 5.0 $ 0.5  
L
L
R = 500 W  
C = 50 pF  
L
L
t
t
Output to Output Skew  
(Note 6)  
3.3 $ 0.3  
ns  
ns  
R = 500 W  
C = 50 pF  
L
OSLH  
L
OSHL  
R = 500 W  
C = 50 pF 5.0 $ 0.5  
L
L
t
Output Enable Time  
(Figures 5, 6 and 7,  
Table 1)  
1.8 $ 0.15  
2.5 $ 0.2  
3.0  
1.8  
14  
8.5  
3.0  
1.8  
15  
9.0  
R = 250 W  
C = 50 pF  
L
PZH  
L
t
PZL  
3.3 $ 0.3  
5.0 $ 0.5  
1.2  
0.8  
6.2  
5.5  
1.2  
0.8  
6.5  
5.8  
t
Output Enable Time  
(Figures 5, 6 and 7,  
Table 1)  
R and R1= 500 W C = 50 pF 1.8 $ 0.15  
2.5  
1.5  
12  
8.0  
2.5  
1.5  
13  
8.5  
ns  
PHZ  
L
L
2.5 $ 0.2  
3.3 $ 0.3  
5.0 $ 0.5  
t
PLZ  
0.8  
0.3  
5.7  
4.7  
0.8  
0.3  
6.0  
5.0  
6. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.  
This specification applies to any outputs switching in the same direction, either HIGH−to−LOW (t  
guaranteed by design.  
) or LOW−to−HIGH (t  
); parameter  
OSHL  
OSLH  
http://onsemi.com  
3
 
NL27WZ126  
CAPACITIVE CHARACTERISTICS  
Symbol  
Parameter  
Condition  
Typical  
2.5  
Unit  
pF  
C
Input Capacitance  
Output Capacitance  
V
V
= 5.5 V, V = 0 V or V  
I
IN  
CC  
CC  
CC  
C
= 5.5 V, V = 0 V or V  
2.5  
pF  
OUT  
CC  
I
C
Power Dissipation Capacitance  
(Note 7)  
10 MHz, V = 3.3 V, V = 0 V or V  
9
pF  
PD  
CC  
I
CC  
10 MHz, V = 5.5 V, V = 0 V or V  
11  
CC  
I
CC  
7. C is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.  
PD  
Average operating current can be obtained by the equation: I  
power consumption; P = C V  
) = C V f + I . C is used to determine the no−load dynamic  
CC(OPR  
PD CC in CC PD  
2
f + I V  
.
D
PD  
CC  
in  
CC  
CC  
t = 3 ns  
f
t = 3 ns  
f
OE = GND  
V
CC  
90%  
mi  
90%  
INPUT  
OUTPUT  
INPUT  
A and B  
V
V
mi  
10%  
10%  
C *  
L
R
L
GND  
t
t
PHL  
PLH  
V
V
OH  
V
mo  
V
mo  
OUTPUT Y  
*Includes all probe and jig capacitance.  
A 1 MHz square input wave is recommended for  
OL  
propagation delay tests.  
Figure 3. Switching Waveform  
Figure 4. tPLH or tPHL  
2.7 V  
V
mi  
V
mi  
OE  
0 V  
t
t
PHZ  
PZH  
V
CC  
V
− 0.3 V  
OH  
V
V
On  
mo  
0 V  
t
t
PLZ  
PZL  
3.0 V  
+ 0.3 V  
On  
mo  
V
OL  
GND  
Figure 5. AC Output Enable and Disable Waveform  
http://onsemi.com  
4
 
NL27WZ126  
Table 1. Output Enable and Disable Times  
tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 nsv  
V
CC  
3.3 V $ 0.3 V  
1.5 V  
2.7 V  
1.5 V  
1.5 V  
2.5 V $ 0.2 V  
Symbol  
V
mi  
V
2
CC/  
V
mo  
1.5 V  
V
CC/  
2
2   V  
CC  
INPUT  
INPUT  
R = 500 W  
1
V
CC  
OUTPUT  
R = 500 W  
OUTPUT  
R = 250 W  
C = 50 pF  
L
C = 50 pF  
L
L
L
A 1 MHz square input wave is recommended for  
propagation delay tests.  
A 1 MHz square input wave is recommended for  
propagation delay tests.  
Figure 6. tPZL or tPLZ  
Figure 7. tPZH or tPHZ  
DEVICE ORDERING INFORMATION  
Device Nomenclature  
Temp  
Logic  
No. of  
Device Order  
Number  
Device  
Function  
Package  
Suffix  
Package  
Type  
Tape and  
Reel Size  
Circuit  
Gates per  
Range  
Indicator Package Identifier  
Technology  
WZ  
NL27WZ126US  
NL  
NL  
2
2
7
7
126  
126  
US  
US8  
178 mm, 3000 Units  
178 mm, 3000 Units  
NL27WZ126USG  
WZ  
USG  
US8  
(Pb−Free)  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging  
Specifications Brochure, BRD8011/D.  
http://onsemi.com  
5
NL27WZ126  
PACKAGE DIMENSIONS  
US8  
US SUFFIX  
CASE 493−02  
ISSUE B  
−X−  
−Y−  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER  
ANSI Y14.5M, 1982.  
A
J
8
5
2. CONTROLLING DIMENSION: MILLIMETERS.  
3. DIMENSION “A” DOES NOT INCLUDE MOLD  
FLASH, PROTRUSION OR GATE BURR.  
MOLD FLASH. PROTRUSION AND GATE  
BURR SHALL NOT EXCEED 0.140 MM  
(0.0055”) PER SIDE.  
DETAIL E  
4. DIMENSION “B” DOES NOT INCLUDE  
INTER−LEAD FLASH OR PROTRUSION.  
INTER−LEAD FLASH AND PROTRUSION  
SHALL NOT E3XCEED 0.140 (0.0055”) PER  
SIDE.  
B
L
5. LEAD FINISH IS SOLDER PLATING WITH  
THICKNESS OF 0.0076−0.0203 MM.  
(300−800 “).  
6. ALL TOLERANCE UNLESS OTHERWISE  
SPECIFIED 0.0508 (0.0002 “).  
1
4
R
S
G
P
U
MILLIMETERS  
INCHES  
DIM  
A
B
C
D
F
G
H
J
K
L
M
N
P
MIN  
1.90  
2.20  
0.60  
0.17  
0.20  
0.50 BSC  
0.40 REF  
0.10  
MAX  
2.10  
2.40  
0.90  
0.25  
0.35  
MIN  
MAX  
0.083  
0.094  
0.035  
0.010  
0.014  
C
0.075  
0.087  
0.024  
0.007  
0.008  
0.020 BSC  
0.016 REF  
0.004  
H
−T−  
SEATING  
PLANE  
0.10 (0.004)  
T
K
N
D
R 0.10 TYP  
M
M
0.10 (0.004)  
T
X Y  
0.18  
0.10  
3.20  
6
0.007  
0.004  
0.126  
6
V
0.00  
3.00  
0
0.000  
0.118  
0
_
_
_
_
5
10  
5
10  
_
_
_
_
0.23  
0.23  
0.37  
0.60  
0.34  
0.33  
0.47  
0.80  
0.010  
0.009  
0.015  
0.024  
0.013  
0.013  
0.019  
0.031  
F
R
S
U
V
DETAIL E  
0.12 BSC  
0.005 BSC  
SOLDERING FOOTPRINT*  
3.8  
0.15  
1.8  
0.07  
0.50  
0.0197  
0.30  
0.012  
1.0  
0.0394  
mm  
inches  
ǒ
Ǔ
SCALE 8:1  
*For additional information on our Pb−Free strategy  
and soldering details, please download the  
ON Semiconductor Soldering and Mounting  
Techniques Reference Manual, SOLDERRM/D.  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice  
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All  
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights  
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer  
purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,  
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death  
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal  
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMENT:  
N. American Technical Support: 800−282−9855 Toll Free  
USA/Canada  
ON Semiconductor Website: http://onsemi.com  
Order Literature: http://www.onsemi.com/litorder  
Literature Distribution Center for ON Semiconductor  
P.O. Box 61312, Phoenix, Arizona 85082−1312 USA  
Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada  
Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada  
Email: orderlit@onsemi.com  
Japan: ON Semiconductor, Japan Customer Focus Center  
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051  
Phone: 81−3−5773−3850  
For additional information, please contact your  
local Sales Representative.  
NL27WZ126/D  

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