NLAS325_06 [ONSEMI]
Dual SPST Analog Switch, Low Voltage, Single Supply; 双SPST模拟开关,低电压,单电源型号: | NLAS325_06 |
厂家: | ONSEMI |
描述: | Dual SPST Analog Switch, Low Voltage, Single Supply |
文件: | 总10页 (文件大小:104K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
NLAS325
Dual SPST Analog Switch,
Low Voltage, Single Supply
The NLAS325 is a dual SPST (Single Pole, Single Throw) switch,
similar to 1/2 a standard 4066. The device permits the independent
selection of 2 analog/digital signals. Available in the Ultra−Small 8
package.
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The use of advanced 0.6 ꢀ CMOS process, improves the R
ON
resistance considerably compared to older higher voltage
technologies.
MARKING
DIAGRAM
8
Features
8
• On Resistance is 20 ꢁ Typical at 5.0 V
• Matching is < 1.0 ꢁ Between Sections
• 2.0−6.0 V Operating Range
A9 M G
1
G
US8
US SUFFIX
CASE 493
• Ultra Low < 5.0 pC Charge Injection
• Ultra Low Leakage < 1.0 nA at 5.0 V, 25°C
• Wide Bandwidth > 200 MHz, −3.0 dB
• 2000 V ESD (HBM)
1
A9
M
G
= Device Code
= Date Code*
= Pb−Free Package
• R Flatness "6.0 ꢁ at 5.0 V
ON
(Note: Microdot may be in either location)
• US8 Package
• Independent Enables; One Positive, One Negative
• Pb−Free Package is Available
*Date Code orientation may vary depending upon
manufacturing location.
PIN ASSIGNMENT
1
2
NO1
COM1
IN2
3
4
5
NO1
COM1
IN2
1
2
3
4
8
7
6
5
V
CC
GND
NC2
COM2
IN1
6
7
8
IN1
V
CC
COM2
NC2
FUNCTION TABLE
On/Off
Analog
Analog
GND
Enable Input
Switch 1
Switch 2
L
Off
On
On
Off
H
Figure 1. Pinout
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
April, 2006 − Rev. 6
NLAS325/D
NLAS325
MAXIMUM RATINGS
Symbol
Parameter
Value
*0.5 to )7.0
*0.5 to )7.0
*0.5 to )7.0
*50
Unit
V
V
V
V
DC Supply Voltage
CC
I
DC Input Voltage
V
DC Output Voltage
V
O
I
I
I
I
I
DC Input Diode Current
DC Output Diode Current
DC Output Sink Current
DC Supply Current per Supply Pin
DC Ground Current per Ground Pin
Storage Temperature Range
V < GND
mA
mA
mA
mA
mA
°C
IK
I
V
< GND
O
*50
OK
O
$50
$100
CC
GND
$100
T
T
T
ꢂ
*65 to )150
260
STG
Lead Temperature, 1.0 mm from Case for 10 Seconds
Junction Temperature under Bias
Thermal Resistance (Note 1)
°C
L
J
)150
°C
250
°C/W
mW
JA
P
Power Dissipation in Still Air at 85°C
Moisture Sensitivity
250
D
MSL
Level 1
F
R
Flammability Rating
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
V
ESD
ESD Withstand Voltage
Human Body Model (Note 2)
Machine Model (Note 3)
> 2000
> 200
N/A
V
Charged Device Model (Note 4)
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2−ounce copper trace with no air flow.
2. Tested to EIA/JESD22−A114−A.
3. Tested to EIA/JESD22−A115−A.
4. Tested to JESD22−C101−A.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
2.0
Max
5.5
Unit
V
V
V
V
T
DC Supply Voltage
CC
IN
Digital Select Input Voltage
GND
GND
*55
5.5
V
Analog Input Voltage (NC, NO, COM)
Operating Temperature Range
Input Rise or Fall Time, SELECT
V
CC
V
IS
)125
°C
ns/V
A
t , t
V
CC
V
CC
= 3.3 V $ 0.3 V
= 5.0 V $ 0.5 V
0
0
100
20
r
f
DEVICE JUNCTION TEMPERATURE VERSUS
TIME TO 0.1% BOND FAILURES
FAILURE RATE OF PLASTIC = CERAMIC
UNTIL INTERMETALLICS OCCUR
Junction
Temperature °C
Time, Hours
1,032,200
419,300
178,700
79,600
Time, Years
117.8
47.9
80
90
1
100
110
120
130
140
20.4
9.4
1
10
100
1000
37,000
4.2
TIME, YEARS
17,800
2.0
Figure 2. Failure Rate vs. Time Junction Temperature
8,900
1.0
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2
NLAS325
DC CHARACTERISTICS − Digital Section (Voltages Referenced to GND)
Guaranteed Limit
Symbol
Parameter
Condition
V
*555C to 255C
t855C t1255C Unit
CC
V
IH
Minimum High−Level Input
Voltage, Select Inputs
2.0
2.5
3.0
4.5
5.5
1.5
1.5
1.5
V
1.9
1.9
1.9
2.1
2.1
2.1
3.15
3.85
3.15
3.85
3.15
3.85
V
IL
Maximum Low−Level Input
Voltage, Select Inputs
2.0
2.5
3.0
4.5
5.5
0.5
0.6
0.5
0.6
0.5
0.6
V
0.9
0.9
0.9
1.35
1.65
1.35
1.65
1.35
1.65
I
I
Maximum Input Leakage
Current, Select Inputs
V
= 5.5 V or GND
0 V to 5.5 V
$0.2
$2.0
$2.0
ꢀ A
ꢀ A
IN
IN
Maximum Quiescent Supply
Current
Select and V = V or GND
5.5
4.0
4.0
8.0
CC
IS
CC
DC ELECTRICAL CHARACTERISTICS − Analog Section
Guaranteed Limit
Symbol
Parameter
Condition
V
*555C to 255C t855C t1255C Unit
CC
R
Maximum “ON” Resistance
(Figures 16 − 22)
V
V
= V or V
2.5
3.0
4.5
5.5
85
45
30
25
95
50
35
30
105
ꢁ
ON
IN
IL
IH
= GND to V
55
IS
CC
I
IN
I v 10 mA
40
35
R
ON Resistance Flatness
(Figures 16 − 22)
V
= V or V
IH
4.5
4.0
4.0
5.0
ꢁ
FLAT(ON)
IN
IL
I
IN
I v 10 mA
V
IS
= 1.0 V, 2.0 V, 3.5 V
I
I
NO or NC Off Leakage
Current (Figure 8)
V
V
= V or V
IH
5.5
5.5
1.0
1.0
10
10
100
100
nA
nA
NC(OFF)
IN
IL
or V = 1.0 V 4.5 V
COM
NO(OFF)
NO
NC
I
COM ON Leakage Current
(Figure 8)
V
V
V
V
= V or V
IL IH
COM(ON)
IN
1.0 V or 4.5 V with V floating or
NO
NO
COM
NC
1.0 V or 4.5 V with V floating
NO
= 1.0 V or 4.5 V
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3
NLAS325
AC ELECTRICAL CHARACTERISTICS (Input t = t = 3.0 ns)
r
f
Guaranteed Maximum Limit
V
V
*555C to 255C
t855C
t1255C
CC
IS
Symbol
Parameter
Turn−On Time
Test Conditions
R = 300 ꢁꢃ C = 35 pF
(V)
(V) Min Typ* Max Min Max Min Max Unit
t
t
t
2.5
3.0
4.5
5.5
2.0
2.0
3.0
3.0
5.0
5.0
2.0
2.0
23
16
11
35
24
16
14
5.0
5.0
2.0
2.0
38
27
19
17
5.0
5.0
2.0
2.0
41
30
22
20
ns
ns
ns
ON
L
L
(Figures 11 and 12)
(Figures 4 and 5)
9.0
Turn−Off Time
R = 300 ꢁꢃ C = 35 pF
2.5
3.0
4.5
5.5
2.0
2.0
3.0
3.0
1.0
1.0
1.0
1.0
7.0
5.0
4.0
3.0
12
10
1.0
1.0
1.0
1.0
15
13
1.0
1.0
1.0
1.0
18
16
12
11
OFF
BBM
L
L
(Figures 11 and 12)
(Figures 4 and 5)
6.0
5.0
9.0
8.0
Minimum Break−Before−Make
Time
V
IS
= 3.0 V (Figure 3)
2.5
3.0
4.5
5.5
2.0
2.0
3.0
3.0
1.0
1.0
1.0
1.0
12
11
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
R = 300 ꢁꢃ C = 35 pF
L
L
6.0
5.0
*Typical Characteristics are at 25°C.
Typical @ 25, V = 5.0 V
CC
C
C
C
C
Maximum Input Capacitance, Select Input
Analog I/O (switch off)
8.0
10
10
20
pF
IN
or C
NO
NC
Common I/O (switch off)
COM
(ON)
Feedthrough (switch on)
ADDITIONAL APPLICATION CHARACTERISTICS (Voltages Referenced to GND Unless Noted)
V
CC
Typical
Symbol
Parameter
Condition
(V)
25°C
Unit
BW
Maximum On−Channel −3.0 dB
Bandwidth or Minimum Frequency
Response (Figure 10)
V
V
= 0 dBm
3.0
4.5
5.5
145
170
175
MHz
IN
centered between V and GND
IN
CC
(Figure 6)
V
V
Maximum Feedthrough On Loss
V
V
= 0 dBm @ 100 kHz to 50 MHz
3.0
4.5
5.5
*2.0
*2.0
*2.0
dB
dB
pC
ONL
IN
centered between V and GND
IN
CC
(Figure 6)
Off−Channel Isolation (Figure 9)
f = 100 kHz; V = 1.0 V RMS
3.0
4.5
5.5
*93
*93
*93
ISO
IS
V
IN
centered between V and GND
CC
(Figure 6)
Q
Charge Injection Select Input to
Common I/O (Figure 14)
V
V
GND, F = 20 kHz
IN = CC to IS
t = t = 3.0 ns
r
3.0
5.5
1.5
3.0
f
R
= 0 ꢁ, C = 1000 pF
L
IS
Q = C * ꢄ V
L
OUT
(Figure 7)
THD
VCT
Total Harmonic Distortion THD +
Noise (Figure 13)
F
= 20 Hz to 100 kHz, R = Rgen = 600 ꢁ, C = 50 pF
%
IS
L
L
V
= 5.0 V sine wave
5.5
0.1
IS
PP
Channel−to−Channel Crosstalk
f = 100 kHz; V = 1.0 V RMS
dB
IS
V
centered between V and GND
5.5
3.0
*90
*90
IN
CC
(Figure 6)
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4
NLAS325
V
CC
DUT
Input
V
CC
Output
GND
V
OUT
0.1 ꢀ F
t
BMM
300 ꢁ
35 pF
90% of V
90%
OH
Output
Switch Select Pin
GND
Figure 3. tBBM (Time Break−Before−Make)
V
CC
50%
50%
90%
Input
DUT
0 V
V
CC
Output
V
OUT
V
0.1 ꢀ F
OH
Open
90%
300 ꢁ
35 pF
Output
V
OL
Input
t
t
OFF
ON
Figure 4. tON/tOFF
V
CC
V
CC
50%
50%
Input
DUT
0 V
300 ꢁ
Output
V
OUT
V
OH
Open
35 pF
Output
V
10%
10%
OL
Input
t
t
ON
OFF
Figure 5. tON/tOFF
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5
NLAS325
50 ꢁ
DUT
Reference
Transmitted
Input
Output
50 ꢁ Generator
50 ꢁ
Channel switch control/s test socket is normalized. Off isolation is measured across an off channel. On loss is
the bandwidth of an On switch. V , Bandwidth and V are independent of the input signal direction.
ISO
ONL
V
V
OUT
IN
= Off Channel Isolation = 20 Log ǒ Ǔ
V
V
for V at 100 kHz
IN
ISO
V
OUT
= On Channel Loss = 20 Log ǒ Ǔ
for V at 100 kHz to 50 MHz
ONL
IN
V
IN
Bandwidth (BW) = the frequency 3.0 dB below V
ONL
V
CT
= Use V
setup and test to all other switch analog input/outputs terminated with 50 ꢁ
ISO
Figure 6. Off Channel Isolation/On Channel Loss (BW)/Crosstalk
(On Channel to Off Channel)/VONL
DUT
V
CC
V
IN
Output
Open
GND
C
L
Output
Off
ꢄ V
OUT
Off
On
V
IN
Figure 7. Charge Injection: (Q)
100
10
1
I
COM(ON)
0.1
0.01
I
COM(OFF)
V
CC
= 5.0 V
85
I
NO(OFF)
0.001
−55
−20
25
70
125
TEMPERATURE (°C)
Figure 8. Switch Leakage vs. Temperature
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6
NLAS325
+15
+10
+5
0
0
1.0
Bandwidth
(ON−RESPONSE)
2.0
3.0
−20
−40
0
PHASE SHIFT
4.0
5.0
−5
Off Isolation
−10
−15
−20
−25
6.0
−60
7.0
V
CC
= 5.0 V
8.0
−80
T = 25°C
A
V
= 5.0 V
CC
9.0
−30
−35
100 300
T = 25°C
A
10.0
0.01
−100
0.1
1
10
0.01
0.1
1
10
100 200
FREQUENCY (MHz)
FREQUENCY (MHz)
Figure 9. Off−Channel Isolation
Figure 10. Typical Bandwidth and Phase Shift
30
25
20
15
10
30
25
20
15
10
5
V
CC
= 4.5 V
t
(ns)
ON
t
ON
t
t
(ns)
OFF
5
0
OFF
0
−55
2.5
3
3.5
V
4
4.5
5
−40
25
Temperature (°C)
85
125
(VOLTS)
CC
Figure 11. tON and tOFF vs. VCC at 255C
Figure 12. tON and tOFF vs. Temp
1
3.0
2.5
2.0
1.5
1.0
0.5
V
V
= 3.0 V
= 3.6 V
INpp
CC
V
CC
= 5 V
0.1
V
INpp
= 5.0 V
= 5.5 V
V
CC
V
CC
= 3 V
0
0.01
−0.5
1
10
FREQUENCY (kHz)
100
0
1
2
3
4
5
V
COM
(V)
Figure 13. Total Harmonic Distortion
Plus Noise vs. Frequency
Figure 14. Charge Injection vs. COM Voltage
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7
NLAS325
100
80
60
40
20
0
100
10
V
= 2.0 V
CC
1
0.1
V
CC
= 2.5 V
0.01
V
= 3.0 V
V
= 3.0 V
CC
CC
V
= 4.0 V
5.0
0.001
0.0001
CC
V
CC
= 5.0 V
V
CC
= 5.5 V
3.0
0.00001
0.0
1.0
2.0
4.0
6.0
−40
−20
0
20
60
80
100
120
Temperature (°C)
V
IS
(VDC)
Figure 15. ICC vs. Temp, VCC = 3.0 V and 5.0 V
Figure 16. RON vs. VCC, Temp = 255C
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
125°C
25°C
25°C
−55°C
−55°C
85°C
85°C
125°C
0.0
0.5
1.0
1.5
(VDC)
2.0
2.5
0.0
0.5
1.0
1.5
V (VDC)
IS
2.0
2.5
3.0
V
IS
Figure 17. RON vs Temp, VCC = 2.0 V
Figure 18. RON vs. Temp, VCC = 2.5 V
50
45
40
35
30
25
20
15
10
5
30
25
20
15
10
5
125°C
125°C
85°C
25°C
85°C
25°C
−55°C
−55°C
0.5
0
0.0
0
1.0
1.5
2.0
(VDC)
2.5
3.0
3.5
0.0 0.5
1.0 1.5
2.0 2.5
(VDC)
3.0 3.5
4.0 4.5
V
IS
V
IS
Figure 20. RON vs. Temp, VCC = 4.5 V
Figure 19. RON vs. Temp, VCC = 3.0 V
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8
NLAS325
25
20
15
10
5
25
125°C
20
15
10
5
125°C
25°C
25°C
−55°C
−55°C
85°C
85°C
0
0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
V
IS
(VDC)
V
IS
(VDC)
Figure 21. RON vs. Temp, VCC = 5.0 V
Figure 22. RON vs. Temp, VCC = 5.5 V
ORDERING INFORMATION
Device Nomenclature
Circuit
Indicator
Device
Function
Package
Suffix
Device
Order Number
Tape and
Reel Size†
Technology
Package Type
178 mm (7″)
3000 Unit
NLAS325US
NL
NL
AS
325
325
US
US8
US8
(Pb−Free)
178 mm (7″)
3000 Unit
NLAS325USG
AS
USG
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specification Brochure, BRD8011/D.
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9
NLAS325
PACKAGE DIMENSIONS
US8
US SUFFIX
CASE 493−02
ISSUE B
−X−
−Y−
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
A
J
8
5
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION “A” DOES NOT INCLUDE MOLD
FLASH, PROTRUSION OR GATE BURR.
MOLD FLASH. PROTRUSION AND GATE
BURR SHALL NOT EXCEED 0.140 MM
(0.0055”) PER SIDE.
DETAIL E
4. DIMENSION “B” DOES NOT INCLUDE
INTER−LEAD FLASH OR PROTRUSION.
INTER−LEAD FLASH AND PROTRUSION
SHALL NOT E3XCEED 0.140 (0.0055”) PER
SIDE.
B
L
5. LEAD FINISH IS SOLDER PLATING WITH
THICKNESS OF 0.0076−0.0203 MM.
(300−800 “).
6. ALL TOLERANCE UNLESS OTHERWISE
SPECIFIED 0.0508 (0.0002 “).
1
4
R
S
G
P
U
MILLIMETERS
INCHES
DIM
A
B
C
D
F
G
H
J
K
L
M
N
P
MIN
1.90
2.20
0.60
0.17
0.20
0.50 BSC
0.40 REF
0.10
MAX
2.10
2.40
0.90
0.25
0.35
MIN
MAX
0.083
0.094
0.035
0.010
0.014
0.075
0.087
0.024
0.007
0.008
0.020 BSC
0.016 REF
0.004
C
H
−T−
SEATING
PLANE
0.10 (0.004)
T
K
D
N
M
R 0.10 TYP
M
0.10 (0.004)
T
X Y
0.18
0.10
3.20
6
0.007
0.004
0.126
6
0.00
3.00
0
0.000
0.118
0
V
_
_
_
_
5
10
5
10
_
_
_
_
0.23
0.23
0.37
0.60
0.34
0.33
0.47
0.80
0.010
0.009
0.015
0.024
0.013
0.013
0.019
0.031
R
S
U
V
F
DETAIL E
0.12 BSC
0.005 BSC
SOLDERING FOOTPRINT*
3.8
0.15
1.8
0.07
0.50
0.0197
0.30
0.012
1.0
0.0394
mm
inches
ǒ
Ǔ
SCALE 8:1
*For additional information on our Pb−Free strategy
and soldering details, please download the
ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
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