NLAS4717FCT1 [ONSEMI]
4.5 ohm High Bandwidth, Dual SPDT Analog Switch; 4.5欧姆的高带宽，双路SPDT模拟开关
| 型号： | NLAS4717FCT1 |
| 厂家： | 
ONSEMI |
| 描述： | 4.5 ohm High Bandwidth, Dual SPDT Analog Switch |
| 文件： | 总10页 (文件大小：96K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NLAS4717
4.5 W High Bandwidth, Dual
SPDT Analog Switch
The NLAS4717 is an advanced CMOS analog switch fabricated in
sub−micron silicon gate CMOS technology. The device is a dual
independent Single Pole Double Throw (SPDT) switch featuring two
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low R
of 4.5 ꢀ at 3.0 V.
DS(on)
The device also features guaranteed Break−Before−Make (BBM)
switching, assuring the switches never short the driver.
The NLAS4717 is available in two small size packages:
MARKING
DIAGRAMS
♦ Micro10:
3.0 x 5.0 mm
♦ Flip−Chip−10: 2.0 x 1.5 mm
Features
4717
AYWW G
G
A1
• Low R
: 4.5 ꢀ @ 3.0 V
DS(on)
FLIP−CHIP−10
CASE 489AA
A1
• Matching Between the Switches 0.5
ꢀ
• Wide Low Voltage Range: 1.8 V to 5.5 V
• High Bandwidth > 40 MHz
10
4717
AYW G
G
• 1.65 V to 5.5 V Operating Range
• Low Threshold Voltages on Pins 4 and 8 (CTRL Pins)
Micro10
CASE 846B
• Ultra−Low Charge Injection ≤ 6.0 pC
1
• Low Standby Current – I = 1.0 nA (Max) @ T = 25°C
CC
A
A
Y
= Assembly Location
= Year
• OVT* on Pins 4 and 8 (CTRL Logic Pins)
• Pb−Free Packages are Available
W, WW = Work Week
G
= Pb−Free Package
Typical Applications
• Cell Phones
• PDAs
FUNCTION TABLE
NO_
IN_
NC_
• MP3s
• Digital Still Cameras
0
1
OFF
ON
ON
OFF
Important Information
• ESD Protection:
ORDERING INFORMATION
HBM = 2000 V, MM = 200 V
†
• Latchup Max Rating: 200 mA (Per JEDEC EIA/JESD78)
• Pin−to−Pin Compatible with MAX4717
Device
Package
Shipping
NLAS4717FCT1
Flip−Chip−10
3000 /
Tape & Reel
*OVT
NLAS4717FCT1G Flip−Chip−10
(Pb−Free)
3000 /
Tape & Reel
• Overvoltage Tolerance (OVT) specific pins to operate higher than
normal supply voltages, with no damage to the devices or to signal
integrity.
4000 /
Tape & Reel
NLAS4717MR2
Micro10
NLAS4717MR2G
Micro10
4000 /
(Pb−Free)
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
April, 2006 − Rev. 8
NLAS4717/D
NLAS4717
GND
B
1
VCC
NO1
NO2
1
2
3
4
5
10
9
NC2
IN2
NC1
IN1
C
A
1
1
COM2
IN2
C
C
C
A
2
A
3
A
4
2
3
4
COM1
IN1
8
COM2
NO2
COM1
NO1
NC2
GND
7
B
4
NC1
6
VCC
Micro10
(Top View)
Flip−Chip−10
(Top View)
Figure 1. Device Circuit Diagrams and Pin Configurations
MAXIMUM RATINGS
Symbol
Parameter
Value
*0.5 to )7.0
*0.5 v V v V )0.5
Unit
V
V+
Positive DC Supply Voltage
V
V
Analog Input Voltage (V , V , or V
) (Note 1)
V
IS
IN
IK
NO NC
COM
IS
CC
Digital Select Input Voltage
*0.5 v V v)7.0
V
I
I
DC Current, Into or Out of Any Pin (Continuous)
Peak Current (10% Duty Cycle)
$100
$200
mA
mA
I
PK
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Signal voltage on NC, NO, and COM exceeding VCC or GND are clamped by the internal diodes. Limit forward diode current to maximum
current rating.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
1.8
Max
5.5
Unit
V
V+
DC Supply Voltage
V
V
Digital Select Input Voltage
GND
GND
−40
5.5
V
IN
IS
Analog Input Voltage (NC, NO, COM)
Operating Temperature Range
Input Rise or Fall Time, SELECT
V
CC
V
T
+85
°C
ns/V
A
t , t
r
V
CC
V
CC
= 3.3 V $ 0.3 V
= 5.0 V $ 0.5 V
0
0
100
20
f
ANALOG SWITCH DC CHARACTERISTICS
−40°C to +85°C
Min
V x 0.55
CC
Max
Symbol
Parameter
Condition
V
(V)
Unit
CC
V
IH
Input Logic High Voltage
V
I
= 0.1 V
1.65 to 2.2
2.7 to 3.6
4.5 to 5.5
−
−
−
V
OUT
≤ 20 ꢁ A
V
CC
x 0.5
OUT
2.0
V
IL
Input Logic Low Voltage
V
= −V − 0.1 V
1.65 to 2.2
2.7 to 3.6
4.5 to 5.5
−
−
−
V
V
x 0.2
V
OUT
CC
CC
I
≤ 20 ꢁ A
x 0.2
OUT
CC
0.8
I
Input Leakage Current
Power Supply Range
Supply Current
V
V
– V or GND
5.0
−
−100
1.65
+100
5.5
nA
V
IN
IN
CC
V
All
CC
CC
I
= V or GND
1.8
3.3
5.0
−
−
−
1.0
1.0
1.0
ꢁ
A
IN
CC
I
= 0 ꢁ A
OUT
V
IS
Analog Signal Range
Key parameter
−
0
V
CC
V
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2
NLAS4717
ANALOG SWITCH CHARACTERISTICS − Digital Section (Voltages Referenced to GND)
−40°C to +85°C
Min
Typ
Max
Symbol
Parameter
Condition
V
CC
(V)
Unit
R
ON Resistance
(Note 2)
V
= 3.0 V
3.0
−
4.5
ꢀ
ON
CC
I
= 10 mA
COM
V
NO
V
NO
V
NO
V
NO
or V = V or V
NC IH
IL
IL
IL
IL
V
CC
= 5.0 V
5.0
3.6
5.5
3.0
−
−
3.5
0.4
I
= 10 mA
COM
or V = V or V
NC
IH
ꢂ
R
ON Resistance
Match Between Channels
(Note 2 and 3)
V
CC
= 3.6 V
0.1
ꢀ
ON
I
= 10 mA
COM
or V = V or V
NC
IH
V
CC
= 5.5 V
I
= 10 mA
COM
or V = V or V
NC
IH
R
ON Resistance
Flatness
I
= 10 mA
−
1.5
ꢀ
FLAT[ON]
COM
V
IS
= 0 to V
CC
(Note 4)
I
= 10 mA
5.5
3.6
−
1.36
+1.0
COM
V
= 0 to V
CC
IS
I
NO_, NC_
Off−Leakage Current
(Note 5)
V
CC
= 3.6 V
−1.0
0.01
0.01
0.01
0.01
nA
NO_[OFF]
I
V
= 0.3 V or 3.3 V
NC_[OFF]
COM
V
or V = 0.3 V or 3.3 V
NC
NO
V
CC
= 5.5 V
5.5
3.6
5.5
−1.0
−2.0
−2.0
+1.0
+2.0
+2.0
V
= 0 V or 5.0 V
COM
V
or V = 0 V or 5.0 V
NC
NO
I
COM_
On−Leakage Current
(Note 5)
V
CC
= 3.6 V
nA
COM_[ON]
V
= 0.3 V or 3.3 V
COM
V
or V = 0.3 V or 3.3 V
NC
NO
V
CC
= 5.5 V
V
COM
= 0 V or 5.0 V
V
NO
or V = 0 V or 5.0 V
NC
ANALOG SWITCH AC CHARACTERISTICS
−40°C to +85°C
Min
Typ
Max
Symbol
Parameter
Condition
V
CC
(V)
Unit
t
Turn−On Time
V
NC_
, V
NO_
= V or V
IL
1.8 to 5.5
−
−
30
nS
ON
IH
R = 300 ꢀ, C = 35 pF
L
L
V
IN[x]
= V or V
IH IL
t
Turn−Off Time
V
NC_
, V
NO_
= V or V
IL
1.8 to 5.5
−
−
40
nS
OFF
IH
R = 300 ꢀ, C = 35 pF
L
L
V
IN[x]
= V or V
IH IL
t
Break−Before−Make
Time Delay
V
, V = 1.5 V
NO_
−
−
−
−
8.0
−
nS
nS
BBM
NC_
R = 300 ꢀ, C = 35 pF
L
L
(Note 5)
t
Skew
R
= 39 ꢀ, C = 50 pF
0.15
2.0
SKEW
S
L
(Note 5)
2. R characterized for V range (1.65 V to 5.5 V).
ON
CC
3. ꢂ R = R (MAX) − R (MIN).
ON
ON
ON
4. R
= R (MAX) − R (MIN), measured over V range.
FLAT[ON]
ON ON CC
5. Guaranteed by design.
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3
NLAS4717
ANALOG SWITCH APPLICATION CHARACTERISTICS
−40°C to +85°C
Min
Typ
Max
Symbol
Parameter
Condition
= V to GND
V
(V)
Unit
CC
Q
Charge Injection
V
3.0
5.0
6.0
9.0
pC
IN
CC
R
= 0 ꢀ, C = 1.0 nF
L
In
Q = C − ꢂ V
L
OUT
VISO
Off−Isolation
f = 10 MHz
_, V _ = 1.0 Vp−p
1.65 to 5.5
1.65 to 5.5
1.8 to 5.0
−70
−110
−35
−53
40
dB
V
NO
NC
R = 50 ꢀ, C = 5.0 pF
L
L
f = 1.0 MHz
V
_, V _ = 1.0 Vp−p
NO NC
R = 50 ꢀ, C = 5.0 pF
L
L
VCT
Cross−Talk
f = 10 MHz
dB
V
_, V _ = 1.0 Vp−p
NO NC
R = 50 ꢀ, C = 5.0 pF
L
L
f = 1.0 MHz
V
_, V _ = 1.0 Vp−p
NO NC
R = 50 ꢀ, C = 5.0 pF
L
L
BW
On−Channel
Signal = 0 dB
MHz
−3.0 db Bandwidth
R = 50 ꢀ, C = 5.0 pF
L
L
THD
Total Harmonic Distortion
V
= 2.0 Vp−p,
−
−
0.02
30
%
COM
RL = 600 ꢀ ꢃ T = 25°C
A
C
NO_, NC_
F = 10 MHz
F = 10 MHz
pF
NO_[OFF]
NC_[OFF]
C
OFF−Capacitance
C
NO_, NC_
−
110
pF
NO_[ON]
NC_[ON]
C
ON−Capacitance
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4
NLAS4717
2.0
1.5
1.0
0.5
0.0
3.0
2.5
2.0
1.5
1.0
0.5
0.0
+85°C
+25°C
−40°C
+85°C
+25°C
−40°C
0.0
1.0
2.0
V
3.0
4.0
5.0
0.0
0.5
1.0
1.5
(V)
2.0
2.5
3.0
(V)
V
COM
COM
Figure 2. Low RDS(on) @ VCC = 5.0 V
Figure 3. Low RDS(on) @ VCC = 3.0 V
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
3.0 V
5.0 V
−40C
+25C
+85C
−40C
+25C
+85C
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 4. Delta RDS(on) @ VCC = 5.0 V
Figure 5. Delta RDS(on) @ VCC = 3.0 V
8
6
1
4
5.0 V
3.0 V
2
0
0.1
−2
−4
−6
−8
−10
3.0 V
0.01
0.0
1.0
2.0
V
3.0
4.0
5.0
10
100
1000
10000
100000
(V)
FREQUENCY (Hz)
COM
Figure 6. Charge Injection
Figure 7. Total Harmonic Distortion
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5
NLAS4717
20
0
5
V
CC
= 1.65 V to 5.5 V
Bandwidth
−3 dB
−20
−40
−60
−80
−100
−120
−140
0
Cross−Talk
−5
V
= 1.8 V to 5.0 V
CC
OFF−Isolation
0.01
T = −55°C to +125°C
A
−10
0.001
0.1
1
10
100
0.1
1
10
100
(MHz)
(MHz)
Figure 8. Frequency Response
Figure 9. Bandwidth and Phase
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6
NLAS4717
V
CC
DUT
Input
V
CC
Output
GND
V
OUT
0.1 ꢁ F
t
BMM
50 ꢀ
35 pF
90%
90% of V
OH
Output
Switch Select Pin
GND
Figure 10. tBBM (Time Break−Before−Make)
V
CC
Input
50%
50%
90%
DUT
0 V
V
CC
Output
V
OUT
V
0.1 ꢁ F
OH
Open
90%
50 ꢀ
35 pF
Output
V
OL
Input
t
t
OFF
ON
Figure 11. tON/tOFF
V
CC
V
CC
Input
50%
50%
DUT
0 V
50 ꢀ
Output
V
OUT
V
OH
Open
35 pF
Output
V
10%
10%
OL
Input
t
t
ON
OFF
Figure 12. tON/tOFF
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7
NLAS4717
50 ꢀ
DUT
Reference
Input
50 ꢀ Generator
Transmitted
Output
50 ꢀ
Channel switch control/s test socket is normalized. Off isolation is measured across an off channel. On loss is
the bandwidth of an On switch. V , Bandwidth and V are independent of the input signal direction.
ISO
ONL
V
OUT
V
V
= Off Channel Isolation = 20 Log
for V at 100 kHz
ǒ Ǔ
ISO
IN
V
IN
OUT
V
= On Channel Loss = 20 Log
for V at 100 kHz to 50 MHz
ǒ Ǔ
ONL
IN
V
IN
Bandwidth (BW) = the frequency 3.0 dB below V
ONL
V
CT
= Use V
setup and test to all other switch analog input/outputs terminated with 50 ꢀ
ISO
Figure 13. Off Channel Isolation/On Channel Loss (BW)/Crosstalk
(On Channel to Off Channel)/VONL
DUT
V
CC
V
IN
Output
Open
GND
C
L
Output
Off
ꢂ
V
OUT
Off
On
V
IN
Figure 14. Charge Injection: (Q)
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8
NLAS4717
PACKAGE DIMENSIONS
10 PIN FLIP−CHIP
CASE 489AA−01
ISSUE A
NOTES:
4 X
D
A
B
E
1. DIMENSIONING AND TOLERANCING
PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION:
MILLIMETERS.
3. COPLANARITY APPLIES TO SPHERICAL
CROWNS OF SOLDER BALLS.
0.10
C
PIN ONE
CORNER
MILLIMETERS
DIM MIN
MAX
A
−−− 0.650
A1 0.210 0.270
A2 0.280 0.380
A1
A
D
E
1.965 BSC
1.465 BSC
0.250 0.350
0.500 BSC
1.500 BSC
1.000 BSC
0.10
C
b
e
A2
D1
E1
0.075 C
SEATING
PLANE
C
D1
e
C
B
A
10 X
b
E1
0.15
0.05
C
C
A B
1
2
3
4
e
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9
NLAS4717
PACKAGE DIMENSIONS
Micro10
CASE 846B−03
ISSUE D
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
−A−
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION “A” DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE
BURRS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
4. DIMENSION “B” DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION
SHALL NOT EXCEED 0.25 (0.010) PER SIDE.
5. 846B−01 OBSOLETE. NEW STANDARD
846B−02
−B−
K
G
PIN 1 ID
D 8 PL
M
S
S
A
0.08 (0.003)
T B
MILLIMETERS
INCHES
DIM MIN
MAX
3.10
3.10
MIN
MAX
0.122
0.122
0.043
0.012
A
B
C
D
G
H
J
2.90
2.90
0.95
0.20
0.114
0.114
1.10 0.037
0.30 0.008
0.50 BSC
0.020 BSC
0.05
0.10
4.75
0.40
0.15 0.002
0.21 0.004
5.05 0.187
0.70 0.016
0.006
0.008
0.199
0.028
C
0.038 (0.0015)
−T−
SEATING
PLANE
L
K
L
H
J
SOLDERING FOOTPRINT*
1.04
0.041
0.32
0.0126
10X
10X
3.20
4.24
5.28
0.126
0.167 0.208
0.50
mm
inches
ǒ
Ǔ
8X0.0196
SCALE 8:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer
purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
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NLAS4717/D
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