NLAS4783BMN1R2G [ONSEMI]
Triple SPDT 1.0 ohm RON Switch; 三重SPDT 1.0欧姆RON开关
| 型号： | NLAS4783BMN1R2G |
| 厂家： | 
ONSEMI |
| 描述： | Triple SPDT 1.0 ohm RON Switch |
| 文件： | 总10页 (文件大小：86K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NLAS4783B
Triple SPDT 1.0 W RON
Switch
The NLAS4783B is a triple independent low R
SPDT analog
ON
switch with ENABLE. This device is designed for low operating
voltage, high current switching of speaker output for cell phone
applications. It can switch a balanced stereo output. The NLAS4783B
can handle a balanced microphone/speaker/ring−tone generator in a
monophone mode. The device contains a break−before−make feature.
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MARKING
DIAGRAM
Features
16
• Single Supply Operation
1
1.65 to 4.5 V V
CC
NLAB
4783
ALYWG
G
Function Directly from LiON Battery
• Tiny 3 x 3 mm 16−Pin QFN Package
Meets JEDEC MO−220 Specifications
• Low Static Power
• OVT on Logic Address and Enable Inputs
• This is a Pb−Free Device*
QFN−16
CASE 485AE
1
A
L
Y
= Assembly Location
= Wafer Lot
= Year
W = Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
Typical Applications
• Cell Phone Speaker/Microphone Switching
• Ringtone−Chip/Amplifier Switching
• Three Unbalanced (Single−Ended) Switches
• Stereo Balanced (Push−Pull) Switching
PIN CONNECTIONS
Y0 Y1 Vcc
Y
16
15
14
13
Important Information
• ESD Protection:
Human Body Model (HBM) > 8000 V
Machine Model (MM) > 400 V
• Ringtone−Chip/Amplifier Switching
1
2
3
4
12
11
10
9
Z1
Z
X
X1
X0
A
• Continuous Current Rating Through each Switch 300 mA
• Conforms to: JEDEC MO−220, Issue H, Variation VEED−6
• Pin−for−Pin Compatible with MAX4783
Z0
ENABLE
5
6
7
8
NC GND
C
B
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
March, 2006 − Rev. 0
NLAS4783B/D
NLAS4783B
X, Y, or Z
X0, Y0, or Z0
ENABLE
LOGIC
X1, Y1, or Z1
A, B, or C
Figure 1. Input Equivalent Circuit
PIN FUNCTION DESCRIPTION
QFN PIN #
Symbol
Description
15
16
1
Y1
Analog Switch Y Normally Open Input
Analog Switch Y Normally Closed Input
Analog Switch Z Normally Open Input
Analog Switch Z Output
Y0
Z1
2
Z
3
Z0
Analog Switch Z Normally Closed Input
4
ENABLE
Digital Enable Input. Normally connect to GND. Drive to logic high to set all switches off.
No Connection. Not internally connected.
Ground
5
NC
GND
C
6
7
Digital Address C Input
8
B
Digital Address B Input
9
A
Digital Address A Input
10
11
12
13
14
X0
X1
X
Analog Switch X Normally Closed Input
Analog Switch X Normally Open Input
Analog Switch X Output
Y
Analog Switch Y Output
V
Positive Analog and Digital Supply Voltage Input
CC
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2
NLAS4783B
TRUTH TABLE/SWITCH PROGRAMMING
Select Input
C
X
B
X
A
X
Enable Input
H
All Switches Open
X−X0
Y−Y0
Z−Z0
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
X−X1
Y−Y0
Z−Z0
X−X0
Y−Y1
Z−Z0
L
H
H
L
X−X1
Y−Y1
Z−Z0
L
H
L
X−X0
Y−Y0
Z−Z1
H
H
H
H
X−X1
Y−Y0
Z−Z1
L
H
L
X−X0
Y−Y1
Z−Z1
H
H
X−X1
Y−Y1
Z−Z1
H
1. Input and output pins are identical and interchangeable. Both pins can be considered input or output. Bidirectional signal pass.
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
V
Positive DC Supply Voltage
*0.5 to )5.5
CC
V
Analog Input Voltage (V , V , or V
)
*0.5 to V
CC
V
IS
IN
NO
NC
COM
V
Digital Select Input Voltage
*0.5 to )5.5
$300
V
I
Continuous DC Current from COM to NC/NO
mA
mA
mA
anl1
I
Peak Current from COM to NC/NO, 10 Duty Cycles (Note 2)
$500
anl−pk 1
I
Continuous DC Current into COM/NC/NO with Respect to V or GND
$100
clmp
CC
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
2. Defined as 10% ON, 90% off duty cycle.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
1.65
−
Max
Unit
V
V
Positive DC Supply Voltage
4.5
CC
V
Analog Input Voltage (V , V , or V
)
V
V
V
IS
NO
NC
COM
CC
CC
V
Digital Select Input Voltage
−
V
IN
T
Operating Temperature Range
Input Rise or Fall Time, SELECT
*40
85
°C
ns/V
A
t , t
r
V
V
= 1.6−2.7 V
= 3.0−4.5 V
−
−
20
10
f
CC
CC
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3
NLAS4783B
DC CHARACTERISTICS − Digital Section (Voltages Referenced to GND)
Guaranteed Limit
*405C to 255C
t855C
Symbol
Parameter
Condition
V
Unit
CC
V
Minimum High−Level Input
Voltage, Select Inputs
1.65
2.7
3.6
4.3
1.0
1.4
1.8
2.2
1.0
1.4
1.8
2.2
V
IH
V
Maximum Low−Level Input
Voltage, Select Inputs
1.65
2.7
3.6
4.3
0.4
0.5
0.6
0.8
0.4
0.5
0.6
0.8
V
IL
I
Maximum Input Leakage
Current, Select Inputs
V
V
= 4.5 V or GND
= 4.5 V or GND
4.3
$ 0.1
$ 1.0
ꢀ
A
IN
IN
I
Power Off Leakage Current
0
$0.5
$2.0
ꢀ A
ꢀ A
OFF
IN
I
Maximum Quiescent Supply
Current (Note 3)
Select and V = V or GND
1.65 to 4.5
$ 1.0
$ 2.0
CC
IS
CC
DC ELECTRICAL CHARACTERISTICS − Analog Section
Guaranteed Maximum Limit
−405C to 255C
t855C
Min
Max
Min
Max
Symbol
Parameter
NC/NO On−Resistance
Condition
v V or V w V
IH
V
Unit
CC
R
ON
V
V
2.7 − 4.3
1.0
1.2
ꢁ
IN
IS
IL
IN
(Note 3)
= GND to V
CC
I
I v 100 mA
IN
R
FLAT
NC/NO On−Resistance Flatness
(Notes 3, 5)
I
= 100 mA
2.7 − 4.3
0.2
0.2
ꢁ
COM
V
= 0 to V
CC
IS
ꢂ
R
On−Resistance Match Between Channels
(Notes 3 and 4)
V
= 0.5 V ;
CC
= 100 mA
2.7 − 4.3
4.3
0.4
10
0.6
ꢁ
ON
IS
I
COM
I
NC or NO Off Leakage Current (Note 3)
V
= V or V
IH
−10
−10
−100
−100
100
nA
NC(OFF)
IN
IL
I
V
V
or V = 0.3 V
NO NC
NO(OFF)
= 4.0 V
COM
I
COM ON
V
= V or V
IH
4.3
10
100
nA
COM(ON)
IN
IL
Leakage Current
(Note 3)
V
V
0.3 V or 4.0 V with
floating or
NO
NC
V
V
0.3 V or 4.0 V with
floating
NC
NO
V
= 0.3 V or 4.0 V
COM
3. Guaranteed by design. Resistance measurements do not include test circuit or package resistance.
4. ꢂ R − R between NC1 and NC2 or between NO1 and NO2.
R
ON = ON(MAX)
ON(MIN)
5. Flatness is defined as the difference between the maximum and minimum value of on−resistance as measured over the specified analog
signal ranges.
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4
NLAS4783B
AC ELECTRICAL CHARACTERISTICS (Input t = t = 3.0 ns)
r
f
Guaranteed Maximum Limit
*405C to 255C
t855C
V
(V)
V
IS
CC
(V) Min Typ* Max Min Max
Symbol
Parameter
Turn−On Time
Test Conditions
R = 50 ꢁ ꢃ C = 35 pF
Unit
t
2.3 − 4.5
1.5
25
15
27
20
ns
ON
L
L
(Figures 3 and 4)
t
Turn−Off Time
R = 50 ꢁ ꢃ C = 35 pF
2.3 − 4.5
3.0
1.5
ns
ns
OFF
L
L
(Figures 3 and 4)
V = 3.0
IS
t
Minimum Break−Before−Make Time
BBM
1.5
2.0
8.0
R = 300 ꢁ ꢃ C = 35 pF
L
L
(Figure 2)
Typical @ 25, V = 4.5 V
CC
C
Control Pin Input Capacitance
SN Port Capacitance
5.0
75
pF
pF
pF
IN
C
SN
C
D Port Capacitance When Switch is Enabled
240
D
*Typical Characteristics are at 25°C.
ADDITIONAL APPLICATION CHARACTERISTICS (Voltages Referenced to GND Unless Noted)
255C
V
(V)
CC
Typical
Symbol
Parameter
Condition
centered between V and GND
Unit
BW
Maximum On−Channel −3dB
V
1.65 − 4.5
17
MHz
IN
CC
Bandwidth or Minimum Frequency (Figure 5)
Response
V
Maximum Feed−through On Loss
V
V
= 0 dBm @ 100 kHz to 50 MHz
1.65 − 4.5
1.65 − 4.5
1.65 − 4.5
4.5
−0.10
−62
dB
dB
pC
%
ONL
IN
IN
centered between V and GND (Figure 5)
CC
V
Off−Channel Isolation
f = 100 kHz; V = 1 V RMS; C = 5 nF
IS L
ISO
V
centered between V and GND(Figure 5) (Note 6)
CC
IN
Q
Charge Injection Select Input to
Common I/O
V
V
GND, R = 0 ꢁ, C = 1 nF
50
IN = CC to
IS
L
Q = C x ꢂ V
(Figure 6)
OUT
L
THD
VCT
Total Harmonic Distortion THD +
Noise
F
= 20 Hz to 20 kHz, R = R
= 600 ꢁ, C = 50 pF
0.008
−62
IS
L
gen
L
V
= 2 V RMS
IS
Channel−to−Channel Crosstalk
f = 100 kHz; V = 1 V RMS, C = 5 pF, R = 50 ꢁ
1.65 − 4.5
dB
IS
L
L
V
centered between V and GND (Figure 5)
CC
IN
6. Off−Channel Isolation = 20log10 (Vcom/Vno), Vcom = output, Vno = input to off switch.
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5
NLAS4783B
V
CC
DUT
Input
GND
V
Output
CC
V
OUT
0.1 ꢀ F
t
BMM
50 ꢁ
35 pF
90%
90% of V
OH
Output
Switch Select Pin
GND
Figure 2. tBBM (Time Break−Before−Make)
V
CC
Input
50%
50%
90%
DUT
0 V
V
Output
CC
V
OUT
V
0.1 ꢀ F
OH
Open
90%
50 ꢁ
35 pF
Output
V
OL
Input
t
t
OFF
ON
Figure 3. tON/tOFF
V
V
CC
CC
Input
50%
50%
DUT
0 V
50 ꢁ
Output
V
OUT
V
OH
Open
35 pF
Output
V
10%
10%
OL
Input
t
t
ON
OFF
Figure 4. tON/tOFF
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6
NLAS4783B
50 ꢁ
DUT
Reference
Input
50 ꢁ Generator
Transmitted
Output
50 ꢁ
Channel switch control/s test socket is normalized. Off isolation is measured across an off channel. On loss is
the bandwidth of an On switch. V , Bandwidth and V are independent of the input signal direction.
ISO
ONL
V
OUT
= Off Channel Isolation = 20 Log ǒ Ǔ
V
V
for V at 100 kHz
IN
ISO
V
IN
OUT
V
= On Channel Loss = 20 Log ǒ Ǔ
for V at 100 kHz to 50 MHz
ONL
IN
V
IN
Bandwidth (BW) = the frequency 3 dB below V
ONL
V
= Use V
setup and test to all other switch analog input/outputs terminated with 50 ꢁ
ISO
CT
Figure 5. Off Channel Isolation/On Channel Loss (BW)/Crosstalk
(On Channel to Off Channel)/VONL
DUT
V
CC
V
Open
Output
IN
GND
C
L
Output
Off
ꢂ
V
OUT
Off
On
V
IN
Figure 6. Charge Injection: (Q)
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7
NLAS4783B
1.2
1.0
0.8
1.2
1.0
0.8
0.6
0.4
0.2
85°C
25°C
85°C
25°C
−40°C
−40°C
0.6
0.4
0.2
0
0
0.0
0
0.5
1.0 1.5
2.0 2.5 3.0 3.5 4.0
(V)
4.5
0.5
1.0
1.5
(V)
2.0
2.5
3.0
V
V
IN
IN
Figure 8. RON vs. VIN vs. Temperature
@ VCC = 3.0 V
Figure 7. On−Resistance vs. Input Voltage
@ VCC = 4.3 V
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0.008
85°C
25°C
0.007
0.006
0.005
0.004
0.003
0.002
−40°C
0.001
0
0.0
0.5
1.0
1.5
2.0
(V)
2.5
3.0
3.5
4.0
10
100
1000
10000
100000
V
FREQUENCY (Hz)
IN
Figure 9. RON vs. VIN vs. Temperature
@ VCC = 3.6 V
Figure 10. Total Harmonic Distortion vs.
Frequency
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8
NLAS4783B
ORDERING INFORMATION
Device Nomenclature
Circuit
Indicator
Device
Function
Package Tape & Reel
Device Order
Number
†
Suffix
Suffix
Technology
Package Type
Tape & Reel Size
NLAS4783BMN1R2G
NL
AS
4783B
MN1
R2G
QFN
(Pb−Free)
3000 Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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9
NLAS4783B
PACKAGE DIMENSIONS
QFN−16 (3 x 3 x 0.85 mm)
CASE 485AE−01
ISSUE O
D
A
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
B
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.25 AND 0.30 MM FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
5. OUTLINE MEETS JEDEC DIMENSIONS PER
MO−220, VARIATION VEED−6.
PIN 1
LOCATION
E
MILLIMETERS
DIM MIN
0.800 0.900 1.000
A1 0.000 0.025 0.050
NOM
MAX
A
0.15
C
TOP VIEW
A3
b
D
0.200 REF
0.180 0.250 0.300
3.00 BSC
0.15
C
D2 1.250
E
1.40 1.550
3.00 BSC
(A3)
E2 1.250
e
1.40 1.550
0.500 BSC
0.10
0.08
C
C
K
L
0.200
−−−
−−−
A
0.300 0.400 0.500
SEATING
PLANE
16 X
SIDE VIEW
A1
C
D2
e
16X
L
EXPOSED PAD
5
8
NOTE 5
4
9
E2
K
16X
12
1
16
13
16X b
0.10
0.05
C
C
A
B
BOTTOM VIEW
NOTE 3
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
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USA/Canada
ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
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Phone: 81−3−5773−3850
For additional information, please contact your
local Sales Representative.
NLAS4783B/D
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