NLAS5123MUR2G [ONSEMI]
SPDT, 1 ohm RON Switch; SPDT ， 1欧姆RON开关
| 型号： | NLAS5123MUR2G |
| 厂家： | 
ONSEMI |
| 描述： | SPDT, 1 ohm RON Switch |
| 文件： | 总9页 (文件大小：175K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NLAS5123
SPDT, 1 W RON Switch
The NLAS5123 is a low R SPDT analog switch. This device is
ON
designed for low operating voltage, high current switching of speaker
output for cell phone applications. It can switch a balanced stereo
output. The NLAS5123 can handle a balanced microphone/
speaker/ringtone generator in a monophone mode. The device
contains a break−before−make (BBM) feature.
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Features
• Single Supply Operation:
1.65 V to 5.5 V V
CC
1
• Function Directly from LiON Battery
• R Typical = 1.0 ꢀ @ V = 4.5 V
WDFN6
MN SUFFIX
CASE 506AS
ON
CC
• Low Static Power
• These are Pb−Free Devices
Typical Applications
• Cell Phone Speaker/Microphone Switching
• Ringtone−Chip/Amplifier Switching
• Stereo Balanced (Push−Pull) Switching
1
UDFN6
MU SUFFIX
CASE 517AA
Important Information
• Continuous Current Rating Through each Switch ±300 mA
• 1.2 x 1.0 x 0.4P mm 6−Lead Thin DFN Package
MARKING DIAGRAM
W M
G
W
M
G
= Specific Device Code
= Date Code & Assembly Location
= Pb−Free Device
PIN ASSIGNMENTS
1
2
3
6
5
4
NO
GND
NC
IN
V
CC
COM
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
August, 2006 − Rev. 1
NLAS5123/D
NLAS5123
COM
NC
NO
IN
Figure 1. Input Equivalent Circuit
TRUTH TABLE
PIN DESCRIPTION
Pin Name
Description
Control Input
Function
NC, NO, COM
IN
Data Ports
L
NC Connected to COM
NO Connected to COM
Control Input
H
H = HIGH Logic Level.
L = LOW Logic Level.
MAXIMUM RATINGS
Symbol
Rating
Value
Unit
V
V
V
V
Positive DC Supply Voltage
−0.5 to +6.0
CC
IS
Analog Input Voltage (V , V , or V
)
−0.5 to V +0.5
V
NO NC
COM
CC
Digital Select Input Voltage
−0.5 to +6.0
±300
V
IN
I
I
I
Continuous DC Current from COM to NC/NO
mA
mA
mA
anl1
anl−pk1
clmp
Peak Current from COM to NC/NO, 10 Duty Cycles (Note 1)
±500
Continuous DC Current into COM/NC/NO with respect to V or GND
±100
CC
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. Defined as 10% ON, 90% off duty cycle.
RECOMMENDED OPERATING CONDITIONS
Symbol
Rating
Min
1.65
0
Max
Unit
V
V
V
V
Positive DC Supply Voltage
5.5
CC
IS
Analog Input Voltage (NC, NO, COM)
Digital Select Input Voltage (IN)
Operating Temperature Range
Input Rise or Fall Time, SELECT
V
V
CC
CC
0
V
V
IN
T
A
−40
85
°C
ns/V
t , t
V
CC
V
CC
= 3.0 V
= 5.5 V
20
10
r
f
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2
NLAS5123
DC ELECTRICAL CHARACTERISTICS
T
A
= +25°C
T = −40°C to +85°C
A
V
CC
(V)
Min
Typ
Max
Min
Max
Symbol
Parameter
Test Conditions
Unit
V
IH
HIGH Level
Input Voltage
2.7
4.5
2.0
2.4
V
V
IL
LOW Level
Input Voltage
2.7
4.5
0.6
0.8
V
I
I
Input Leakage Current
0 v V v 5.5 V
0−5.5
±0.1
±1
ꢁ
A
IN
IN
OFF State Leakage
Current (Note 7)
0 v NO, NC, COM v V
5.5
−2.0
−4.0
+2.0
±20
nA
OFF
CC
I
ON State Leakage
Current (Note 7)
0 v NO, NC, COM v V
5.5
2.7
4.5
5.5
+4.0
1.7
±40
2.0
1.2
1.0
nA
ON
CC
R
Switch On Resistance
(Note 2)
I
= 100 mA,
IS
ꢀ
ON
O
V
= 0 V to V
CC
I
= 100 mA,
IS
1.0
O
V
= 0 V to V
CC
I
Quiescent Supply
Current
All Channels ON or OFF
V
IN
= V or GND, I = 0
OUT
0.5
ꢁ A
CC
CC
Analog Signal Range
ꢂ
R
On Resistance Match
Between Channels
(Notes 2, 3, 4)
I
= 100 mA,
2.7
4.5
0.15
0.12
ꢀ
ꢀ
ON
A
V
= 1.5 V
IS
I
= 100 mA,
0.15
0.4
A
V
= 2.5 V
IS
R
On Resistance
Flatness (Notes 2, 3, 5)
I
= 100 mA,
2.7
4.5
0.4
0.3
flat
A
V
= 0 V to V
IS
CC
CC
I
A
= 100 mA,
V
= 0 V to V
IS
2. Measured by the voltage drop between NC/NO and COM pins at the indicated current through the switch. On Resistance is determined by
the lower of the voltages on the two (NO, NC, COM).
3. Parameter is characterized but not tested in production.
4. ꢂ R = R max − R min measured at identical V , temperature and voltage levels.
ON
ON
ON
CC
5. Flatness is defined as the difference between the maximum and minimum value of On Resistance over the specified range of conditions.
6. Guaranteed by Design.
7. This parameter is guaranteed by design but not tested. The bus switch contributes no propagation delay other than the RC delay of the On
Resistance of the switch and the 50 pF load capacitance, when driven by an ideal voltage source (zero output impedance).
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3
NLAS5123
AC ELECTRICAL CHARACTERISTICS
T
= +25°C
T = −40°C to +85°C
A
A
V
(V)
Figure
#
CC
Min
Typ
Max
Min
Max
Symbol
Parameter
Test Conditions
Unit
t
t
Propagation Delay
V
V
= V or V
2.7
4.5
2.0
0.3
ns
PHL
PLH
IN
IH
IL
Bus−to−Bus (Note 9)
t
t
t
Output Enable Time
Turn On Time
(COM to NO or NC)
= 1.5 V,
2.7
4.5
30
20
35
25
ns
ns
ns
3, 4
3, 4
2
ON
IS
L
R = 50 ꢀ, C = 35 pF
L
V
IS
= 3.0 V,
R = 50 ꢀ, C = 35 pF
L
L
Output Disable Time
Turn Off Time
(COM to NO, NC)
V
IS
= 1.5V,
2.7
4.5
20
15
25
20
OFF
BBM
R = 50 ꢀ, C = 35 pF
L
L
V
IS
= 3.0 V,
R = 50 ꢀ, C = 35 pF
L
L
Break Before Make Time
(Note 8)
V
IS
= 1.5V,
R = 50 ꢀ, C = 35 pF
2.7
4.5
0.5
0.5
0.5
0.5
L
L
Q
O
Charge Injection
(Note 8)
C = 1.0 nF, V
GEN
= 0 V
2.7
4.5
26
48
pC
dB
6
5
7
8
9
L
GEN
R
= 0 ꢀ
Off Isolation (Note 10)
R = 50 ꢀ
2.7 −
5.5
−62
−70
55
IRR
L
f = 1.0 MHz
X
talk
Crosstalk
R = 50 ꢀ
2.7 −
5.5
dB
L
f = 1.0 MHz
BW
−3 dB Bandwidth
R = 50 ꢀ
L
2.7 −
5.5
MHz
%
THD
Total Harmonic
Distortion (Note 8)
R = 600 ꢀ
2.7 −
5.5
0.012
L
0.5 V
P−P
f = 20 Hz to 20 kHz
8. Guaranteed by Design.
9. This parameter is guaranteed by design but not tested. The bus switch contributes no propagation delay other than the RC delay of the On
Resistance of the switch and the 50 pF load capacitance, when driven by an ideal voltage source (zero output impedance).
10.Off Isolation = 20 log [V
/V
].
10
COM NO,NC
CAPACITANCE (Note 11)
Symbol
Parameter
Select Pin Input Capacitance
Test Conditions
= 0 V, f = 1 MHz
= 4.5 V, f = 1 MHz
= 4.5 V, f = 1 MHz
Typ
2.0
20
Max
Unit
pF
C
C
C
V
CC
V
CC
V
CC
IN
NC, NO Port Off Capacitance
pF
NC/NO
COM
COM Port Capacitance when Switch is Enabled
55
pF
11. T = +25°C, f = 1 MHz, Capacitance is characterized but not tested in production.
A
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4
NLAS5123
V
CC
DUT
Input
V
CC
Output
GND
V
OUT
0.1 ꢁ F
t
BMM
50 ꢀ
35 pF
90%
90% of V
OH
Output
Switch Select Pin
GND
Figure 2. tBBM (Time Break−Before−Make)
V
CC
Input
50%
50%
90%
DUT
0 V
V
CC
Output
V
OUT
V
0.1 ꢁ F
OH
Open
90%
50 ꢀ
35 pF
Output
V
OL
Input
t
t
OFF
ON
Figure 3. tON/tOFF
V
CC
V
CC
Input
50%
50%
DUT
0 V
50 ꢀ
Output
V
OUT
V
OH
Open
35 pF
Output
V
10%
10%
OL
Input
t
t
ON
OFF
Figure 4. tON/tOFF
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5
NLAS5123
50 ꢀ
DUT
Reference
Input
50 ꢀ Generator
Transmitted
Output
50 ꢀ
Channel switch control/s test socket is normalized. Off isolation is measured across an off channel. On loss is
the bandwidth of an On switch. V , Bandwidth and V are independent of the input signal direction.
ISO
ONL
V
OUT
= Off Channel Isolation = 20 Log ǒ Ǔ for V
V
V
at 100 kHz
IN
ISO
V
IN
OUT
V
= On Channel Loss = 20 Log ǒ Ǔ for V
at 100 kHz to 50 MHz
ONL
IN
V
IN
Bandwidth (BW) = the frequency 3 dB below V
ONL
V
CT
= Use V
setup and test to all other switch analog input/outputs terminated with 50 ꢀ
ISO
Figure 5. Off Channel Isolation/On Channel Loss (BW)/Crosstalk
(On Channel to Off Channel)/VONL
DUT
V
CC
V
IN
Output
Open
GND
C
L
Output
Off
ꢂ V
OUT
Off
On
V
IN
Figure 6. Charge Injection: (Q)
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6
NLAS5123
0
−10
−20
−30
−40
−50
−60
−70
−80
−90
−100
0
−0.5
−1
−1.5
−2
−2.5
−3
−3.5
−4
−4.5
0.01
0.1
1
10
100
0.01
0.1
1
10
100
FREQUENCY (MHz)
FREQUENCY (MHz)
Figure 7. Cross Talk vs. Frequency
@ VCC = 4.5 V
Figure 8. Bandwidth vs. Frequency
0.01
1.9
1.7
1.5
1.3
1.1
0.9
0.7
0.5
0.009
0.008
0.007
0.006
0.005
0.004
0.003
0.002
0.001
0
85°C
25°C
−40°C
10
100
1000
10000
100000
0
0.5
1
1.5
(V)
2
2.5
3
FREQUENCY (Hz)
V
IS
Figure 9. Total Harmonic Distortion
Figure 10. On−Resistance vs. Input Voltage
@ VCC = 2.7 V
1.2
1
1.6
1.4
2.7 V
3.0 V
85°C
25°C
0.8
0.6
1.2
1.0
0.8
0.6
−40°C
3.6 V
0.4
0.2
0
4.5 V
5.5 V
0.0 0.5
1.0 1.5
2.0 2.5
(V)
3.0 3.5 4.0
4.5
0
1
2
3
4
5
6
V
V
IS
(V)
IS
Figure 11. On−Resistance vs. Input Voltage
Figure 12. On−Resistance vs. Input Voltage
@ VCC = 4.5 V
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7
NLAS5123
DEVICE ORDERING INFORMATION
Circuit
Device Nomenclature
Device
Package Tape & Reel
†
Indicator
Function
Suffix
Suffix
Technology
Device Order Number
Package Type
Tape & Reel Size
NLAS5123MNR2G
NL
AS
5123
MN
2
WDFN6
(Pb−Free)
3000 / Tape & Reel
NLAS5123MUR2G
NL
AS
5123
MU
2
UDFN6
(Pb−Free)
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
PACKAGE DIMENSIONS
UDFN6, 1.2x1.0, 0.4P
CASE 517AA−01
ISSUE A
NOTES:
A
B
D
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.25 AND
0.30 mm FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
PIN ONE
REFERENCE
E
MILLIMETERS
2X
DIM MIN
0.45
A1 0.00
MAX
0.55
0.05
A
0.10
C
TOP VIEW
A3
b
D
E
e
L
0.127 REF
2X
0.15
0.25
0.10
C
C
1.00 BSC
1.20 BSC
0.40 BSC
(A3)
0.30
L2 0.40
0.40
0.50
0.10
0.08
A
SEATING
PLANE
10X
C
SIDE VIEW
MOUNTING FOOTPRINT*
C
A1
6X
6X
0.22
0.42
5X L
3
1
L2
6X b
6
4
0.10 C A B
0.40
PITCH
1.07
e
NOTE 3
C
0.05
DIMENSIONS: MILLIMETERS
BOTTOM VIEW
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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8
NLAS5123
PACKAGE DIMENSIONS
WDFN6
CASE 506AS−01
ISSUE A
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.25 AND 0.30mm FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
E
A
B
D
MILLIMETERS
PIN ONE
DIM
A
MIN
0.70
0.00
MAX
0.80
0.05
REFERENCE
A1
A3
b
0.20 REF
2X
0.10 C
0.15
0.25
1.00 BSC
D
E
1.20 BSC
0.40 BSC
e
2X
0.10
0.10
C
L
0.30
0.40
0.40
0.50
L2
C
A3
MOUNTING FOOTPRINT*
A
6X
0.42
6X
0.22
7X
0.08
C
A1
SEATING
PLANE
C
4X
e
5X
L
1
3
0.40
PITCH
1.07
L1
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
6
4
b 6X
0.10
C
C
A
B
BOTTOM VIEW
NOTE 3
0.05
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5773−3850
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
For additional information, please contact your local
Sales Representative
NLAS5123/D
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